JPH0449873U - - Google Patents
Info
- Publication number
- JPH0449873U JPH0449873U JP9112390U JP9112390U JPH0449873U JP H0449873 U JPH0449873 U JP H0449873U JP 9112390 U JP9112390 U JP 9112390U JP 9112390 U JP9112390 U JP 9112390U JP H0449873 U JPH0449873 U JP H0449873U
- Authority
- JP
- Japan
- Prior art keywords
- photocoupler
- signal
- flop
- counter
- type flip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Measurement Of Current Or Voltage (AREA)
Description
第１図は本考案の一実施例を示す構成ブロツク
図、第２図および第３図は第１図回路の動作を示
すタイムチヤート、第４図は従来回路のブロツク
図、第５図は第４図従来回路の動作を示す波形図
である。
ＩＮ……入力端子、１，３……抵抗、２……コ
ンデンサ、４……フオトカプラ、１１……カウン
タ、１２……Ｄタイプフリツプフロツプ、１３…
…クロツク回路。
FIG. 1 is a configuration block diagram showing an embodiment of the present invention, FIGS. 2 and 3 are time charts showing the operation of the circuit shown in FIG. 1, FIG. 4 is a block diagram of a conventional circuit, and FIG. FIG. 4 is a waveform diagram showing the operation of the conventional circuit. IN...Input terminal, 1, 3...Resistor, 2...Capacitor, 4...Photocoupler, 11...Counter, 12...D type flip-flop, 13...
...clock circuit.
Claims (1)
印加されクロツクを計数するカウンタと、 カウンタの出力信号がＤ入力端子に印加され前
記フオトカプラからの信号がクロツク端子に印加
されるＤタイプフリツプフロツプと を備えＤタイプフリツプフロツプからＡＣ入力電
圧をオン／オフに対応した信号を得るようにした
ことを特徴とするＡＣ入力検知回路。[Claims for Utility Model Registration] A photocoupler that receives an AC input voltage signal; a counter that counts clocks by applying an output signal of the photocoupler to a reset terminal; and a counter that counts clocks to which an output signal of the photocoupler is applied to a D input terminal; An AC input detection circuit comprising: a D-type flip-flop to which a signal is applied to a clock terminal; and a signal corresponding to turning on/off an AC input voltage is obtained from the D-type flip-flop. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9112390U JPH0449873U (en) | 1990-08-30 | 1990-08-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9112390U JPH0449873U (en) | 1990-08-30 | 1990-08-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0449873U true JPH0449873U (en) | 1992-04-27 |
Family
ID=31826450
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9112390U Pending JPH0449873U (en) | 1990-08-30 | 1990-08-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0449873U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2019052990A (en) * | 2017-09-19 | 2019-04-04 | 株式会社河合楽器製作所 | Power shutdown detector |
-
1990
- 1990-08-30 JP JP9112390U patent/JPH0449873U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2019052990A (en) * | 2017-09-19 | 2019-04-04 | 株式会社河合楽器製作所 | Power shutdown detector |
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