JPH0334910Y2 - - Google Patents

Info

Publication number
JPH0334910Y2
JPH0334910Y2 JP8006485U JP8006485U JPH0334910Y2 JP H0334910 Y2 JPH0334910 Y2 JP H0334910Y2 JP 8006485 U JP8006485 U JP 8006485U JP 8006485 U JP8006485 U JP 8006485U JP H0334910 Y2 JPH0334910 Y2 JP H0334910Y2
Authority
JP
Japan
Prior art keywords
hole
substrate
hybrid
package
cover
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP8006485U
Other languages
Japanese (ja)
Other versions
JPS61196538U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8006485U priority Critical patent/JPH0334910Y2/ja
Publication of JPS61196538U publication Critical patent/JPS61196538U/ja
Application granted granted Critical
Publication of JPH0334910Y2 publication Critical patent/JPH0334910Y2/ja
Expired legal-status Critical Current

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  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Casings For Electric Apparatus (AREA)

Description

【考案の詳細な説明】 〔考案の技術分野〕 本考案はハイブリツドICパツケージの構造に
係り、特にパツケージの中央部に比較的大径の貫
通孔を備えたハイブリツドIC用の多目的パツケ
ージに関する。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to the structure of a hybrid IC package, and more particularly to a multipurpose package for a hybrid IC having a relatively large diameter through hole in the center of the package.

〔従来技術〕[Prior art]

近年、半導体装置の多用による電子装置の小型
化が著しいが、この電子装置の小型化に反比例し
て半導体装置、特にハイブリツドICが大規模大
型化する傾向にある。従つて、電子装置の限られ
たスペースに、ハイブリツドICをプリント配線
板に実装して多数収納することは困難になつてき
ている。
In recent years, the size of electronic devices has been significantly reduced due to the heavy use of semiconductor devices, and in inverse proportion to the miniaturization of electronic devices, there is a tendency for semiconductor devices, especially hybrid ICs, to become larger in scale. Therefore, it is becoming difficult to mount a large number of hybrid ICs on printed wiring boards and accommodate them in the limited space of electronic devices.

〔考案の目的〕[Purpose of invention]

本考案の目的は、電子装置等の限られたスペー
ス内に比較的大型のハイブリツドICを多数収納
できると共に、それらハイブリツドICの入出力
用配線、冷却等を容易にするハイブリツドIC用
のパツケージを提供することにある。
The purpose of the present invention is to provide a package for hybrid ICs that can accommodate a large number of relatively large hybrid ICs in a limited space such as an electronic device, and also facilitates the input/output wiring, cooling, etc. of these hybrid ICs. It's about doing.

〔考案の構成〕[Structure of the idea]

本考案になるハイブリツドICパツケージは、
半導体素子等を搭載する面の略中央部に穿設した
孔を有する絶縁性基板と、前記基板上に装着した
際に中心が前記基板の孔と一致しかつ該孔と略同
径の孔を有するカバーと、前記基板の孔と前記カ
バーの孔とを連結する筒状体とからなり、前記基
板、カバーおよび筒状体の互に接触する部分は気
密封止されることを特徴とする。
The hybrid IC package devised by this invention is
An insulating substrate having a hole bored approximately in the center of a surface on which a semiconductor element, etc. is mounted, and a hole whose center coincides with the hole of the substrate and has approximately the same diameter as the hole when mounted on the substrate. and a cylindrical body that connects a hole in the substrate and a hole in the cover, and the portions of the substrate, the cover, and the cylindrical body that contact each other are hermetically sealed.

〔実施例〕〔Example〕

以下、本考案の一実施例につき、図面を参照し
て説明する。
Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

第1図は本考案になるハイブリツドICパツケ
ージの平面図であり、第2図は第1図に−線
で示した箇所の側断面図である。両図において、
1は剛性を有するセラミツク、表面を絶縁コーテ
イングした金属板等の絶縁性基板であり、この基
板1の中央部には比較的大径の孔2が穿設されて
いる。この孔2の大きさは後述する用途によつて
適宜定められるものであり、また形状は円形、多
角形等いずれでもよいが、製作上円形が好まし
い。基板1上には、厚膜または薄膜により所望の
配線パターンを形成した膜配線板3が接着等さ
れ、この膜配線板3には所要の各種半導体素子等
4がマウントされるが、これらは本考案の要旨と
するところではない。5は前記基板1の孔2と
ほゞ同径もしくは同形状の孔6を中央に穿設した
カバーであり、このカバー5の端面7は基板1上
に半田付け等される。8は前記基板1の孔2と前
記カバー5の孔6とを連結する筒状体であつて、
基板1の孔2と同じ内径を有し、一端9は基板1
に当接され、他端10はカバー5の孔6に係合さ
れ、半田付け等によつて気密封止されている。な
お、基板1とカバー5を筒状体8を用いて連結す
る構造としては、図示のもの以外にも種々考えら
れるが、要は基板1の孔2とカバー5の孔6を連
結し得て、その接続部を気密封止できる構成であ
ればよい。
FIG. 1 is a plan view of a hybrid IC package according to the present invention, and FIG. 2 is a side sectional view of the portion indicated by a - line in FIG. 1. In both figures,
Reference numeral 1 denotes an insulating substrate such as a rigid ceramic or a metal plate whose surface is coated with an insulating coating, and a hole 2 of a relatively large diameter is bored in the center of the substrate 1. The size of the hole 2 is appropriately determined depending on the use described later, and the shape may be circular or polygonal, but a circular shape is preferable from the viewpoint of manufacturing. On the substrate 1, a film wiring board 3 on which a desired wiring pattern is formed using a thick film or a thin film is adhered, etc., and various required semiconductor elements 4 are mounted on this film wiring board 3. This is not the gist of the idea. Reference numeral 5 denotes a cover having a hole 6 in the center having approximately the same diameter or shape as the hole 2 of the substrate 1, and an end surface 7 of the cover 5 is soldered onto the substrate 1. 8 is a cylindrical body connecting the hole 2 of the substrate 1 and the hole 6 of the cover 5,
It has the same inner diameter as the hole 2 of the substrate 1, and one end 9 has the same inner diameter as the hole 2 of the substrate 1.
The other end 10 is engaged with the hole 6 of the cover 5 and hermetically sealed by soldering or the like. Note that various structures other than those shown in the drawings can be considered as a structure for connecting the substrate 1 and the cover 5 using the cylindrical body 8, but the point is that the hole 2 of the substrate 1 and the hole 6 of the cover 5 can be connected. , any structure may be used as long as the connecting portion can be hermetically sealed.

第3図は、上述のごとく構成されたハイブリツ
ドICパツケージ20を狭隘なスペースに複数個
(20〜20o)装着した場合の側断面図である。
本考案になるパツケージ20は剛性を有する基板
1を使用しているので、一旦プリント配線板に実
装する必要はなく、例えばブラケツト(図示せ
ず)等を用いて基板1を電子装置等の収納容器壁
30に直接取付けることができるので、限られた
スペース内に多数収納することができる。そして
このように積重ねた状態にした場合、特に高電力
ハイブリツドIC等の発熱量が多いパツケージの
場合は放熱が問題となるが、本考案になるパツケ
ージ20は中央部に貫通孔10を設けたので、こ
の貫通孔10を用いて強制空冷を行うか、また貫
通孔10内にパイプ(図示せず)を挿通して液冷
することができる。
FIG. 3 is a side sectional view of a plurality (20 to 20 ° ) of the hybrid IC packages 20 constructed as described above installed in a narrow space.
Since the package 20 according to the present invention uses a rigid substrate 1, there is no need to temporarily mount it on a printed wiring board. Since it can be directly attached to the wall 30, a large number can be stored in a limited space. When stacked like this, heat dissipation becomes a problem, especially for packages that generate a lot of heat, such as high-power hybrid ICs, but the package 20 of the present invention has a through hole 10 in the center. Forced air cooling can be performed using this through hole 10, or liquid cooling can be performed by inserting a pipe (not shown) into the through hole 10.

第4図は、第3図のごとく装着したハイブリツ
ドICの入出力用配線を施した場合の側断面図で
ある。図から明らかなように、各ハイブリツド
ICパツケージ20〜20oから取り出された配線
31は、それぞれのパツケージ20〜20oの貫
通孔10内を通して外部に引出すことができるの
で、特にスペースに制約のある電子装置の場合に
有効である。なお、個々のハイブリツドICパツ
ケージ20〜20oの入出力信号は、例えば基板
1にポスト状のリード端子32を植設し、この端
子32に配線31を接続することによつて入出力
することができる。
FIG. 4 is a side cross-sectional view of the hybrid IC mounted as shown in FIG. 3 with input/output wiring. As is clear from the figure, each hybrid
The wiring 31 taken out from the IC packages 20-20o can be drawn out through the through-holes 10 of the respective packages 20-20o , which is particularly effective in the case of electronic devices where space is limited. Note that the input/output signals of the individual hybrid IC packages 20 to 20 o can be input/output by, for example, implanting post-shaped lead terminals 32 on the board 1 and connecting the wiring 31 to the terminals 32. can.

〔考案の効果〕[Effect of idea]

本考案になるハイブリツドICパツケージの構
造は、剛性を有する基板を使用すると共に、パツ
ケージの中央部に比較的大径の貫通孔を設けたの
で、限られたスペース内に多数のパツケージを積
重ねて収納することが出来ると共に、該貫通孔を
利用したハイブリツドICの入出力用配線や強制
空冷、液冷等を行うことができ、多目的に用いる
ことができる。
The structure of the hybrid IC package proposed in this invention uses a rigid substrate and has a relatively large-diameter through hole in the center of the package, so a large number of packages can be stacked and stored in a limited space. In addition, the through holes can be used for input/output wiring of the hybrid IC, forced air cooling, liquid cooling, etc., and can be used for a variety of purposes.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案になるハイブリツドICパツケ
ージの構造を示す平面図、第2図は第1図に−
線で示した箇所の縦断面図、第3図および第4
図は本考案になるハイブリツドICパツケージの
利用例を示す一部裁断側面図であつて、前者は冷
却に利用した場合を示し後者は入出力信号用配線
に利用した場合を示す。 1……基板、2,6……孔、5……カバー、8
……筒状体、20〜20o……ハイブリツドICパ
ツケージ。
Figure 1 is a plan view showing the structure of the hybrid IC package of the present invention, and Figure 2 is the same as Figure 1.
Vertical cross-sectional view of the area indicated by the line, Figures 3 and 4
The figures are partially cutaway side views showing examples of the use of the hybrid IC package according to the present invention, with the former showing the case where it is used for cooling and the latter showing the case where it is used for input/output signal wiring. 1... Board, 2, 6... Hole, 5... Cover, 8
...Cylindrical body, 20~20 o ...Hybrid IC package.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体素子等を搭載する面の略中央部に穿設し
た孔を有する絶縁性基板と、前記基板上に装着し
た際に中心が前記基板の孔と一致しかつ該孔と略
同径の孔を有するカバーと、前記基板の孔と前記
カバーの孔とを連結する筒状体とからなり、前記
基板、カバーおよび筒状体の互に接触する部分は
気密封止されることを特徴とするハイブリツド
ICパツケージ。
An insulating substrate having a hole bored approximately in the center of a surface on which a semiconductor element, etc. is mounted, and a hole whose center coincides with the hole of the substrate and has approximately the same diameter as the hole when mounted on the substrate. and a cylindrical body that connects a hole in the substrate with a hole in the cover, wherein the parts of the substrate, the cover, and the cylindrical body that contact each other are hermetically sealed.
IC package.
JP8006485U 1985-05-30 1985-05-30 Expired JPH0334910Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8006485U JPH0334910Y2 (en) 1985-05-30 1985-05-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8006485U JPH0334910Y2 (en) 1985-05-30 1985-05-30

Publications (2)

Publication Number Publication Date
JPS61196538U JPS61196538U (en) 1986-12-08
JPH0334910Y2 true JPH0334910Y2 (en) 1991-07-24

Family

ID=30625564

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8006485U Expired JPH0334910Y2 (en) 1985-05-30 1985-05-30

Country Status (1)

Country Link
JP (1) JPH0334910Y2 (en)

Also Published As

Publication number Publication date
JPS61196538U (en) 1986-12-08

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