JPH033533A - Pcm signal receiver - Google Patents

Abstract

PURPOSE:To expand the high frequency limit of the frequency by applying ANDing processing between an output signal of an identification circuit receiving an output signal of a limiter amplifier and an output signal of a peak value detection circuit. CONSTITUTION:An output signal of an OR circuit 11 provided on an input stage of a timing extraction circuit 12 in a PCM signal receiver is subject to timing signal extraction by using a timing tank with a comparatively low Q and a timing extraction signal is amplified by a narrow band amplifier 5 and a limiter amplifier 6 and branched into two. Then one signal is inputted to an identification circuit 7 and the other signal is inputted to the OR circuit 11 via a delay circuit 13 having a prescribed delay time and ORed with an input signal to a timing circuit 12. Moreover, a peak value detection circuit 15 detects a peak value of an output signal of the narrow band amplifier 5 and an AND circuit 16 ANDs it with an output signal of the identification circuit 7. Thus, the high frequency limit of the handled frequency is expanded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a PCM signal receiving device, and particularly to a G b
The present invention relates to a PCM signal receiving device that improves the timing extraction circuit in a receiving device that receives transmission information at a high speed of 1/s.

(Conventional technology) With the advancement of optical transmission technology, studies are progressing on ultra-high-speed optical transmission technology using long wavelength band optical devices/single mode fibers as a possibility for large-capacity/long-distance transmission systems.
In particular, in order to realize a broadband information communication network that provides a wide variety of services such as image, data, and voice, it is expected that optical transmission equipment will become faster and more stable.

The transmission capacity of the backbone transmission system in such a broadband information communication network reaches several gigabits/second in a time division multiplex transmission system, for example, and the optical transmitting/receiving equipment thereof is also required to have a wide band/high speed.

Typically, the receiver of the transmission device is equipped with a timing circuit whose role is to provide a point in time at the center of the eye for correct identification of the equalized waveform, typically P CM
In the case of live broadcasting, a timing extraction circuit is used that extracts timing components from the transmitted code sequence itself.

FIG. 2 is a block diagram of a conventional PCM signal receiving device. Assume that the code format of the input first signal is an NRZ code. Since NRZ codes, bipolar codes, and the like do not have their own timing components, devices that receive these codes generally extract timing signals using a nonlinear timing extraction method to generate clock signals.

In FIG. 2, the NRZ signal input to the input terminal 1 is branched into two, and one is input to the identification circuit 7. On the other hand, the sign change point is detected in the differentiating circuit 2 of the timing extraction circuit, and the output signal of the 4-wave rectifier circuit 3, in which the fO acid component is extracted by double-wave rectification in the double-wave rectifier circuit 3, is further passed through the resonance circuit. (timing tank) and extracts the fO sine wave component (clock signal). Since timing deviation is considered an important characteristic for this resonant circuit, a surface acoustic wave filter (SAW > 4
("Surface Wave Devices and Their Applications, Nikkan Kogyo Shimbun)" The timing signal extracted by the surface acoustic wave filter 4 is selectively amplified in the narrow band amplifier 5 where only the fO timing signal component is sent to the limiter amplifier 6. The timing signal input to the limiter amplifier 6 is
The signal is amplified by the high gain of the limiter amplifier 6 so as to suppress amplitude fluctuations due to pattern fluctuations and to have a sufficient signal level.
Supplied as an identification timing signal.

On the other hand, if the code format of the input signal is RZ, the signal itself has a clock component, so the input signal 9 in the figure
is directly applied to the surface acoustic wave filter 4 to extract a sine wave clock signal.

(Problems to be Solved by the Invention) As described above, the conventional PCM signal receiving device uses a high-Q surface acoustic wave filter as a timing extraction circuit, that is, a timing tank, to generate an fO acid component clock signal in the GHz region. . However, in this type of timing extraction circuit, there is a limit to the frequency range that can be used due to limitations in microfabrication of the surface acoustic wave filter, and the process yield is reduced. It also leads to a decrease in productivity of a PCM signal receiver using the conventional timing extraction circuit. Furthermore, if Q is set and used within the range that can be realized by a surface acoustic wave filter, there is a big problem that the ability to extract timing signals for continuous inputs of the same code is lost.

That is, at the fundamental frequency of the surface wave excited in the surface acoustic wave filter, f=V/L, which is determined by the surface wave propagation velocity V of the material and the electrode pitch L. Therefore, when the excitation frequency is in the GHz range, surface wave transmission is generally used! m speed is 3
X10' (m/s), so the electrode width is 1μ
m or less must be created. As a specific example, the electrode width of a surface acoustic wave filter used in a 4 Gbps optical regenerator is 0.2 μm using a crystal substrate as the material.
, the electrode length is 400 μm (“Prototype of JGbps optical regenerative repeater”, Institute of Electronics, Information and Communication Engineers, 1988 National Conference Proceedings). Further, the generally obtained fractional band Q is proportional to the number of electrodes. Therefore, in the case of Q-800, nearly 800 electrodes are required. Furthermore, it is usually important to take into consideration the state in which the same code continues as a received signal. Assume now that "O" signals arrive successively. The output signal of the timing extraction filter has an amplitude characteristic of ■nexp (-πn/Q) (here, ■=
The maximum input amplitude to the timing tank (n: number of consecutive zero codes), that is, the amplitude decreases in an envelope shape with successive zero codes.

In order to process a large number of such electrode widths with high precision, there are limits to processing techniques such as photo etching and laser processing, which makes it difficult to realize surface acoustic wave filters and the pcMi number in the Gbps region. This makes it impossible to implement the receiver's timing extraction circuit. As described above, the conventional timing extraction circuit has a problem to be solved regarding the upper limit of the frequency to be handled.

(Means for Solving the Problems) In order to solve the above-mentioned problems, a PCM signal receiving device according to the present invention includes at least a timing extraction circuit and a discriminating circuit, which are provided with a tank circuit that inputs a received signal and outputs a clock signal. (In the No. 8 receiving device, a PCM with a narrowband amplifier that receives a timing signal input from the narrowband amplifier, and a peak value detection circuit that receives the output signal of the narrowband amplifier via a wideband amplifier and detects a peak value;
a limiter amplifier that inputs the output signal of the narrowband amplifier; a delay circuit that delays the output signal of the limiter amplifier for a certain period of time to provide the other input signal of the OR circuit; and a delay circuit that inputs the output signal of the limiter amplifier. and an AND circuit that performs an AND process between the output signal of the identification circuit and the output signal of the peak value detection circuit.

(Function) In the present invention described above, an OR circuit is provided at the input stage of the timing extraction circuit in the PCM signal receiving device, and after the output signal of the OR circuit is extracted as a timing signal using a timing tank with relatively low Q. , the timing extraction signal is amplified by a narrowband amplifier and a limiter amplifier and split into two branches, one of which is sent to an identification circuit, and the other signal is input to an OR circuit via a delay circuit having a certain delay time and sent to a timing circuit. performs logical OR processing with the input signal of

Furthermore, the peak value of the output signal of the narrowband amplifier is detected, and an AND processing with the output signal of the identification circuit is performed.

As a result, it is possible to improve the feasibility of a timing extraction circuit in the GHz region, and also to realize a timing extraction circuit that is resistant to the same code sequence, and furthermore, it is possible to realize a timing extraction circuit that is resistant to the same code continuation. It is possible to prevent unnecessary noise from occurring at the output point of the identification circuit due to random noise, and it is possible to improve the performance of the 1G system.

(Example) Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a PCM receiving apparatus according to an embodiment of the present invention. Note that in the following description, an RZ (return to zero) code is assumed as the code format of the received signal.

The RZ reception signal that is not input to the input terminal 9 is input to the identification circuit 7 and also to the OR circuit 11 . The OR circuit 11 performs OR processing on the signal input from the delay circuit 13 and the RZ signal to generate an output signal. Now, assuming an initial stage as a time process, the delay time f
Since the signal from the lPt 13 is non-signal, the OR circuit 13 outputs a signal in which the signal component input to the input terminal 9 is dominant.

The signal output from the OR circuit 11 is input to the timing extraction filter 12. Timing extraction filter 1
The center frequency of 2 needs to be set to a high ratio @ range Q in consideration of setting fO, timing deviation, detuning, etc., but it may be set to a Q that is feasible in the GHz range.

In particular, considering aging, temperature characteristics, etc., it is recommended to use a surface acoustic wave filter (SAW filter) as the timing tank.

Now, in FIG. 1, if fO is 4 GHz and Q is 100, and if the timing extraction filter 12 is a surface acoustic wave filter made of crystal, then if the strip width and gap of the interdigital electrodes are selected to be equal, the strip width will be approximately 0.
Although the thickness is 2 μm, since the Q is 100, the total number of electrodes is approximately 120, and such an electrode pattern can be created by ordinary photoetching technology.

The fo tarok signal with stable characteristics extracted by the timing extraction filter 12 is processed by the narrowband amplifier 5 to
Only the O timing signal components are selectively (tuned) amplified.

Therefore, fO at the output end of this narrowband amplifier 5
In the Tsukook signal, there is a large difference in signal level between when the signal is transmitted and when the signal is cut off.

The output signal of the narrowband amplifier 5 is branched into two and input to the limiter amplifier 6 and the wideband amplifier 14.

The clock signal input to the limiter amplifier 6 is amplified and amplitude limited to a sufficient signal level to suppress amplitude fluctuations due to input pattern fluctuations to the timing circuit.

The fO check signal output from the limiter amplifier 6 is branched into two branches, one of which is input to a delay circuit 13 and supplied to an OR circuit 11 after being given a certain delay.

Therefore, the output signal of the OR circuit 11 always includes the fO spectrum component as a result of performing the OR process of the stable fO Tsukook signal input from the delay circuit 13 and the binary signal input to the input @9. A signal having the following values is output. The other branched signal is the identification time I? 87 as an identification clock signal.

The tarokk signal input to the wideband amplifier 14 is amplified to a sufficient amplitude level while maintaining linearity, and is input to the peak value detection circuit 15. The amplified clock signal is f
Since only the O signal is amplified, the difference in amplitude during signal transmission and during signal interruption is even larger. This peak value detection circuit 15 performs amplitude peak detection of the input clock signal and outputs a DC signal to the AND circuit FR116.

The identification circuit 7 samples the received waveform at the input terminal 9 using the clock signal input from the limiter amplifier 6, and outputs an output signal A to the AND circuit 1?816 as the identification result. The AND circuit 16 receives the data signal A input from the identification circuit 7 and the DC signal B from the peak value detection circuit 15.
Performs logical product processing (X=A −B) with A=1. B=
Only when it is 1, the signal A identified and reproduced by the identification circuit 7 is outputted to the output terminal 8.

Normally, it is important to take into consideration the case where the same code continues as a received signal. Now, suppose that "0" signals arrive continuously.The output signal of the timing extraction filter 12 has an amplitude characteristic of v*exp(-πn/Q) (where, V: maximum input to the timing tank amplitude, n: number of consecutive zero codes).

That is, the amplitude decreases in an envelope shape due to a series of zero codes. Therefore, if the signal at the input terminal 9 is input directly to the timing tank without using the OR circuit 11, the timing signal X to the identification circuit 7 will become unstable, causing an error in the communication system.

However, in the timing extraction circuit in the PCM signal receiving device of the present invention, the OR circuit 11 performs OR processing of the stable fO timing signal outputted from the limiter amplifier 6 with a certain delay and the input RZ signal, Since the resulting output signal is input to the timing extraction filter 12, even if continuous zeros occur in the received signal, a stable fO check signal can be obtained at the output of the timing extraction filter 12.

In this way, by taking the logical sum of the timing signal extracted at the input stage of the timing extraction circuit and the input signal, the feasibility of the timing extraction circuit for high-speed PCM (G transmission system) is reduced. Even if a 7 letter is used, an improved and stable lock signal can be supplied to the identification circuit.

Furthermore, in the PCM signal receiving apparatus, there may be a situation in which the transmission signal is completely cut off, in addition to the -F-mentioned continuation of the same code. In this case, in the conventional timing extraction f''l path,
A limiter amplifier amplifies the random noise, activates the identification circuit, and sends the unwanted noise out onto the communication line.

Since the timing extraction circuit in the PCM signal receiving device of the present invention has a high gain limiter amplifier 6 and constitutes a feedback circuit as the timing extraction circuit, the output signal of the limiter amplifier 6 when the transmission signal is cut off is random. Generates noise. However, in the present invention, the peak value detection circuit 15 detects the peak value of the clock signal (out-of-band components are suppressed in the narrowband amplifier 5).
Since the peak value detection result B and the signal output from the identification circuit 7 are subjected to AND processing (X=A-B) in the AND circuit 16, the tarock signal of the identification circuit 7 is temporarily Random noise is input, and the identification circuit 7
Even if unnecessary noise is output from the output terminal 8, the unnecessary noise will not be outputted to the output terminal 8.

In the explanation so far, the code format of the received signal or RZ
Although we have described the case of NRZ, the present invention is also effective in the case of NRZ, and after passing through the nonlinear means of the differential circuit 6 and the double-wave rectifier circuit 7 as in the conventional example shown in FIG. A similar function can be obtained by connecting to input terminal 9.

(Effects of the Invention) As described above, if the timing extraction circuit according to the present invention is used, the processing precision required for surface acoustic wave filters is relaxed, so the high frequency limit to be handled is expanded, and the timing extraction circuit in high-speed PCM signal transmission systems is improved. The feasibility of the extraction circuit can be significantly improved.

[Brief explanation of drawings]

FIG. 1 is a configuration block diagram showing one embodiment of the present invention, and FIG.
The figure is a block diagram showing the configuration of a conventional timing extraction circuit. 1.9...Input end, 2...Differentiating circuit, 3...Double wave rectifier circuit, 4...Surface acoustic wave filter, 5...Narrowband amplifier, 6...Limiter amplifier, 7 . . . Identification circuit, 8 . . . Output full, 11 . . . OR circuit, 12.
...Timing extraction filter, 13...Delay circuit, 1
4... Wideband amplifier, 15... Peak value detection circuit,
16...Logic product circuit.

Claims (1)

[Claims] A PCM signal receiving device having at least a timing extraction circuit and an identification circuit including a tank circuit that inputs a received signal and outputs a clock signal, comprising: an OR circuit that takes the received signal as one input signal; a timing extraction filter that extracts a stable timing signal from an output signal; a narrowband amplifier that receives the timing signal extracted by the timing extraction filter; and an output signal of the narrowband amplifier that is inputted via a wideband amplifier; a peak value detection circuit that detects a peak value; a limiter amplifier that inputs the output signal of the narrowband amplifier; and a delay circuit that delays the output signal of the limiter amplifier for a certain period of time and uses it as the other input signal of the OR circuit. and an AND circuit that receives the output signal of the limiter amplifier and performs AND processing of the output signal of the discrimination circuit and the output signal of the peak value detection circuit.
Signal receiving device.