JPH0336230U - - Google Patents
Info
- Publication number
- JPH0336230U JPH0336230U JP9701089U JP9701089U JPH0336230U JP H0336230 U JPH0336230 U JP H0336230U JP 9701089 U JP9701089 U JP 9701089U JP 9701089 U JP9701089 U JP 9701089U JP H0336230 U JPH0336230 U JP H0336230U
- Authority
- JP
- Japan
- Prior art keywords
- converter
- range setting
- successive approximation
- signal
- input signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Analogue/Digital Conversion (AREA)
Description
図面は本考案の逐次比較型Ａ／Ｄコンバータの
１実施例を示し、第１図は要部の結線図、第２図
はブロツク図である。
１……アナログ入力端子、２……比較器、３…
…ＳＡＲ、５……Ｄ／Ａ変換器、６……基準電源
回路、Ｅ……基準電源、Ｒｒ……入力レンジ設定
用の抵抗、Ｒｍ〜Ｒ１，Ｒｍ′〜Ｒ１′……はし
ご形抵抗回路の各抵抗。
The drawings show one embodiment of the successive approximation type A/D converter of the present invention, with FIG. 1 being a wiring diagram of the main parts, and FIG. 2 being a block diagram. 1...Analog input terminal, 2...Comparator, 3...
...SAR, 5...D/A converter, 6...Reference power supply circuit, E...Reference power supply, Rr...Resistor for input range setting, Rm ~R1 , Rm'~ R1 '...Ladder type Each resistor in a resistor circuit.
Claims (1)
Ｄ／Ａ変換器のはしご形抵抗回路の各段に供給し
、前記抵抗回路の最上位ビツトの接続点の電圧信
号を前記Ｄ／Ａ変換器の出力信号として比較器に
供給し、前記比較器のアナログ入力信号と前記出
力信号との大小比較に基き前記デジタル出力を前
記入力信号のデジタル値に可変する逐次比較型Ａ
／Ｄコンバータにおいて、 前記最上位ビツトの接続点に入力レンジ設定用
の抵抗を介して基準電源を接続し、前記入力レン
ジ設定用の抵抗と前記基準電源の電圧とによつて
前記入力信号の変換範囲を設定するようにした逐
次比較型Ａ／Ｄコンバータ。[Claims for Utility Model Registration] Each bit of the digital output of the successive approximation register is supplied to each stage of the ladder-shaped resistance circuit of the D/A converter, and the voltage signal at the connection point of the most significant bit of the resistance circuit is A successive approximation type A that is supplied as an output signal of a D/A converter to a comparator and varies the digital output to the digital value of the input signal based on a magnitude comparison between the analog input signal of the comparator and the output signal.
/D converter, a reference power source is connected to the connection point of the most significant bit via an input range setting resistor, and the input signal is converted by the input range setting resistor and the voltage of the reference power source. A successive approximation type A/D converter with a range setting.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9701089U JPH0336230U (en) | 1989-08-19 | 1989-08-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9701089U JPH0336230U (en) | 1989-08-19 | 1989-08-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0336230U true JPH0336230U (en) | 1991-04-09 |
Family
ID=31646171
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9701089U Pending JPH0336230U (en) | 1989-08-19 | 1989-08-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0336230U (en) |
-
1989
- 1989-08-19 JP JP9701089U patent/JPH0336230U/ja active Pending
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