JPH0337493U - - Google Patents

Info

Publication number
JPH0337493U
JPH0337493U JP9776389U JP9776389U JPH0337493U JP H0337493 U JPH0337493 U JP H0337493U JP 9776389 U JP9776389 U JP 9776389U JP 9776389 U JP9776389 U JP 9776389U JP H0337493 U JPH0337493 U JP H0337493U
Authority
JP
Japan
Prior art keywords
liquid crystal
crystal display
brightness
display section
pixel pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9776389U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9776389U priority Critical patent/JPH0337493U/ja
Publication of JPH0337493U publication Critical patent/JPH0337493U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Liquid Crystal Display Device Control (AREA)
  • Transforming Electric Information Into Light Information (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の具体的一実施例を示す液晶表
示装置のブロツク系統図、第2図は第1図の補足
説明図、第3図は第1図の動作説明に供するフロ
ーチヤートである。 1……中央演算処理装置(CPU)、2……シ
ステムメモリ、3……グラフイツクコントローラ
(G.C)、4……フレームメモリ、5……パラ
レル/シリアル変換手段、6……液晶表示部(L
CD)、7……輝度制御回路。
Fig. 1 is a block system diagram of a liquid crystal display device showing a specific embodiment of the present invention, Fig. 2 is a supplementary explanatory diagram of Fig. 1, and Fig. 3 is a flowchart for explaining the operation of Fig. 1. . DESCRIPTION OF SYMBOLS 1...Central processing unit (CPU), 2...System memory, 3...Graphics controller (GC), 4...Frame memory, 5...Parallel/serial conversion means, 6...Liquid crystal display section (L
CD), 7... Brightness control circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] グラフイツクコントローラに描画命令を出力す
る中央演算処理装置、画素パターンがトライアン
グル構造から成る液晶表示部、該液晶表示部の表
示アドレスに対応したフレームアドレスを有し前
記グラフイツクコントローラからの表示データを
前記フレームアドレスに格納するフレームメモリ
、該フレームメモリからのパラレルデータを入力
してシリアルデータに変換し前記液晶表示部に出
力するパラレル/シリアル変換手段、及び輝度制
御機能を有し前記中央演算処理装置からの信号に
基づいて前記液晶表示部の画素パターンの輝度を
制御する輝度制御回路から成り、前記グラフイツ
クコントローラで前記液晶表示部の偶数行ドツト
と奇数行ドツトのパターンを1組として扱つて描
画する時、一組のドツトの描画輝度を前記輝度制
御回路を用いて異なつて調光する液晶表示装置。
a central processing unit that outputs drawing commands to a graphics controller; a liquid crystal display section whose pixel pattern has a triangular structure; A frame memory for storing frame addresses, a parallel/serial conversion means for inputting parallel data from the frame memory, converting it into serial data and outputting it to the liquid crystal display section, and a brightness control function, from the central processing unit. a brightness control circuit that controls the brightness of a pixel pattern on the liquid crystal display section based on a signal from the pixel pattern; A liquid crystal display device that adjusts the drawing brightness of a set of dots differently using the brightness control circuit.
JP9776389U 1989-08-22 1989-08-22 Pending JPH0337493U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9776389U JPH0337493U (en) 1989-08-22 1989-08-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9776389U JPH0337493U (en) 1989-08-22 1989-08-22

Publications (1)

Publication Number Publication Date
JPH0337493U true JPH0337493U (en) 1991-04-11

Family

ID=31646894

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9776389U Pending JPH0337493U (en) 1989-08-22 1989-08-22

Country Status (1)

Country Link
JP (1) JPH0337493U (en)

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