JPH033954B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pin or pvn diode, and particularly to a diode whose reverse recovery characteristic is soft recovery.

Recently, electronic devices are becoming increasingly high-frequency in order to reduce the size and weight of devices and improve efficiency. Along with this, there is a strong demand for higher frequencies for semiconductor electronic components incorporated into equipment. Diodes used as rectifying elements are no exception, and there is a great demand for high-speed diodes that can operate at higher frequencies, that is, at higher speeds.

The main characteristics required for high-speed diodes are:
One of the advantages is that the reverse recovery time is short. As shown in FIG. 1, the diode reverse recovery time t _rr consists of the following two periods.

(1) The period during which the diode is short-circuited, from the time when the diode current decreases from the forward direction i _F to 0 and the reverse current begins to flow, until the time when the reverse current reaches its maximum value I _RP . t _s (2) After the period t _s , the period t _d during which the diode recovers its reverse blocking ability until the reverse current becomes almost 0. In this case, the period t _d is usually the same as shown in Fig. 1. As shown, the reverse current is 90% of the peak value I _RP and 20
%, the intersection of this straight line and the time axis is found, and the time difference between this point and the time when the reverse current reaches its peak value is calculated. In FIG. 1, v _F represents the voltage between the anode and cathode of the diode. As is well known, in order for a diode to operate at high speed, it is desirable that the reverse recovery time t _rr be short. On the other hand, if the period t _s from when the reverse current of the diode reaches its peak I _RP to when it completely recovers its blocking ability is too short, the inductance component L present in the circuit incorporating this diode causes −Ldi/ The induced electromotive force dt increases, causing so-called spike noise.

In order to reduce such spike noise, it is desirable that the period t _d during which the diode recovers its reverse blocking ability be long. However, there is a limit to the reverse recovery time t _rr , and the period t _d cannot be made unnecessarily long. Therefore, within this limit, let t _s be long, and the period t _s during which the diode is in the short-circuit condition,
It is desirable that the ratio t _d /t _s to the period t _d for restoring the blocking ability is large.

A characteristic in which the value of t _d /t _s is large in this way is generally called a soft recovery characteristic.

FIG. 2 shows the impurity concentration distribution of a typical pin or pνn structure diode. In this structure, the i layer (n-type low impurity concentration layer) or the ν layer (p-type low impurity concentration layer), which has a relatively low impurity concentration, is
It has a structure sandwiched between both high concentration layers.

In the following explanation, this structure will be simply referred to as a pin (structure).

When a reverse voltage is applied to such a pin structure diode, the depletion layer spreads throughout the low concentration i-layer and stops at the n-type high concentration layer. According to this structure, compared to the pn structure, the thickness of the element can be made thinner to obtain the same breakdown voltage, which has the advantage of reducing the forward voltage drop.

By the way, if we look at the phenomenon of reverse recovery in a diode from the movement of the carrier inside the element, (1) First, the period _ts from when the reverse current begins to flow until it reaches its peak value _IRP is equal to the pn of the diode.
(2) Also, the period t _d during which the reverse current decreases from its peak value to approximately 0 is the period from which the junction becomes depleted to when the junction reverses rotation. This corresponds to the period during which they disappear due to recombination, etc.

Generally, to increase the speed of diodes, doping with lifetime killers such as heavy metals is used. However, in this method, the carrier disappears faster by doping with a lifetime killer, which shortens the reverse recovery time t _rr and at the same time shortens the reverse blocking ability recovery time t _d . .

As mentioned above, it was not easy to increase the speed of the diode and at the same time make its characteristics soft recovery.

An object of the present invention is to provide a diode that achieves soft recovery characteristics by increasing the reverse blocking ability recovery time t _d to increase the t _d /t _s .

In order to achieve the above object, in the present invention, in a pin or pνn diode, in a low impurity concentration region provided between a p layer and an n layer,
A region of the same conductivity type and higher impurity concentration is provided so as not to be in contact with the p layer and n layer.

The present invention will be explained in detail below with reference to the drawings. FIG. 10 is a cross-sectional structural diagram of one embodiment of the present invention. In the figure, 1 is the n layer, 2 and 4 are the i
The layers 3 and 6 are an n-layer and a p-layer, respectively, and these layers are formed adjacent to each other in the order shown.

Figure 3 has the Pinin structure shown in Figure 10,
An example of the impurity concentration distribution of the diode of the present invention whose reverse recovery characteristic is so-called soft recovery is shown.

As is clear from FIGS. 3 and 10, this embodiment is characterized by providing a layer of the same conductivity type and high impurity concentration in the i-layer of the conventional pin structure diode. It's summery.

In such a structure, the high concentration impurity layer 1 of the substrate
In the region of the i-layer 2 surrounded by the high-concentration impurity layer 3 provided inside the i-layer, the adjacent high-concentration impurity layer acts as a potential barrier for carriers, so the carriers in this region are trapped. It takes on a different shape and is less likely to disappear.

Therefore, even after the pn junction reversely recovers, the rate of disappearance of carriers in the i-layer 2 region is slow, and the reverse recovery characteristic is soft recovery compared to a conventional pin structure diode.

FIG. 4 shows current waveforms during reverse recovery of a conventional pin structure diode and a diode having the structure of this embodiment. Further, FIGS. 5a and 5b are diagrams showing temporal changes in the carrier (electron) concentration distribution inside the device of the conventional pin structure diode and the diode of this embodiment, respectively.

As is clear from the comparison between FIG.
A high concentration region of ×10 ¹⁷ cm ^-3 is provided, and a 5μ thick layer is provided between this high concentration region and the high concentration substrate wafer.
The structure is the same except that m i-layers are provided.

Next, with reference to FIG. 4 and FIGS. 5a and 5b, we will compare and examine the time changes in the current waveforms in both diodes and the time changes in the carrier concentration distribution inside the element.

First, at time _t1 , a considerable amount of carrier still remains in the vicinity of the pn junction in both diodes. time
It can be seen that at t ₂ , the pn junction is becoming depleted. At time _t3 , in the conventional pin diode, the pn junction is almost completely depleted, and the current waveform also reaches the peak value of the reverse current. at this point
The p-n junction has recovered.

On the other hand, at time _t3 , the degree of depletion of the pn junction in the diode of this example is somewhat small.
This is due to the n layer provided in the i layer where the depletion layer stops.
This is because the impurity concentration of the type high concentration layer 3 is lower than that of the n type high concentration layer of a conventional pin diode, and the depletion layer spreads more easily.

At time _t4 , the reverse current in the conventional pin diode begins to decrease, and the residual carriers inside the i-layer rapidly decrease. On the other hand, it can be seen that in the diode of this example, the pn junction is almost completely depleted at this time, and the junction is recovered.

On the other hand, the n-type high concentration layer 3 and the n-type high concentration layer 3 of this embodiment
The change in the carrier concentration in the i-layer 2 sandwiched between the shaped substrate 1 is small, and at this point, a large amount of carrier remains. That is, since the n-type high concentration layer 3 forms a potential barrier against holes, carriers are confined, and electrons also satisfy the neutrality condition, so that the concentration distribution is approximately the same.

At time _t5 , the reverse current in the conventional pin diode has become almost zero. On the other hand, in the diode of this embodiment, while the carriers in the i-layer 4 adjacent to the p-layer 6 have almost disappeared, there are still many carriers in the i-layer 2 adjacent to the n-type substrate 1. It remains. Therefore, the degree of current reduction is
It is gentler than a pin diode.

As seen above, the diode having the structure of this embodiment has soft recovery characteristics compared to the conventional pin structure diode.

Incidentally, among the various characteristics of a diode, another important characteristic is forward voltage drop. 6th
The figure shows actual measurements showing the forward voltage-current characteristics of a diode with the impurity concentration distribution shown in Figures 5a and 5b, and a diode in which the impurity concentration in region 3 is 1 x 10 ¹⁶ cm ^-3 in Figure 5b. This is an example.

In Figure 6, curve 1 is for a conventional pin diode, and curves 2 and 3 are for the case where the impurity concentration in region 3 shown in Figure 3 is 1 x 10 ¹⁶ cm ^-3 and 1 x 10 ¹⁷ cm ^-3, respectively. It is showing. Note that the junction area of the element in this case is 0.16 cm ² .

As can be seen from this figure, the higher the impurity concentration in region 3, the greater the forward voltage drop for the same current (density), but the difference is about 0.03V at most. In this way, even with a structure in which a highly impurity layer 3 of the same conductivity type is added to the i-layer of a conventional pin diode, the forward voltage drop increases only slightly.

Now, with reference to FIG.
A method for manufacturing a diode with the structure shown in Figure) will be described.

First, the wafer diameter is 75 mm, the thickness is 300 μm, and the resistivity is
An n-type silicon mirror substrate wafer 1 of 0.01 Ωcm (impurity concentration 5×10 ¹⁸ cm ^-3 ), plane orientation (111), and off-angle of 1 to 2 degrees is prepared (FIG. 4A).

On one side of this mirrored wafer, an n-type high resistance layer, i.e., i-layer 2 (100Ωcm, 5×10 ¹³ cm ^-3 ), is formed with a thickness of
Epitaxial growth is performed by 5 μm (Figure b).
This epitaxially grown layer is made of, for example, SiHCl ₃ ,
Using silicon raw material PH ₃ as dopant raw material, H ₂
It is obtained by reacting at 1100° C. for about 8 minutes in a vacuum chamber.

Next, on the same epitaxially grown surface, an n-type low resistance layer 3 (0.25Ωcm, 1×10 ¹⁷ cm ^-3 ) is formed.
is epitaxially grown to a thickness of 2 μm (Figure c). This manufacturing method is similar to the epitaxial growth of the i-layer 2, using PH ₃ as a dopant raw material.
All you have to do is change the concentration ratio of SiHCl ₃ and silicon raw material.

Furthermore, a third n-type epitaxial layer 4 is grown on top of this (d in the same figure). The resistivity of this layer 4 is
Like the first epitaxial layer, it has a resistance of 100 Ωcm and a thickness of 11 μm.

Next, an oxide film 5 of about 0.1 μm is formed on the wafer surface. Subsequently, boron is ion-implanted through the oxide film 5 to form the p emitter layer 6 (see e in the same figure). The accelerating voltage in this case is
150KeV, the dose is about 1×10 ¹² cm ^-2 .

After this, by performing annealing in nitrogen at 1100℃ for 600 minutes, the surface concentration was approximately 1×10 ¹⁶ cm.
^-3 , a p emitter layer 6 with a depth of about 1 μm is formed (f in the same figure).

Al electrodes 7 (thickness 4 μm) were formed on the silicon wafers that had been bonded and formed in this way by vacuum evaporation and photoetching techniques (g in the same figure), and the wafers were divided into chips of 4 mm square for the actual process. The example element is completed.

FIG. 8 is a diagram showing an impurity concentration distribution in another example of the present invention. This structure consists of substrate wafer 1 and p
A plurality of high concentration layers are provided in the i-layer between the emitter layers 6 to reduce the forward voltage drop. In this case, as is clear from the figure, it is preferable that the layer farther from the p-type region has a higher impurity concentration.

FIG. 9 is also a diagram showing the impurity concentration distribution of another example of the present invention. In this example, the i-layer and the high concentration layer provided in the i-layer are formed by continuous epitaxial growth, and the manufacturing process is simplified.

Because epitaxial growth is performed continuously, the boundaries between each impurity layer are not step-like.
In terms of element performance, there is no major difference from the basic form of the present invention (FIG. 3).

All of the above embodiments have a structure in which a junction is formed on an n-type silicon substrate, but even if a p-type silicon substrate is used and the junction is formed symmetrically, the effects of the present invention will still work. Needless to say, the effect remains the same. Note that it is clear that the high impurity concentration layer formed on the low impurity concentration layer does not necessarily need to be provided over the entire cross section of the diode, and that a certain effect can be obtained even if it is provided on a part of the cross section.

[Brief explanation of the drawing]

Figure 1 shows the voltage and current waveforms during reverse recovery of the diode, and the definitions of t _s , t _d , and t _rr (reverse recovery time). Figure 2 shows the impurity concentration distribution of a conventional pin structure diode. , Fig. 3 is a diagram showing the impurity concentration distribution in one embodiment of the present invention, Fig. 4 is a diagram showing a comparison of current waveforms during reverse recovery of a conventional pin diode and a diode of the present invention, and Fig. 5 a, b is an impurity concentration distribution diagram showing time changes in the carrier (electron) concentration distribution of each diode shown in Figure 4, and Figure 6 is a comparison of the forward voltage-current characteristics of the conventional pin diode and the diode of the present invention. 7 is a process diagram showing a method for manufacturing a diode of the present invention, FIGS. 8 and 9 are diagrams showing impurity concentration distributions in other embodiments of the present invention, and FIG. It is a figure showing the cross-sectional structure of an example. DESCRIPTION OF SYMBOLS 1...Substrate wafer, 2...High resistance epitaxial layer, 3...Low resistance epitaxial layer, 4...High resistance epitaxial layer, 6...P emitter layer, 7
...Al electrode.

Claims (1)

[Claims] 1. In a diode consisting of a p-type impurity concentration region, an adjacent n-type impurity concentration region, and a low impurity concentration region interposed between the two regions, the same conductivity as the p-type impurity concentration region is present in the low impurity concentration region. 1. A diode characterized in that at least one region of high impurity concentration is formed. 2. A patent claim characterized in that each impurity concentration in a plurality of high impurity concentration regions formed within a low impurity concentration region is such that the further the region is from a region of the opposite conductivity type, the higher the impurity concentration. A diode according to item 1 in the range of .