JPH0339722A - Image display device - Google Patents

Image display device

Info

Publication number
JPH0339722A
JPH0339722A JP1173020A JP17302089A JPH0339722A JP H0339722 A JPH0339722 A JP H0339722A JP 1173020 A JP1173020 A JP 1173020A JP 17302089 A JP17302089 A JP 17302089A JP H0339722 A JPH0339722 A JP H0339722A
Authority
JP
Japan
Prior art keywords
film
oxide film
silicon oxide
loading capacity
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1173020A
Other languages
Japanese (ja)
Inventor
Eiji Fujii
英治 藤井
Koji Senda
耕司 千田
Fumiaki Emoto
文昭 江本
Akira Nakamura
晃 中村
Atsuya Yamamoto
敦也 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP1173020A priority Critical patent/JPH0339722A/en
Publication of JPH0339722A publication Critical patent/JPH0339722A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

PURPOSE:To secure a large loading capacity and to maintain information despite of a miniaturized picture element by forming a thin film which has greater permittivity than a silicon oxide film and a gate, on a part of polysilicon of a thin film transistor constituted of the gate, the silicon oxide film and the polysilicon. CONSTITUTION:After a positive polysilicon film 12 is placed on a quartz substrate 11, the film is insularly formed by etching, and impurity ions are implented into a part becoming loading capacity. After the silicon oxide film 13 is formed as a gate oxide film, the silicon oxide film 13 for the only part of the loading capacity is removed. Then, a silicon nitride film 15 is formed, the film except for the part of the loading capacity is removed and a gate polysilicon film 14 is piled up. Under this constitution, the loading capacity size is ten times as large as a normally constituted picture element. Although the picture element capacity is declined accompanied by the miniaturization of the picture element, the great loading capacity is secured, and thereby, the maintained information is never leaked by a leak current.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は−像表示装置に関するものである。[Detailed description of the invention] (Industrial application field) The present invention relates to an image display device.

(従来の技術) 近年、液晶デイスプレィは、ポケットサイズTVに用い
られるなど、すでに実用段階にある。特に画質の点から
考えると、画素の一つ一つに薄膜トランジスタ(以下、
TPTと略す)スイッチを設けたアクティブマトリック
ス型が優位であり、スイッチTPTの特性、特にリーク
電流を減少させる研究が行われている。
(Prior Art) In recent years, liquid crystal displays are already in practical use, as they are used in pocket-sized TVs. Especially from the point of view of image quality, each pixel is equipped with a thin film transistor (hereinafter referred to as
The active matrix type with a switch (abbreviated as TPT) is dominant, and research is being conducted to reduce the characteristics of the switch TPT, especially the leakage current.

第3図に従い、従来の液晶表示素子の画素部について説
明する。第3図(、)は平面図、第3図(b)は第3図
(a)のB−B’の断面図である。同図において、31
は石英基板、32は能動ポリシリコン膜、33はシリコ
ン酸化膜、34はゲートのポリシリコン膜、35は層間
絶縁膜、36はアルミ配線、37はクロム屯極、38は
コンタクトホールであり、39は透明電極である。
Referring to FIG. 3, a pixel portion of a conventional liquid crystal display element will be explained. 3(a) is a plan view, and FIG. 3(b) is a sectional view taken along line BB' in FIG. 3(a). In the same figure, 31
is a quartz substrate, 32 is an active polysilicon film, 33 is a silicon oxide film, 34 is a gate polysilicon film, 35 is an interlayer insulating film, 36 is an aluminum wiring, 37 is a chrome plate, 38 is a contact hole, 39 is a transparent electrode.

第3図に示すように、従来はゲートポリシリコン膜34
と能動ポリシリコン膜32との間のゲート酸化膜である
シリコン酸化膜33を使って付加容量を構成する画素構
造がしばしばとられてきた。
As shown in FIG. 3, conventionally, a gate polysilicon film 34
A pixel structure has often been adopted in which an additional capacitance is formed using a silicon oxide film 33, which is a gate oxide film between the active polysilicon film 32 and the active polysilicon film 32.

(発明が解決しようとする課題) 上記、従来の画素表示装置では1画素数の増大とともに
画素サイズが小さくなると、負荷容量も小さくなり、液
晶に書き込まれた情報がTPTのノーク電流によって放
電されるため、画素部での情報の保持が困難となる。ま
た、負荷容量を増加するために、シリコン酸化膜を薄く
すると、能動ポリシリコン膜とゲートポリシリコン膜と
の間の導通が悪くなる欠点があった。
(Problems to be Solved by the Invention) As mentioned above, in the conventional pixel display device, as the number of pixels increases and the pixel size decreases, the load capacity also decreases, and the information written in the liquid crystal is discharged by the TPT nok current. Therefore, it becomes difficult to retain information in the pixel portion. Furthermore, if the silicon oxide film is made thinner in order to increase the load capacity, there is a drawback that conduction between the active polysilicon film and the gate polysilicon film becomes poor.

本発明の目的は、従来の欠点を解消し、大なる負荷容量
をもった画像表示装置を提供することである。
SUMMARY OF THE INVENTION An object of the present invention is to eliminate the conventional drawbacks and provide an image display device with a large load capacity.

(課題を解決するための手段) 本発明の画像表示装置は、ゲート、シリコン酸化膜、ポ
リシリコンで構成される薄膜トランジスタの、ポリシリ
コンの少なくとも一部の上に、シリコン酸化膜よりも大
なる誘電率をもつ薄膜とゲートが形成されているもので
ある。
(Means for Solving the Problems) The image display device of the present invention has a thin film transistor including a gate, a silicon oxide film, and a polysilicon. A gate is formed with a thin film with a certain ratio.

(作 用) 上記構成により、画素の負荷容量の大きさは。(for production) With the above configuration, the size of the pixel load capacitance is as follows.

薄膜の誘電率をεいシリコン酸化膜の、1#電率をε、
とすれば、同一膜厚1面積で比較してε、/ε95倍と
なる。したがって1画素の小型化にともない、液晶の容
量が低下しても保持情報は負荷容量にたくわえられるの
で、TPTのリーク電流によって保持情報がもれること
はない。
The dielectric constant of the thin film is ε, and the 1# electric constant of the silicon oxide film is ε,
If so, it becomes ε,/ε95 times compared with one area of the same film thickness. Therefore, even if the capacitance of the liquid crystal decreases with the miniaturization of one pixel, the held information is stored in the load capacitance, so that the held information will not be leaked due to leakage current of the TPT.

(実施例) 本発明の一実施例を第1図および第2図に基づいて説明
する。
(Example) An example of the present invention will be described based on FIGS. 1 and 2.

第1図(a)は本発明の画像表示装置の平面図であり、
第を図(b)は第1図(a)のA−A’の断面図である
。第2図は第1図を形成するプロセス・フローである。
FIG. 1(a) is a plan view of the image display device of the present invention,
Figure 1 (b) is a sectional view taken along line AA' in Figure 1 (a). FIG. 2 is a process flow forming FIG.

第1図、第2図において、11は石英基板、12は能動
ポリシリコン膜、13はシリコン酸化膜、 14はゲー
トポリシリコン膜、15はシリコン窒化膜、16は層間
絶縁膜、 17はアルミ配線、 18はクロム電極、1
9はコンタクトホール、20は透明電極であり、21は
不純物イオンである。
In FIGS. 1 and 2, 11 is a quartz substrate, 12 is an active polysilicon film, 13 is a silicon oxide film, 14 is a gate polysilicon film, 15 is a silicon nitride film, 16 is an interlayer insulating film, and 17 is an aluminum wiring. , 18 is a chromium electrode, 1
9 is a contact hole, 20 is a transparent electrode, and 21 is an impurity ion.

次に第1図を形成するまでのプロセスを第2図に基づい
て説明する。石英基板11上に能動ポリシリコン膜12
を2000Å程度堆積したのち、エツチングにより、島
状に形成する。次に負荷容量となる部分に不純物イオン
21を注入する(第2図(a))。
Next, the process up to the formation of FIG. 1 will be explained based on FIG. 2. Active polysilicon film 12 on quartz substrate 11
After depositing about 2000 Å, it is etched to form an island shape. Next, impurity ions 21 are implanted into the portion that will become the load capacitance (FIG. 2(a)).

次にゲート酸化膜としてシリコン酸化膜13を1300
人程度形成したのち、負荷容量の部分だけ、シリコン酸
化膜13を除去する(第2図(b))。次にLPCVD
法を用いてシリコン窒化膜15を500人程形成成し、
負荷容量の部分以外を除去する(第2図(C))。さら
に、ゲートポリシリコン膜14を堆積したのち(第2図
(d))、通常の画像表示装置プロセスを用いて第1図
に示す構造を形成する。
Next, a silicon oxide film 13 with a thickness of 1300 mm is used as a gate oxide film.
After forming the silicon oxide film 13, only the portion corresponding to the load capacitance is removed (FIG. 2(b)). Next, LPCVD
About 500 people formed a silicon nitride film 15 using the method,
Remove the parts other than the load capacity (Fig. 2 (C)). Furthermore, after depositing a gate polysilicon film 14 (FIG. 2(d)), the structure shown in FIG. 1 is formed using a normal image display process.

第1図のような構成とすれば、負荷容量の大きさは1通
常の構成の画素の約10倍となる。したがって、画素の
小型化にともない画素容量が低下しても、大きな負荷容
量を確保できるので、TPTのリーク電流によって保持
情報がもれることはない。したがって、高画質を確保す
ることができる。
If the structure is as shown in FIG. 1, the load capacitance will be about 10 times that of a pixel with a normal structure. Therefore, even if the pixel capacitance decreases as the pixel becomes smaller, a large load capacitance can be ensured, so that retained information will not be leaked due to leakage current of the TPT. Therefore, high image quality can be ensured.

なお、シリコン窒化膜のかわりに、5iON。Note that 5iON is used instead of the silicon nitride film.

Ta、○、、A#20..Tie2.Sm2O3,5r
TiO,。
Ta,○,,A#20. .. Tie2. Sm2O3,5r
TiO,.

BaTa、O,などのシリコン酸化膜よりも大なる誘電
率をもつ薄膜を用いても同様な効果が得られる。
A similar effect can be obtained by using a thin film such as BaTa, O, etc., which has a dielectric constant greater than that of a silicon oxide film.

(発明の効果) 本発明によれば、大なる負荷容量を確保することができ
1画素が小型になっても情報の保持を保証することがで
き、その実用上の効果は大である。
(Effects of the Invention) According to the present invention, a large load capacity can be ensured and information retention can be guaranteed even if one pixel becomes small, and its practical effects are great.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)は本発明の一実施例における画像表示装置
の平面図、第工図(b)は同断面図、第2図は第1図を
形成するプロセス・フロー、第3図(a)、 (b)は
従来の画像表示装置の平面図と断面図である。 11・・・石英基板、12・・・能動ポリシリコン膜、
13・・・シリコン酸化膜、14・・・ゲートポリシリ
コン膜、15・・・シリコン窒化膜、16・・・層間絶
縁膜、17・・・アルミ配線、 18・・・ クロム電
極、19・・・コンタクトホール、20・・・−透明電
極。 21・・・不純物イオン。
FIG. 1(a) is a plan view of an image display device according to an embodiment of the present invention, FIG. 2(b) is a sectional view thereof, FIG. a) and (b) are a plan view and a cross-sectional view of a conventional image display device. 11... Quartz substrate, 12... Active polysilicon film,
13... Silicon oxide film, 14... Gate polysilicon film, 15... Silicon nitride film, 16... Interlayer insulation film, 17... Aluminum wiring, 18... Chrome electrode, 19... - Contact hole, 20...-transparent electrode. 21... Impurity ion.

Claims (1)

【特許請求の範囲】[Claims] ゲート、シリコン酸化膜、ポリシリコンで構成される薄
膜トランジスタの、前記ポリシリコンの少なくとも一部
の上に、前記シリコン酸化膜よりも大なる誘電率をもつ
薄膜と、前記ゲートが形成されていることを特徴とする
画像表示装置。
In a thin film transistor composed of a gate, a silicon oxide film, and polysilicon, a thin film having a dielectric constant greater than that of the silicon oxide film and the gate are formed on at least a portion of the polysilicon. Characteristic image display device.
JP1173020A 1989-07-06 1989-07-06 Image display device Pending JPH0339722A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1173020A JPH0339722A (en) 1989-07-06 1989-07-06 Image display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1173020A JPH0339722A (en) 1989-07-06 1989-07-06 Image display device

Publications (1)

Publication Number Publication Date
JPH0339722A true JPH0339722A (en) 1991-02-20

Family

ID=15952721

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1173020A Pending JPH0339722A (en) 1989-07-06 1989-07-06 Image display device

Country Status (1)

Country Link
JP (1) JPH0339722A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007108513A (en) * 2005-10-14 2007-04-26 Koninkl Philips Electronics Nv Liquid crystal display device and manufacturing method thereof
JP2008151826A (en) * 2006-12-14 2008-07-03 Epson Imaging Devices Corp Liquid crystal display device and manufacturing method thereof
US9443455B2 (en) 2011-02-25 2016-09-13 Semiconductor Energy Laboratory Co., Ltd. Display device having a plurality of pixels

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007108513A (en) * 2005-10-14 2007-04-26 Koninkl Philips Electronics Nv Liquid crystal display device and manufacturing method thereof
JP2008151826A (en) * 2006-12-14 2008-07-03 Epson Imaging Devices Corp Liquid crystal display device and manufacturing method thereof
US9443455B2 (en) 2011-02-25 2016-09-13 Semiconductor Energy Laboratory Co., Ltd. Display device having a plurality of pixels

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