JPH0339849U - - Google Patents

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Publication number
JPH0339849U
JPH0339849U JP10052989U JP10052989U JPH0339849U JP H0339849 U JPH0339849 U JP H0339849U JP 10052989 U JP10052989 U JP 10052989U JP 10052989 U JP10052989 U JP 10052989U JP H0339849 U JPH0339849 U JP H0339849U
Authority
JP
Japan
Prior art keywords
eyelets
connects
strip plate
punched
row
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10052989U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10052989U priority Critical patent/JPH0339849U/ja
Publication of JPH0339849U publication Critical patent/JPH0339849U/ja
Pending legal-status Critical Current

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  • Packaging Frangible Articles (AREA)

Description

【図面の簡単な説明】
第1図a,bは本考案の一実施例を示す平面図
、側面図、第2図a,bは従来のダイオードの組
立てに用いる半導体用ヘツダの一例を示す平面図
、断面図、第3図はキヤリアテープでヘツダを搬
送する状態の一例を示す側面図である。 1……アイレツト、2,3……リード、6……
主フレーム、7……連結フレーム。なお、各図中
同一符号は同一または相当する部分を示す。

Claims (1)

    【実用新案登録請求の範囲】
  1. 帯状板に深絞り加工により等間隔に一列に複数
    個のアイレツトを設け、該帯状板の上記アイレツ
    トを連結する部分を打抜き加工により上記複数個
    のアイレツトを一体に連結するリードフレーム状
    に加工し、上記各アイレツトにそれぞれ所要のリ
    ードを取付けた半導体用ヘツダ。
JP10052989U 1989-08-30 1989-08-30 Pending JPH0339849U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10052989U JPH0339849U (ja) 1989-08-30 1989-08-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10052989U JPH0339849U (ja) 1989-08-30 1989-08-30

Publications (1)

Publication Number Publication Date
JPH0339849U true JPH0339849U (ja) 1991-04-17

Family

ID=31649535

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10052989U Pending JPH0339849U (ja) 1989-08-30 1989-08-30

Country Status (1)

Country Link
JP (1) JPH0339849U (ja)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5314566A (en) * 1976-07-26 1978-02-09 Hitachi Ltd Assembling method of cap sealed type semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5314566A (en) * 1976-07-26 1978-02-09 Hitachi Ltd Assembling method of cap sealed type semiconductor device

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