JPH0340606A - Mode setting circuit for logic lsi - Google Patents

Abstract

PURPOSE:To save number of pins of a logic LBI or to make the size small by incorporating most of a mode setting circuit in the logic LSI and connecting a simple time constant setting circuit to one external terminal. CONSTITUTION:A pulse oscillator 11 is incorporated in general in a logic LSI and an AND gate 12, an n-adic counter 13, a decoder 14 and a monostable multivibrator 16 are incorporated newly to this mode setting circuit. The said circuits and an RC time constant setting circuit 18 connecting to an external terminal 17 constitute the LSI mode setting circuit. Thus, the time constant of the time constant setting circuit 18, that is, a resistance of a resistor R or a capacitance of a capacitor C is varied to select a mode signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a mode setting circuit for a logic LSI used in electronic devices and the like.

[Conventional technology and its problems]

The number of bins (the number of external terminals) of a logic LSI varies depending on the manufacturer, but is set to 44, 60, 80, etc., and a logic LS with any other number of bins cannot be selected.

Therefore, when manufacturing electronic devices, for example, if there is a 61-pin logic LSI, I would like to use it, but since such a device is not commercially available, I am forced to choose an expensive and large-sized 80-bin logic LSI. I didn't get it.

In addition, mode settings for logic LSIs include assigning one bit, or one external terminal (pin), to one mode.
In order to select and determine n modes, n bits and n terminals are used.

Therefore, it is not always possible to secure as many setting terminals as the required number of modes, and when this is not possible, an expensive and large logic LSI must be used as described above.

[Problems to be Solved by the Invention] An object of the present invention is to provide a mode setting circuit that can perform multiple mode settings with a single external terminal, that is, a mode setting circuit that allows the number of bins of a logic LSI to be reduced or miniaturized. The challenge is to

[Means to solve problems]

In order to solve the above problems, the present invention incorporates most of the mode setting circuit into a logic LSI so that the required mode can be set simply by connecting a simple time constant setting circuit to one external terminal. It is something.

That is, the first invention includes a pulse oscillator and a monostable multivibrator, an n-ary counter that counts AND signals of the outputs of the pulse oscillator and the monostable multivibrator,
This mode setting circuit for a logic LSI includes a decoder connected to the n-ary counter, and a mode is determined by a time constant setting circuit connected to the monostable multivibrator.

In a second invention, an AND signal of the outputs of the pulse oscillator and the monostable multivibrator is input to a shift register, and a mode signal determined by the time constant setting circuit is output from the shift register.

[For production]

If the circuit other than the time constant setting circuit is built into the logic LSI (which is easy to put into practical use), and the time constant setting terminal of the monostable multivibrator is assigned to one external terminal of the logic LSI, it can be used as a mode determination terminal. Only one terminal is required, and a simple time constant setting circuit can be connected to the mode determining terminal, so logic LS
Handling of I becomes very easy, and other terminals conventionally used for mode determination can be used for other purposes.

(Embodiment) FIG. 1 shows an embodiment of the present invention, where X is a logic LSI and 17 is its external terminal.

11 is a pulse oscillator that is generally incorporated in logic LSI, and AND gate 12. An n-ary counter 13° decoder 14 and a monostable multivibrator 16 are newly incorporated. These components and the RC time constant setting circuit 18 connected to the external terminal 17 constitute a mode setting circuit for the logic LSI.

Now, the internal reset signal 15 (1-RIGA signal) is sent to the pulse oscillator 11. When applied to the monostable multivibrator 16 and the n-ary counter 13, the output signal of the pulse oscillator 11 as shown in FIG. 3('b) and the monostable multivibrator 16 as shown in FIG. 3(C) are generated. The output signal is applied to the n-ary counter 13 via the AND gate 12, and a mode signal determined by the time constant setting circuit 18 is sent from the decoder 14 connected thereto.

That is, the mode signal can be selected by changing the time constant of the time constant setting circuit 18, that is, the value of the resistor R or capacitor C.

FIG. 2 shows another embodiment of the present invention, and the difference from the embodiment shown in FIG. A mode signal is obtained from 19.

[Effects of the Invention] Since the present invention newly incorporates most of the mode setting circuit into the logic LSI, it seems to be cost-intensive and expensive, but this is not a problem considering the current LSI manufacturing technology. Since the number of bins required for mode setting of logic LSIs is reduced to one pin, its industrial value is extremely large in the current situation where devices are becoming smaller.

Moreover, since the only thing connected to the external terminal 17 is the very simple time constant setting circuit 18, this is very superior compared to other possible mode setting circuits.

[Brief explanation of drawings]

1 and 2 are block diagrams of embodiments of the present invention, respectively, and FIG. 3 is a timing chart of the embodiment. X... Logic LSI 11... Pulse oscillator 12... AND gate 13... N-ary counter 14... Decoder 15... Internal reset signal 16... Monostable multivibrator 17... External Terminal 18: Time constant setting circuit 19: Shift register (Q), 9p'>q 4e -19 Logic: LS1 11: Pulse oscillator 12・・AND gate 13 ・N-ary counter 14 ・Decoder 15 ・Internal reset signal 16 ・Monostable multivibrator 17 ・External terminal 18 ・Time constant setting circuit 19 ・Shift register

Claims (2)

[Claims] (1) A pulse oscillator and a monostable multivibrator,
It comprises an n-ary counter that counts AND signals of the outputs of the pulse oscillator and the monostable multivibrator, and a decoder connected to the n-ary counter, and a mode is set by a time constant setting circuit connected to the monostable multivibrator. A logic LSI mode setting circuit characterized in that: (2) a pulse oscillator and a monostable multivibrator;
A logic L comprising a shift register that receives an AND signal of the outputs of the pulse oscillator and the monostable multivibrator as an input signal, and a mode is determined by a time constant setting circuit connected to the monostable multivibrator.
SI mode setting circuit.