JPH0341464Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an improvement of a production probe type semiconductor integrated circuit testing device, and particularly relates to an improvement of a production probe type LSI testing device.

In LSI manufacturing, once the wafer process is completed and a large number of LSIs have been formed on a semiconductor substrate, each LSI is tested using the production probe method.

Testing using this production probe method identifies defective LSIs at the completion of the wafer process, eliminates waste in processes after assembly, and provides early feedback on the characteristics and distribution of the formed LSIs to the wafer process. To improve manufacturing yield and characteristic yield by
This is done for purposes such as predicting acquisition rates by performance.

Therefore, in this test, in addition to the DC test of the LSI, the access acquisition rate, pattern sensitivity, read/write operation timing, performance in various operation modes, In order to improve test accuracy, it is strongly desired to reduce the noise carried on the power supply wiring within the test equipment during normal high-speed operation.

[Conventional technology]

As schematically shown in the longitudinal cross-sectional view of Figure 2, the production probe test equipment includes a control CPU,
An IC tester 1 equipped with a DC power supply, a pattern generation section, a pass/fail judgment section, a defective memory, etc., a test head 2 engaged with the IC tester 1, and fixed on a cover plate (base plate) 3 of the device,
A contact board 5 contacts the signal terminals and power terminals led out to the lower surface of the test head 2 through a plurality of contact terminals 4, and is fixed to the lower part of the contact board 5 via a ring insert 6 having a wiring cavity inside. , a card socket 8 in which the contact terminals 4 of the contact board 5 and the socket pins 7 are connected by wiring, and a probe card 10 having a probe needle 9 inserted into the card socket 8 via a plug pin. It consists of a stage pedestal 14 attached to the device base 12 and equipped with an X-Y movement mechanism 13, and a highly conductive vacuum chuck stage 16 supported by the stage pedestal 14 and equipped with a vertical movement mechanism 15, A board mounting part 18 has the function of sequentially bringing probe needles 9 into contact with the pads of a plurality of ICs formed on an IC board 17 fixed on a vacuum chuck stage 16 during a test. ing.

In production probe testing, to test the performance of an assembled IC,
It is necessary to apply the substrate potential derived from the prober 11 to the IC substrate 17 from its back surface.

In the conventional production probe type characteristic tests, only direct current tests and various gate operation tests were performed, so consideration was not given to high-speed operation tests that correspond to actual operations as described above. The power supply wiring for applying the substrate potential to the IC board under test, which is led out from the prober 11, is designed to sufficiently cover the moving distance in the X-Y direction of the vacuum chuck stage 16 that fixes the board under test. Then, conductive wires 23a, 23b, and 23c are connected from the substrate potential terminal 19 of the illustrated card socket 8 to the substrate potential terminal 22 on the lower surface of the vacuum chuck stage 16 via the first relay terminal 20, second relay terminal 21, etc. The connection was made through a long route inside the device.

[Problem that the invention attempts to solve]

However, in production probe testing of large-scale integrated circuit devices such as LSIs, in addition to DC testing, as mentioned above, it is necessary to perform functional testing using normal high-speed operation under bias conditions that are more severe than during normal operation. This improves the manufacturing yield, the characteristic yield, and predicts the yield by performance. Therefore, if the substrate potential wiring is routed for a long time as described above, noise will occur in the substrate potential wiring and the test accuracy will decrease. or the test may become impossible.

[Means for solving problems]

The above problem is that it is insulated from ground potential,
A conductive stage 16 on which the substrate to be tested 17 is directly placed with electrical connection thereto, and the stage 1
6 and the substrate potential terminal 31 electrically connected to the stage 1.
6, a high frequency capacitor 32 that connects the substrate potential terminal 31 and the ground terminal 33, a first probe needle 35 that applies a substrate potential to the substrate under test 17, and a first probe needle 35 that applies a substrate potential to the substrate under test 17; 17, a first conductive wire 37 that directly connects the substrate potential terminal 31 and the first probe needle 35, and a first conductive wire 37 that connects the ground terminal 33 and the second probe needle 35 directly. It has a second conductive wire 37 that directly connects the probe needle 36, and the substrate potential terminal 31, the ground terminal 33, and the high frequency capacitor 32 are mounted on a terminal plate 34 provided on the stage 16. 1. A semiconductor integrated circuit testing device comprising:

[Effect]

In other words, in the production probe type semiconductor integrated circuit testing equipment of the present invention, the LSI under test
On the side of the vacuum chuck stage that fixes the substrate,
A substrate potential terminal conductive to the stage and a ground terminal connected to the substrate potential terminal via a high frequency capacitor are provided, and the substrate potential wiring led out from the prober section is connected directly to the substrate potential terminal over the shortest possible distance. By connecting, the noise generated by the high frequency current flowing through the wiring is reduced to the substrate potential wiring, and the grounding potential for measurement derived from the test head is applied to the grounding terminal by the wiring connection. Accordingly, the function of the high-frequency capacitor is intended to quickly smooth out the noise riding on the substrate potential wiring.

In this way, it becomes possible to perform functional tests using the LSI production probe method with high accuracy.

〔Example〕

The present invention will be specifically explained below with reference to an embodiment shown in FIG.

In the figure, a represents the production of the present invention.
FIG. 2 is a schematic vertical cross-sectional view showing an embodiment of a probe-type LSI test device, and b and c are a plan view and a side view of a substrate potential terminal and a ground terminal portion provided on the same vacuum chuck stage.

In this figure, the same objects having the same structure as the conventional one are indicated by the same reference numerals as in FIG. 2.

As shown in FIG. 1a, in the LSI testing apparatus of the present invention, a highly conductive vacuum chuck stage 16 is insulated from the ground potential.
A terminal board 34 is provided with a substrate potential terminal 31 electrically connected to the stage 16 and a ground terminal 33 electrically separated from the stage 16 and connected to the substrate potential terminal 31 via a high frequency capacitor 32. A substrate potential pin 3 which is fixed and arranged in the card socket 8 is connected to the substrate potential terminal 31 and the ground terminal 33.
5 or a substrate potential terminal (not shown) derived from the substrate potential pin 35 and a ground potential pin 36 or a ground potential terminal (not shown) derived from the ground potential pin 36 are connected to the first conductive wire 3 , respectively.
7 or a second conductive line 38 over the shortest possible distance. Note that the first and second
The conductive wires may be integrated in a coaxial manner.

FIGS. 1b and 1c are a plan view and a side view showing an embodiment of the terminal plate 34 and its fixing portion.

The terminal board 34 has a base body 41 formed of a metal with good electrical conductivity such as copper, and the base body 41 includes a mounting portion 42 that curves along the side surface of the vacuum chuck stage 16 and a shelf portion 43 that supports the terminal. It is made up of

The terminal board 34 has an insulating plate 45 having two highly conductive patterns 44a and 44b made of gold or the like on its upper surface fixed to the shelf part 43 by conductive screws 46 and 47. pattern 4
A connector terminal 48a is soldered onto the conductive pattern 4a, and a connector terminal 48b is soldered onto the conductive pattern 44b, and a high frequency capacitor 32 of approximately several pF is soldered between the conductive pattern 44a and the conductive pattern 44b. It's been a long time since I've been in the middle of a long time.

Either one of the conductive patterns, for example 4
4a is formed to extend to the insertion part of the screw 46,
On the other hand, for example, when the insulating plate 45 is fixed with the screws 46 and 47, the conductive pattern 44a is electrically connected to the stage, and the conductive pattern 44b is separated from the stage.

In the above embodiment, the terminal plate 34 is attached to the side surface of the vacuum chuck stage 16 with screws 49 and 5.
0, 51, and 52, and the board potential pin 3 of the card socket 8 is connected to the connector terminal 48a.
A first conductive wire 37 led out from the ground pin 36 of the card socket 8 is also connected to the connector terminal 48b.
A second conductive line 38 led out from is connected over the shortest possible distance. Therefore, as the substrate potential line becomes shorter, noise is less likely to be picked up. In addition, since the substrate potential line is connected to the ground terminal via a capacitor on the terminal board very close to the substrate, noise on the substrate potential line from the substrate side can be immediately smoothed out during high-speed operation tests. As described above, in this example, the synergistic effect of the two configurations of making the substrate potential line as short as possible and grounding this substrate potential line via a capacitor as close to the substrate as possible reduces noise during high-speed operation tests. can be reduced.

[Effect of idea]

As explained above, the production of this invention
In a probe-type semiconductor integrated circuit testing device, a substrate potential terminal and a ground terminal are arranged on the side of a conductive stage that fixes the board under test, and the substrate potential wiring led out from the prober section is connected to the By connecting directly to the substrate potential terminal, the length of the substrate potential wiring, which was conventionally about 80 cm, can be shortened to 30 cm or less, so the noise generated in the substrate potential wiring is significantly reduced.

In addition, in the structure of the present invention, the substrate potential is applied from the entire back surface of the board under test via the board potential terminal and the conductive stage, so the width of the distribution of the board potential that occurs within the board under test can be kept extremely small. .

Furthermore, in the structure of the present invention, a ground potential for measurement is supplied to the ground terminal, and the ground potential and the substrate potential are short-circuited using a high-frequency capacitor in the vicinity of the test board. The high frequency noise generated inside the board during operation tests is
It is quickly removed to the ground potential line side via the conductive stage, substrate potential terminal and high frequency capacitor,
The substrate potential is smoothed.

Therefore, according to the present invention, it is possible to accurately perform a functional test during high-speed operation using the production probe method of a large-scale semiconductor integrated circuit testing device such as an LSI.

[Brief explanation of drawings]

Fig. 1a is a schematic vertical cross-sectional view showing an embodiment of the production probe type LSI testing device of the present invention, and Figs. 1b and c are the substrate potential terminal and ground terminal portion provided on the same vacuum chuck stage. FIG. 2 is a schematic vertical cross-sectional view of a conventional production probe test device. In the figure, 8 is a card socket, 16 is a vacuum chuck stage, 31 is a substrate potential terminal, 32 is a high frequency capacitor, 33 is a ground terminal, 34 is a terminal board, 35 is a substrate potential pin, 36 is a ground potential pin,
37 and 38 are conductive wires, 41 is a terminal board base, 42 is a mounting part, 43 is a shelf part, 44a and 44b are highly conductive patterns, 45 is an insulating plate, 46, 47,
49, 50, 51, 52 are screws, 48a, 48b
indicates a connector terminal.

Claims (1)

[Scope of claim for utility model registration] The board under test 17 is insulated from the ground potential.
A conductive stage 16 is placed directly in a state where it is electrically connected to the conductive stage 16, and a substrate potential terminal 31 is electrically connected to the stage 16.
a grounding terminal 33 insulated from the stage 16; a high-frequency capacitor 32 connecting the substrate potential terminal 31 and the grounding terminal 33; a first probe needle 35 applying a substrate potential to the substrate under test 17; a second probe needle 36 that applies a ground potential to the substrate under test 17; the substrate potential terminal 31 and the first probe needle 35;
a first conductive wire 37 that directly connects the ground terminal 33 and the second probe needle 36, and a second conductive wire 37 that directly connects the ground terminal 33 and the second probe needle 36; The ground terminal 33 and the high frequency capacitor 32 are connected to the stage 16.
1. A semiconductor integrated circuit testing device, which is placed on a terminal plate 34 provided in a semiconductor integrated circuit.