JPH0341683A - editing device - Google Patents

Abstract

PURPOSE:To attain the editing without editing point error by writing and storing the reproduced output of a 1st reproducing device sequentially, reading the content of a memory device sequentially from an address storing a 1st editing point and using the read content as an input to a 2nd recording and reproducing device. CONSTITUTION:The reproducing output of a 1st reproducing device 101 applying the reproduction of a 1st recording medium set with a 1st editing point is written and stored sequentially in a memory device 104 and a 2nd recording and reproducing device 102 is in the recording state when a 2nd editing point is reproduced and the content of the memory device 104 is read sequentially from the address stored with the 1st editing point and recorded. Thus, the read of a RAM is started from the address stored with the editing position of a master set when the editing position of a slave set arrives and recorded by the slave set and the editing with high accuracy without editing point error is attained independently of the presence of phase adjustment.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an editing device that records a playback output from a predetermined position of a first playback device from a predetermined position of a second recording/playback device.

Conventional technology The playback output from the first editing point of a certain magnetic playback device (hereinafter referred to as the master device) is already recorded from the second editing point of another recording and playback device (hereinafter referred to as the slave device). Editing devices that record continuously on tracks, especially those used for broadcasting, are required to have edit point accuracy on a frame-by-frame or field-by-field basis. Servo is used.

Such an editing device is disclosed in Japanese Patent Application Laid-open No. 81-3350 and Japanese Patent Application Laid-Open No. 31-80543, and belongs to the known technology. It compares the time code signals of the master unit and slave unit, detects the relative positional deviation between the tapes of both machines as the number of frames, obtains a phase adjustment command, and sends this harmonization command to the tape speed control means of the slave unit. Control is performed to eliminate deviations in relative position.

Problems to be Solved by the Invention However, such electronically controlled, quasi-mechanical editing devices cannot avoid editing point errors of several frames.

SUMMARY OF THE INVENTION An object of the present invention is to provide an editing device capable of editing without an editing point error, regardless of the presence or absence of phase modulation.

Means for Solving the Problems The invention of claim 1 of the present application provides a first playback device that plays back a first recording medium in which a first editing point is set, and a first playback device in which a second editing point is set. A second recording medium for recording and reproducing the second recording medium.
a memory device that sequentially writes and stores the playback output of the first playback device and reads out the stored contents as input to the second recording and playback device; A first playback device and a second recording/playback device are put into a playback state, and the first editing point of the first recording medium is played back before the second editing point of the second recording medium, and the The second recording and reproducing device is put into a recording state from the time when the second editing point is reproduced, and the contents of the memory device are controlled to be sequentially read and recorded from the address where the first editing point is stored. a system control means; a memory control means for controlling writing and reading of the memory device according to an output of the system control means;
It is characterized by the following.

The invention according to claim 2 of the present application causes the system control means to set the first playback device and the second recording and playback device to the playback state, and change the first editing point of the first recording medium to the second editing point of the second recording medium. the second editing point, and writing starts from a predetermined address of the memory device from the time when the first editing point is played back, and from the time when the second editing point is played back. The present invention is characterized in that the second recording/reproducing device is put into a recording state, and the contents of the memory device from the predetermined location are sequentially read and recorded.

Effect With this configuration, the first editing point of the parent device (first playback device) is brought into the playback state so that the first editing point of the child device (second recording and playback device) is played back before the second editing point of the child device (second recording and playback device). The playback output of the device is sequentially written and stored in the memory device, and the child device is placed in a recording state from the time when the second editing point is played back, and the contents of the memory device are sequentially written from the address where the first editing point is stored. It can be read and recorded.

Further, writing from a predetermined address in the memory device is started from the time when the first edit point is played back, and reading from the predetermined address is started from the time when the second edit point is played back. ing.

Example Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an editing device showing a first configuration example of the present invention. This configuration example is a case where a digital magnetic recording/reproducing device is used for the master unit and the slave unit.

In FIG. 1, reference numeral 101 denotes a first magnetic reproducing device (the above-mentioned master device, and may also be a reproduction-only device) in which a first editing point a is set on a recording medium such as a magnetic tape. , and 102 is the second magnetic recording/reproducing device (the above-mentioned child device) where the second editing point is set.

The base unit 101 and slave unit 102 are connected via a memory device 104, and the system control means 103 controls the start and stop of playback and recording, and writes and stores the playback output of the base unit 101 in the memory device 104. , the stored contents are read out, input to the slave device 102, and recorded. Writing and reading of the memory device 104 is controlled by the memory control means 105, which is also controlled by the system control means 103. The system control means 103 is in charge of controlling the entire editing apparatus, and controls editing based on editing commands from the outside.

FIG. 2 is a block diagram of an editing device showing a second configuration example of the present invention. This configuration example is a case where an analog magnetic recording/reproducing device is used for the master unit and the slave unit.

In FIG. 2, 201 is a master device, 202 is a slave device, and 203 is a slave device.
2 is a system control means, 204 is a memory device, and 205 is a memory control means, each of which corresponds to the component 101 in FIG.
~105. The difference between this configuration example and the first configuration example is that the reproduction output of the base unit 101, the input/output of the memory device 104, and the input of the slave unit 102 are digital signals, whereas the base unit 201. Memory device 204 and slave device 20
2 is an analog signal, and the basic configuration remains the same.

Furthermore, as other configuration examples, when the base unit is digital and the slave unit is analog, or when the base unit is analog and the slave unit is digital, the only difference is in the input/output signal format of the memory device. There is no difference in the configuration.

3 shows the internal structure of the memory device, FIG. 3(A) shows the internal structure of the memory device 104, and FIG. 3(B) shows the internal structure of the memory device 204.

In FIG. 3, 301 is a RAM (random access memory), 302 is a latch circuit, 303 is an A/D converter (analog/digital converter), and 304 is a D/A
converter (digital/analog converter).

The input data DI is written into the RAM 301 at the address specified by the address signal AD using the write pulse WE. It also reads the contents of the address specified by the address signal AD, latches the output data DO to the latch circuit 3O2 with the latch pulse LP, and outputs it.

Note that the RAM 301 has two configurations: one with separate input and output, and one with common input and output, but in the latter case, it is necessary to perform the usual switching to prevent the input and output from colliding with each other. A
The /D converter 303 converts an analog signal into a digital signal, and the D/A converter 304 converts a digital signal into an analog signal. This A/D converter, D/A
The converter may be used depending on whether the master device and the slave device are digital devices or analog devices, and any combination is possible.

4(A) to 4(D) show the correlation between the tape and the memory showing the first embodiment of the present invention, FIG. 5 shows an example of the internal configuration of the system control means 103a and 203a, and FIG.
The figure shows an example of the internal configuration of the memory control means 105a, 205a.

In FIG. 4, 401 is the first tape to be played back by the base unit 101, and the first editing point a is set at 401.
2 is a second tape to be played back and recorded by the slave device 102, and a second editing point is set thereon. Further, 403 is a RAM 301 in the memory device 104, and the ADO-AD
The addresses up to n are used cyclically. This RAM may have a memory length equal to or longer than the period Tab from when the first editing point a is played until when the second editing point a is played back.

As shown in FIG. 5, the system control means 103 a120
3a inputs the edit command EC to the mode command section 501, issues mode commands for rewinding and starting playback to the base unit 101 and 201, and instructs the slave unit 102 and 202 to rewind, start playing and record. It issues a start mode command. The mode command section 501 includes a write command section 502 and, depending on the case, a first edit point detection section 503. A command to start reproduction is also given to the second editing point detection unit 504. The first edit point detection unit 503 receives the tape position information from the parent device 101.201, and issues a command to the load command unit 505 when it detects the first edit point a on the tape. The second edit point detection unit 504 inputs the tape position information from the slave unit 102, 202, and when the second edit point on the tape of the slave unit 102, 202 is detected, the read command unit 506 and the selection command unit 507 issue instructions to. Then, the write command unit 50
2 generates a write command WC, a load command unit 505 generates a load command LC, a continuation command unit 50B generates a read command RC, and a selection command unit 507 generates a selection command SC, and output them to the memory device 104.204. It is something to do.

Further, as shown in FIG. 6, memory control means 105a, 2
05a is a write address generation section 6011, a read address generation section 802. The address selection section 603 has a write pulse generation section 804 and a read pulse generation section 605.

The write address generating section 601 receives a write command WC, operates a write address counter, counts clock pulses CLK, and generates a write address. Note that the write address counter may be operated to count independently of the write command WC. The read address generator 602 receives the load command LC and the read command RC, operates a read address counter, and generates the output of the write address generator 601 at the time of receiving the load command LC, that is, the write address (ADa described above). This is used to load the read address counter. Then, with this load address ADa as the counting start value, from the time when the read command RC is received, the clock pulse C
It counts LK and generates a read address.

The address selection unit 803 alternately switches between a write address and a read address from the time it receives the selection command SC, and outputs it as an address signal AD.

The write pulse generator 604 is a write address generator 801
A write pulse WE is generated in synchronization with the output of. Further, the read pulse generator 605 generates a latch pulse LP in synchronization with the output of the successive address generator 602. Then, address signal AD, write pulse W
E and latch pulse LP are memory devices 104, 204
Output for.

Next, the operation of the first embodiment will be explained with reference to FIG.

When there is an editing command EC from the outside, (a) First, the system control means 103, 203 issues a tape rewind command to the master unit 101, 201 and slave units 102, 202, and the first. Second tape 401.402
is rewound by a predetermined amount from each editing point a, b.

(b) Next, the base unit 101, 201 and the slave unit 102゜20
2, and the first edit point a is played back in advance of the second edit point. Here, if the tape start-up times (referring to the time it takes for the tapes to transition from a stopped state to a normal running state) are the same, the second tape 401 is replaced by the first tape 401.
It is sufficient to start playback after a predetermined time delay from 2. If the start-up times of the two tapes are different, a playback command is issued to each machine in consideration of the difference.

(1) System control means 10 in sequence with the above-mentioned regeneration command.
3a, 203a to memory control means 105al
A write command is issued to memory device 104.205a.
Writing to the RAM 301 of 204 is started.

(1) When the system control means 103a, 203a detects the first editing point a, the memory control means 105a, 205a
Issue a load command to the write address ADa of the first edit point a.
remember.

(e) Furthermore, when the system control means 103a, 203a detects the second editing point, the memory control means 105a
, 205a, and issues a read command to the memory device 104.
, 204 is read from address ADa. At the same time, a recording command is issued to the slave unit 102 and 202 to start recording from the editing point on the tape 402. Note that from this point on, the memory devices 104 and 204 alternately repeat writing and reading, and use the RAM 301 cyclically.

As described above, tape editing from the master device to the slave device can be performed with frame or field accuracy.

7(A) to 7(D) show the correlation between the tape and the memory showing the second embodiment of the present invention, FIG. 8 shows an example of the internal configuration of the system control means 103b and 203b, and FIG. It is a diagram showing an example of the internal configuration of memory control means 105b and 205b.

In FIG. 7, 701 is the first tape to be played back by the base unit 101, and the first editing point a is set therein.
2 is a second tape to be played back and recorded by the slave device 102, and a second editing point is set thereon. Further, 703 is a RAM within the memory device 104, and addresses from ADO to ADn are used cyclically. This RAM 703 (301 in FIG. 3) has a memory length equal to or longer than the length corresponding to the period Tab from when the first edit point a is played until when the second edit point a is played back. Bye.

As shown in FIG. 8, system control means 103b.

203b inputs the editing command EC to the mode command section 8010, issues mode commands for rewinding and starting playback to the base unit 201, and instructs the slave unit 102 and 202 to rewind, start playing, and start recording. It issues a mode command. The mode command section 801 also gives a reproduction start command to the first edit point detection section 803 and the second edit point detection section 804 depending on the case, but this is not always necessary. The first edit point detection unit 803 inputs the tape position information from the master device 101.201, and issues a command to the write command unit 805 when the first edit point a on the tape 701 is detected. Second
The edit point detection unit 804 inputs the tape position information from the slave device 102.202, and when the second edit point on the tape 702 is detected, the read command unit 806 and the selection command unit 807
issue instructions to.

Then, the write command section 802 generates a write command WC, the read command section 808 generates a read command RC, and the selection command section 807 generates a selection command SC.
This is output for 4.

Further, as shown in FIG. 9, memory control means 105b, 2
05b is a write address generation section 901°, a read address generation section 902. It includes an address selection section 803, a write pulse generation section 904, and a read pulse generation section 905. The write address generation unit 901 receives a write command WC, operates a write address counter from a predetermined address ADO, counts clock pulses CLK, and generates a write address. The successive address generation unit 902 receives a read command RC, operates a successive address counter from a predetermined address ADO, counts clock pulses CLK, and generates a read address. The address selection unit 903 alternately switches between a write address and a read address from the time it receives the selection command SC, and outputs it as an address signal AD. The write pulse generator 904 generates a write pulse WE by multiplying the output of the write address generator 901 by 1υ1. Further, the read pulse generator 905 generates a latch pulse LP in synchronization with the output of the read address generator 902.
is generated. And number Jih signal AD,
Write pulse WE and latch pulse LP are output to memory devices 104 and 204.

Next, the operation of the second embodiment will be explained.

When there is an editing command EC from the outside, (a) First, the system control means 103b, 203b issues a tape rewind command to the master unit 10L201 and slave units 102, 202,
, 702 by a predetermined amount from each editing point a, b.

(b) Next, the base unit 101, 201 and the slave unit 1゜2.2
A reproduction command is issued to 02, and the first edit point a is reproduced in advance of the second edit point in terms of timing. Here, if the tape rise time of the same machine is the same,
It is sufficient to start playing the second tape 701 after a predetermined time delay from the first tape 702, and if the tape start-up times of the same machines are different, a playback command is issued to each machine taking this difference into consideration.

(1) When the system control means 103b, 203b detects the first editing point, it issues a read command to the memory control means 105, 205, and reads the RAM3 of the memory device 104,204.
Writing starts from a predetermined address (for example, ADO) at 01.

(1) Furthermore, system control means 103b, 203b
When detecting the second editing point, the memory control means 105,
A continuation instruction is issued to 205, and the contents of RAM 301 of memory device 104.204 are read from a predetermined address ADO.

Then, at the same time, a recording command is issued to slave units 102 and 202,
Recording starts from the edit point on tape 702. In addition,
From this point on, the memory device 104.204 alternately repeats writing and reading, and uses the RAM 301 cyclically.

The above enables tape editing with frame precision.

FIGS. 10(A) to 10(H) show examples of operation waveforms in the vicinity of the second editing point of the present invention.

In FIG. 10, A is a clock pulse (CLK), B is a clock pulse (CLK),
is a write address signal, C is a continuous address signal, D is a selection command (SC), E is an address switching signal, and F is an address signal (
AD), G is the write pulse (WE), H is the latch pulse (
LP).

Write address signal B is created by counting the rising edge of clock pulse A using an address counter (addresses 1001, 1002, 1003, 1004, 1005).
．． ...), the read address signal C is an example in which falling edges are counted by an address counter (address 100).
B, 1007, 1008°...). Address 1006 of read address signal C is DA in the first embodiment.
ax In the second embodiment, ADO corresponds to this. Note that the clock pulse may be counted either at the rising edge or the falling edge.

The address switching signal E is r when the selection command is rLJ.
LJ, and when it becomes "H", the same repeating signal as clock pulse A is used after the first rise of clock pulse A. When this address switching signal E is "L", the write address signal B is used, and when it is "H", the read address signal C is used as the address signal F (addresses 1001, 1002).
．． 100B.

1003, 1007.1004. 1008. 10
05, ...).

The write pulse G is the address signal F (write address 1001.10
02, 1003.
1008...) and the output data are both stable (note that both do not need to be stable, it is sufficient if at least the read data is stable).

The latch pulse H may use a rising or falling edge, or may use an "L or H" level, and either of these may be used.

Note that the address switching signal E is the same repeating signal as the clock pulse A regardless of the selection command, and the address signal F
The address is tooe, tooi, 1008.1002.1
00(3,1003,1007,1004,1008,
1005, . . . may be used. However, latch pulse H
must be created in conjunction with the selection command as shown in the figure.

Although the embodiments of the editing device of the present invention have been described above, the system control means, the memory device, and the memory control means may be configured separately from the parent device or the slave device, or may be incorporated into either one. good.

Note that one of the features of this invention is that phase adjustment between the parent unit and the slave unit can be made unnecessary, but there is no problem even if there is phase adjustment.

Further, as described above, the memory length of the RAM needs to be long enough to include at least the period Tab from the reproduction time point of the first editing point a to the reproduction time point of the second editing point I.

Effects of the Invention As described above, the present invention provides a memory device interposed between a parent device and a child device, a memory control means for controlling the memory device, and a system control means that controls the parent device and the child device. The playback of the machine is made to precede the slave machine, and the playback output of the master machine is written and stored in the RAM of the memory device, and the edit position of the master machine is changed from the time when the edit position of the slave machine (second editing point b) arrives. RA from the address where (first edit point a) is stored
This starts reading M and records it on the slave device.
Highly accurate editing without editing point errors is possible regardless of the presence or absence of phase modulation, and its industrial value is extremely large.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of the configuration of the editing device of the present invention, FIG. 2 is a block diagram showing another configuration example, FIG. 3 is a block diagram showing an example of the internal configuration of the memory device, and FIG. 4 is a block diagram showing an example of the internal configuration of the memory device. A correlation diagram between tape and memory showing the first embodiment of the present invention,
FIG. 5 is a block diagram showing an example of the internal structure of the system control means in the same embodiment, FIG. 6 is a block diagram showing an example of the internal structure of the memory control means in the same embodiment, and FIG. 7 is a block diagram showing an example of the internal structure of the system control means in the same embodiment. Correlation diagram of tape and memory showing an example,
8 is a block diagram showing an example of the internal configuration of the system control means in the same embodiment, FIG. 9 is a block diagram showing an example of the internal structure of the memory control means in the same embodiment, and FIG. 10 is a block diagram showing an example of the internal structure of the system control means in the embodiment. FIG. 7 is a waveform diagram showing an example of operation near a second editing point. 101, io2... Digital magnetic recording and reproducing device, 103.203... System control means, 10
4.204...Memory device, 105,205...
・Memory control means, 201j 202... Analog magnetic recording and reproducing device, 301, 403, 703.
・・RAM, 302 ・・Latch circuit, 30
3... A/D converter, 304... D/A converter, 401°701... First tape, 402
,702...second tape, 501,801...
・Mode command section, 502.802...Write command section,
503.803...first editing point detection unit, 50
4.804...Second editing point detection unit, 505...
・Load command section, 508.806...read command section,
507,807...Selection command section, 801,90
1...Write address generation section, 602.902...
- Continuous address generation section, 603.903...Address selection section, 604,904...Write pulse generation section,
805.905...Latch pulse generation section, 100
1-1005...Write address, 1006-1008
...read address, a...first editing point, b...
Second editing point.

Claims (2)

[Claims] (1) A first playback device that plays back a first recording medium on which a first editing point has been set, and a second playback device that plays back recording on a second recording medium on which a second editing point has been set. a recording and reproducing device, and sequentially writing and storing the reproduction output of the first reproducing device;
and a memory device for reading out the stored contents and inputting the stored contents to the second recording and reproducing device; and putting the first and second recording and reproducing devices in a reproducing state and reading out the stored contents and inputting the stored contents to the first recording medium. reproducing a first editing point before the second editing point of a second recording medium, and putting the second recording and reproducing device into a recording state from the time when the second editing point is reproduced; system control means for controlling sequential reading and recording of the contents of the memory device from the address where the first editing point is stored; and control of writing and reading of the memory device according to the output of the system control means. memory control means for
An editing device equipped with (2) The system control means puts the first playback device and the second recording/playback device into a playback state, and causes the first editing point of the first recording medium to precede the second editing point of the second recording medium. and start writing from a predetermined address of the memory device from the time when the first editing point is played back,
Claim characterized in that the second recording and reproducing device is put into a recording state from the time when the second editing point is reproduced, and the contents of the memory device from the predetermined location are sequentially read and recorded. 1. The editing device according to 1.