JPH0341711A - Laminated type electronic component - Google Patents
Laminated type electronic componentInfo
- Publication number
- JPH0341711A JPH0341711A JP1176372A JP17637289A JPH0341711A JP H0341711 A JPH0341711 A JP H0341711A JP 1176372 A JP1176372 A JP 1176372A JP 17637289 A JP17637289 A JP 17637289A JP H0341711 A JPH0341711 A JP H0341711A
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- circuit
- laminated
- external electrodes
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 34
- 238000010030 laminating Methods 0.000 claims description 5
- 239000004020 conductor Substances 0.000 abstract description 4
- 239000000919 ceramic Substances 0.000 description 4
- 230000001681 protective effect Effects 0.000 description 4
- 238000004806 packaging method and process Methods 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Landscapes
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、例えば共振子等の電子部品機能素子が形成さ
れた複数枚の基板を積層・固着してなる積層型の電子部
品の改良に関し、特に、配線構造が改良されたものに関
する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to the improvement of a laminated electronic component made by laminating and fixing a plurality of substrates on which electronic component functional elements such as resonators are formed. In particular, it relates to an improved wiring structure.
従来より、共振子やフィルタ等の電子部品機能素子が構
成された複数枚の基板を積層してなる種々の積層型電子
部品が公知である。2. Description of the Related Art Conventionally, various types of laminated electronic components are known, which are formed by laminating a plurality of substrates on which electronic component functional elements such as resonators and filters are formed.
第2図は、上述したような積層型の電子部品の一例を示
す外観斜視図である。積層型電子部品lでは、回路基板
2.3が図示しない接着剤を介して積層・固着されてお
り、その上部及び下部に保護基板4.5が同じく積層・
固着されて積層基板が構成されている0回路基板2,3
は、誘電体あるいは圧電体セラ果ソクスよりなり、基板
の一方主面または両主面に電極を形成することにより圧
電共振子やフィルタ等の電子部品機能素子が構成されて
いるものである。FIG. 2 is an external perspective view showing an example of the above-described laminated electronic component. In the laminated electronic component 1, a circuit board 2.3 is laminated and fixed via an adhesive (not shown), and protective boards 4.5 are laminated and fixed on top and bottom of the circuit board 2.3.
0 circuit boards 2 and 3 that are fixed together to form a laminated board
is made of a dielectric or piezoelectric ceramic material, and an electronic component functional element such as a piezoelectric resonator or a filter is constructed by forming an electrode on one or both main surfaces of the substrate.
各回路基板2.3に構成された電子部品機能素子は、図
示しない接続導電部により各回路基板23の端緑に、す
なわち積層基板の側面6,7に引出されている。保!!
基板4,5は、絶縁性セラミックス等よりなり、回路基
板2,3に形成された電子部品機能素子部分及び接続導
電部を保護・封止するために設けられているものである
。The electronic component functional elements configured on each circuit board 2.3 are drawn out to the edges of each circuit board 23, ie, to the side surfaces 6 and 7 of the laminated board, by connecting conductive parts (not shown). Safe! !
The substrates 4 and 5 are made of insulating ceramics or the like, and are provided to protect and seal the electronic component functional element portions and the connecting conductive portions formed on the circuit boards 2 and 3.
積層基板の側面6.7には、外部電極8a〜8jが形成
されている。各外部電極8a〜8jは、外部との電気的
接続のために設けられているものであり、上述した回路
基板2,3の端緑に引出された各接続導電部とそれぞれ
電気的に接続されている。External electrodes 8a to 8j are formed on side surfaces 6.7 of the laminated substrate. Each of the external electrodes 8a to 8j is provided for electrical connection with the outside, and is electrically connected to each of the connection conductive parts drawn out at the green ends of the circuit boards 2 and 3 mentioned above. ing.
〔発明が解決しようとする技術的課題〕従来のali型
電子部品lでは、回路基板2,3に構成された電子部品
機能素子から引出されたそれぞれの接続導電部に対応し
て、複数の外部を極8a〜8jが形成されていた。従っ
て、1枚の回路基板2,3上に構成される電子部品機能
素子が増加したり、回路基板の積層数が増加したりする
と、側面6,7に形成される外部電極数が飛躍的に増加
する。その結果、積層基板の側面において多数の外部電
極を、互いの短絡を防止するように正確に形成すること
が非常に困難となる。[Technical problem to be solved by the invention] In the conventional ALI type electronic component l, a plurality of external The poles 8a to 8j were formed. Therefore, when the number of electronic component functional elements configured on one circuit board 2, 3 increases, or the number of laminated circuit boards increases, the number of external electrodes formed on the side surfaces 6, 7 increases dramatically. To increase. As a result, it is extremely difficult to accurately form a large number of external electrodes on the side surfaces of the laminated substrate so as to prevent short circuits between them.
なお、導電ペースト等を印刷・焼付けることにより外部
電極を形成すれば、限られた領域に多数の外部電極を形
成することは比較的容易であるとも考えられる。しかし
、電子部品lが高温に晒されるにことになる。従って、
機能素子が例えば共振子やフィルタのような場合、特性
の劣化が生しるため、用いることができない。すなわち
、回路基板上に構成される電子部品機能素子の耐熱性や
回路基板の熱膨張係数等により、適用される範囲が極め
て限定されてしまう。Note that if the external electrodes are formed by printing and baking a conductive paste or the like, it is considered that it is relatively easy to form a large number of external electrodes in a limited area. However, the electronic components 1 will be exposed to high temperatures. Therefore,
If the functional element is, for example, a resonator or a filter, it cannot be used because its characteristics will deteriorate. That is, the range of application is extremely limited depending on the heat resistance of the electronic component functional element configured on the circuit board, the thermal expansion coefficient of the circuit board, etc.
また、各接続導電部のそれぞれに対応して外部電極8a
〜8jが形成されているので、実装に際しての外部との
配線作業が煩雑であり、かつ大きな実装スペースを必要
とする。従って、高密度実装に対応することが難しくな
る。Also, external electrodes 8a are provided corresponding to each of the connection conductive parts.
.about.8j are formed, wiring work with the outside during mounting is complicated and a large mounting space is required. Therefore, it becomes difficult to support high-density packaging.
本発明の目的は、外部電極の形成が容易であり、かつ高
密度実装に適しており、さらに耐熱性等に問題のある電
子部品機能素子をも構成することが可能な積層型電子部
品を提供することにある。An object of the present invention is to provide a laminated electronic component in which external electrodes can be easily formed, which is suitable for high-density packaging, and which can also be used to configure electronic component functional elements that have problems such as heat resistance. It's about doing.
〔技術的vR題を解決するための手段〕本発明の積層型
電子部品では、少なくともIの電子部品機能素子を含む
回路と、該回路を外部に引出すために基板端緑まで引出
された接続導電部とを有する複数の基板が積層・固着さ
れて、積層基板が構成されている。積層基板の外表面に
は、上記接続導電部に電気的に接続されるように、外表
面に複数の外部’を極が形成されている。そして、積N
基板の外表面の複数の外部電極のうち、少なくとも一部
の外部電極同士が互いに接続されることにより、積層基
板の外表面を利用して回路網が構成されている。[Means for solving the technical vR problem] The laminated electronic component of the present invention includes a circuit including at least I electronic component functional elements, and a connecting conductor drawn out to the green edge of the substrate in order to lead out the circuit to the outside. A laminated substrate is constructed by laminating and fixing a plurality of substrates having a plurality of parts. A plurality of external poles are formed on the outer surface of the multilayer substrate so as to be electrically connected to the connection conductive portion. And the product N
By connecting at least some of the plurality of external electrodes on the outer surface of the substrate to each other, a circuit network is configured using the outer surface of the laminated substrate.
積層基板の外表面において、外部電極間が電気的に接続
されて、回路網が構成されている。すなわち、積層基板
の内部の回路部分だけで配線が行われているだけでなく
、外表面においても配線が行われている。従って、外部
で配線する分だけ内部における回路fJI戒が容易とな
ると共に、実装に際しても外部との電気的接続作業が簡
単になり、また実装スペースを低減することも可能とな
る。On the outer surface of the laminated substrate, external electrodes are electrically connected to form a circuit network. That is, wiring is performed not only in the internal circuit portion of the multilayer substrate, but also on the outer surface. Therefore, the internal circuit fJI is made easier by the amount of external wiring, and the electrical connection work with the outside becomes easier during mounting, and the mounting space can also be reduced.
以下、本発明の一実施例を図面を参照して説明する。第
3図は、本発明の一実施例の積層型電子部品に用いられ
る積層基板の分解斜視図である。Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIG. 3 is an exploded perspective view of a multilayer substrate used in a multilayer electronic component according to an embodiment of the present invention.
本実施例では、3枚の回路基板11〜13が、図示の向
きのまま接着剤(図示せず)を介在させて4jI11・
固着されて積N基板が構成される。In this embodiment, three circuit boards 11 to 13 are 4jI11 and 4jI11 with an adhesive (not shown) interposed therebetween in the illustrated orientation.
They are fixed to form a product N substrate.
回路基vill〜13は、それぞれ、誘電体セラミック
スまたは圧電体セラミックスを焼成したもので構成され
ている。そして、各回路基Fiti〜13の一方主面ま
たは双方の主面に、電子部品機能回路14,15.16
が構成されている。第3図では、各電子部品機能回B1
4〜16については、構成されている領域のみを一点鎖
線で略図的に示している。具体的には、該−点鎖線で囲
まれた領域中に励振電極等が構成され、共振子やフィル
タあるいはコンデンサ等の種々の電子部品機能素子が少
なくとも一個構成されており、かつ回路網を構成するよ
うに相互に電気的に接続されていこの電子部品機能素子
を含む機能回路14〜16からは、それぞれ、接続導電
部17a〜17「、18a−18f及び19a 〜19
gが各回路基板11〜13の端緑まで引出されている。The circuit boards ville to 13 are each made of fired dielectric ceramics or piezoelectric ceramics. Then, the electronic component functional circuits 14, 15, 16 are provided on one or both main surfaces of each circuit board Fiti~13.
is configured. In Figure 3, each electronic component function circuit B1
Regarding Nos. 4 to 16, only the configured regions are schematically shown with dashed lines. Specifically, an excitation electrode, etc. is configured in the area surrounded by the dashed line, at least one of various electronic component functional elements such as a resonator, a filter, or a capacitor is configured, and a circuit network is configured. Connecting conductive parts 17a-17', 18a-18f and 19a-19 are electrically connected to each other so as to connect conductive parts 17a-17', 18a-18f and 19a-19, respectively.
g is drawn out to the green end of each circuit board 11-13.
回路基板11−13を積層・固着することにより、積層
基板を得ることができる。A laminated board can be obtained by stacking and fixing the circuit boards 11-13.
本実施例では、第4図に示すように、回路基板11〜1
3の積層体の上面及び下面に、さらに絶縁性セラミック
スよりなる保護基板20a、20bが接着されて、回路
基板11−13に構成された各機能回路及び接続導電部
が密封されている。In this embodiment, as shown in FIG.
Protective substrates 20a and 20b made of insulating ceramics are further bonded to the upper and lower surfaces of the laminate of No. 3, and the functional circuits and connection conductive parts formed on the circuit boards 11-13 are hermetically sealed.
そして、積層基板21の外表面に露出している各接続導
電部17a〜19gに電気的に接続されるように、複数
の外部電極が形成される。Then, a plurality of external electrodes are formed so as to be electrically connected to each of the connecting conductive parts 17a to 19g exposed on the outer surface of the laminated substrate 21.
外部電極が形成された本実施例の積層型電子部品を第1
図に斜視図で示す、第1図から明らかなように、外部電
極22a〜22gのうち、任意の部分が互いに電気的に
接続されて積層基板21の外表面においても回路網が形
成されている。すなわち、本実施例の積層型電子部品で
は、積層基板21の外表面をも利用して回路網が構成さ
れているため、各回路基板11−13内の配線をその分
だけ簡略化することが可能とされている。のみならず、
各接続導電部17a−19gが接続される外部電極同士
のうち、複数の外部電極が部品の状態で予め電気的に接
続されているため、本実施例の電子部品をプリント基板
等に実装する作業を簡略化することができると共に、プ
リント基板上の配線を簡略化することも可能となるため
、実装スペースを低減することもできる。The laminated electronic component of this example on which external electrodes were formed was
As is clear from FIG. 1, which is shown in a perspective view, arbitrary portions of the external electrodes 22a to 22g are electrically connected to each other to form a circuit network on the outer surface of the laminated substrate 21. . That is, in the multilayer electronic component of this embodiment, since the circuit network is constructed using the outer surface of the multilayer board 21, the wiring within each circuit board 11-13 can be simplified accordingly. It is considered possible. As well,
Since a plurality of external electrodes among the external electrodes to which each of the connecting conductive parts 17a to 19g are connected are electrically connected in advance as a component, the work of mounting the electronic component of this example on a printed circuit board, etc. Since it is possible to simplify the wiring on the printed circuit board as well as to simplify the wiring on the printed circuit board, it is also possible to reduce the mounting space.
さらに、外部電極22a〜22hは、スパッタリング、
蒸着または無電解めっき等により全面電極を外表面に形
成しておき、しかる後エツチングや削り取りあるいは焼
き飛ばし等により図示の各外部電極パターンに形成する
ことができる。あるいは、外部電極が形成される部分を
残してマスキング部材で電子部品の外表面を被覆した後
に、またはパターンマスクを当接させた状態で各外部電
極を公知の電極形成方法で形成してもよい。Furthermore, the external electrodes 22a to 22h are formed by sputtering,
Electrodes can be formed on the entire outer surface by vapor deposition, electroless plating, etc., and then etched, scraped, or burned off to form the respective external electrode patterns shown in the drawings. Alternatively, each external electrode may be formed by a known electrode forming method after covering the outer surface of the electronic component with a masking member, leaving the portion where the external electrode is formed, or with a pattern mask in contact with the outer surface of the electronic component. .
なお、外部型Fii 22 a〜22hの形成は、積層
基板の1面ずつ分散して行ってもよく、−度に全ての外
表面の外部電極を形成してもよい。Note that the formation of the external molds Fii 22a to 22h may be performed separately on each surface of the laminated substrate, or the external electrodes may be formed on all the outer surfaces at one time.
また、上記の外部電極の形成方法により外部電極22a
〜22hを形成した後に、さらにその外側にめっき等に
より別の導電性材料により複合被覆を施して、より信頼
性に優れた外部電極を形成してもよい。In addition, the external electrode 22a is formed by the above-described method of forming the external electrode.
After forming 22h, a composite coating of another conductive material may be applied to the outside by plating or the like to form a more reliable external electrode.
なお、上記実施例では、保護基板20a、20bを積層
基板の上下に積層したが、保!l!基+ff20゜21
は必ずしも本発明において必須のものではない、また、
保護基板側にも機能回路をIIII威してもよい、さら
に、積層される回路基板数も、図示例に限らず任意であ
る。In the above embodiment, the protective substrates 20a and 20b are laminated on the top and bottom of the laminated substrate. l! base +ff20゜21
is not necessarily essential in the present invention, and
Functional circuits may also be placed on the protective substrate side.Furthermore, the number of circuit boards to be stacked is not limited to the illustrated example, but is arbitrary.
また、本発明の電子部品において積層基板を形成するに
当たっては、大きなマザーの基板状態で積層体を構成し
、しかる後個別の電子部品を得るように切断すれば、量
産性を高めることができる。Furthermore, when forming a laminated substrate in the electronic component of the present invention, mass productivity can be improved by constructing the laminated body in the form of a large mother substrate and then cutting it to obtain individual electronic components.
本発明によれば、少なくとも−の電子部品機能素子を含
む機能回路と接続導電部とが構成された基板を積層して
なる積層基板の外表面に複数の外部電極が形成されてお
り、接Ml電部及び外部電極が電気的に接続されて、外
表面において回路網が形成されているので、電子部品外
部との電気的接続部分の数を低減することができ、実装
作業の簡略化及び実装スペースの低減を果たすことが可
能となる。従って、高密度実装に適した、電子部品を提
供することができるため、セットのコストダウン及び小
型化に大きく寄与することができる。According to the present invention, a plurality of external electrodes are formed on the outer surface of a laminated substrate formed by laminating a functional circuit including at least - electronic component functional elements and a connecting conductive part, Since the electrical parts and external electrodes are electrically connected to form a circuit network on the outer surface, the number of electrical connections with the outside of the electronic component can be reduced, simplifying the mounting work and mounting. It becomes possible to achieve a reduction in space. Therefore, it is possible to provide electronic components suitable for high-density packaging, which can greatly contribute to cost reduction and miniaturization of sets.
第1図は本発明の一実施例の積層型電子部品の外観斜視
図、第2図は従来の積層型電子部品の外観斜視図、第3
図は本発明の一実施例に用いられる基板を説明するため
の分解斜視図、第4図は本発明の一実施例における積層
基板を示す斜視図である。
図において、11〜13は回路基板、14〜16は機能
回路、17a−19gは接続導電部、21はlfi層基
板基板2a〜22hは外部電極を示す。FIG. 1 is an external perspective view of a multilayer electronic component according to an embodiment of the present invention, FIG. 2 is an external perspective view of a conventional multilayer electronic component, and FIG.
The figure is an exploded perspective view for explaining a substrate used in an embodiment of the invention, and FIG. 4 is a perspective view showing a laminated substrate in an embodiment of the invention. In the figure, 11 to 13 are circuit boards, 14 to 16 are functional circuits, 17a to 19g are connection conductive parts, and 21 is an lfi layer substrate 2a to 22h are external electrodes.
Claims (1)
を外部に接続するために端緑まで引出された接続導電部
とを有する複数の基板を積層し固着してなる積層基板と
、 前記積層基板の外表面に露出している前記接続導電部に
電気的に接続されるように、積層基板の外表面に形成さ
れた複数の外部電極とを備え、前記積層基板の外表面に
形成された複数の外部電極の少なくとも一部の外部電極
同士が互いに接続されて、積層基板の外表面を利用して
回路網が形成されていることを特徴とする積層型電子部
品。[Scope of Claims] A laminate formed by laminating and fixing a plurality of substrates each having a circuit including at least one electronic component functional element and a connecting conductive portion drawn out to the edge green for connecting the circuit to the outside. A substrate, and a plurality of external electrodes formed on the outer surface of the multilayer substrate so as to be electrically connected to the connection conductive portion exposed on the outer surface of the multilayer substrate, A multilayer electronic component characterized in that at least some of the plurality of external electrodes formed on the surface are connected to each other to form a circuit network using the outer surface of the multilayer substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1176372A JPH0341711A (en) | 1989-07-07 | 1989-07-07 | Laminated type electronic component |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1176372A JPH0341711A (en) | 1989-07-07 | 1989-07-07 | Laminated type electronic component |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0341711A true JPH0341711A (en) | 1991-02-22 |
Family
ID=16012475
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1176372A Pending JPH0341711A (en) | 1989-07-07 | 1989-07-07 | Laminated type electronic component |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0341711A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07154074A (en) * | 1993-11-29 | 1995-06-16 | Nec Corp | Multilayer printed board |
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| JPS609250B2 (en) * | 1977-05-04 | 1985-03-08 | ジェイエスアール株式会社 | Photosensitive resin composition |
| JPS6415157U (en) * | 1987-07-17 | 1989-01-25 |
-
1989
- 1989-07-07 JP JP1176372A patent/JPH0341711A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS609250B2 (en) * | 1977-05-04 | 1985-03-08 | ジェイエスアール株式会社 | Photosensitive resin composition |
| JPS598054A (en) * | 1982-07-02 | 1984-01-17 | Mitsubishi Electric Corp | Programming device |
| JPS6415157U (en) * | 1987-07-17 | 1989-01-25 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07154074A (en) * | 1993-11-29 | 1995-06-16 | Nec Corp | Multilayer printed board |
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