JPH0342758Y2 - - Google Patents

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Publication number
JPH0342758Y2
JPH0342758Y2 JP11780086U JP11780086U JPH0342758Y2 JP H0342758 Y2 JPH0342758 Y2 JP H0342758Y2 JP 11780086 U JP11780086 U JP 11780086U JP 11780086 U JP11780086 U JP 11780086U JP H0342758 Y2 JPH0342758 Y2 JP H0342758Y2
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JP
Japan
Prior art keywords
signal
channel
voltage
channels
difference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP11780086U
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Japanese (ja)
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JPS6326148U (en
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Description

【考案の詳細な説明】 〔産業上の利用分野〕 本考案は、無線通信のダイバシチ受信装置に関
する。特に、周波数変調波を受信復調するダイバ
シチ受信装置に関するものである。本考案は空間
ダイバシチに利用する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a diversity receiving device for wireless communication. In particular, the present invention relates to a diversity receiving device that receives and demodulates frequency modulated waves. This invention is used for spatial diversity.

〔概要〕〔overview〕

本考案は無線通信のダイバシチ受信装置におい
て、 2チヤネルの入力信号の信号対雑音比(以下、
S/Nという。)を比較し、著しく一方のS/N
が劣化している場合に、自動的に良好なS/Nの
チヤネルの局部発振用電圧制御型可変移相発振器
の制御電圧を固定し、S/Nが著しく低いチヤネ
ルの局部発振を良好なS/Nのチヤネルの位相に
同期するように制御することにより、 合成後の復調信号のS/Nの低下を防止し、か
つ復雑な操作および受信状態の連続監視等の操作
者の負担がなく、安定した動作が得られるように
したものである。
The present invention improves the signal-to-noise ratio (hereinafter referred to as
It's called S/N. ), the S/N was noticeably lower than that of the other.
The control voltage of the voltage-controlled variable phase shift oscillator for local oscillation of channels with good S/N is automatically fixed when the local oscillation of channels with extremely low S/N is reduced to good S/N. By controlling the signal to be synchronized with the phase of the /N channel, a decrease in the S/N of the demodulated signal after synthesis is prevented, and the burden on the operator such as complicated operations and continuous monitoring of the reception status is eliminated. , to ensure stable operation.

〔従来の技術〕[Conventional technology]

従来のダイバシチ受信装置は、周波数変調波を
受信する場合に、2チヤネル(チヤネルAおよび
チヤネルB)の信号を中間周波段で直接位相検波
し、その位相差情報を電圧へ変換し、同位相で合
成するために電圧制御型可変移相発振器または電
圧制御発信器の出力信号の位相を制御する系統が
主として採用されている。周波数変調波の復調
は、合成された入力信号を周波数弁別器等所要の
方式で行つている。
When receiving frequency modulated waves, conventional diversity receiving devices directly phase detect the signals of two channels (channel A and channel B) at an intermediate frequency stage, convert the phase difference information into voltage, and detect the signals in the same phase. For synthesis, a system that controls the phase of the output signal of a voltage-controlled variable phase shift oscillator or a voltage-controlled oscillator is mainly adopted. The frequency modulated wave is demodulated by using a frequency discriminator or other required method on the synthesized input signal.

〔考案が解決しようとする問題点〕[Problem that the invention attempts to solve]

ところが、このような従来のダイバシチ受信装
置では、チヤネルAとチヤネルBとの入力信号の
S/Nの差(入力レベルの差)がたとえば20dB
以上あつた場合に、上述の位相検波出力のS/N
は低いS/NのチヤネルのS/Nで決定され、良
好なS/Nのチヤネルの電圧制御型可変移相発振
器または電圧制御発振器の出力信号位相はS/N
が良好であるにもかかわらず、低いS/Nのチヤ
ネルのS/Nの影響でゆさぶられ、結果的に合成
後の復調信号のS/Nの劣化を招く現象を呈して
いた。これを防ぐために従来装置は、操作者が常
に両チヤネルの受信状態を監視し、手動により低
いS/Nのチヤネルの位相検波器入力を断とする
操作を行つており、操作が非常に煩雑な欠点があ
つた。
However, in such a conventional diversity receiving device, the difference in S/N (difference in input level) between the input signals of channel A and channel B is, for example, 20 dB.
In the above case, the S/N of the phase detection output mentioned above is
is determined by the S/N of a channel with a low S/N, and the output signal phase of a voltage-controlled variable phase shift oscillator or a voltage-controlled oscillator of a channel with a good S/N is determined by the S/N.
Even though the signal was good, it was affected by the S/N of the channel with a low S/N, resulting in a phenomenon that resulted in deterioration of the S/N of the demodulated signal after synthesis. To prevent this, with conventional devices, the operator constantly monitors the reception status of both channels and manually disconnects the phase detector input of the channel with a low S/N, making the operation extremely complicated. There were flaws.

本考案は、上記の欠点を解決するもので、合成
後の復調信号のS/Nの劣化を防止し、かつ煩雑
な操作および受信状態の連続監視等の操作者の負
担がなく、安定した動作が得られるダイバシチ受
信装置を提供することを目的とする。
The present invention solves the above-mentioned drawbacks. It prevents deterioration of the S/N of the demodulated signal after synthesis, eliminates the burden on the operator such as complicated operations and continuous monitoring of the reception status, and provides stable operation. An object of the present invention is to provide a diversity receiving device that can obtain the following characteristics.

〔問題点を解決するための手段〕[Means for solving problems]

本考案は、2チヤネルの入力信号をそれぞれ入
力し中間周波信号を出力する二つの混合器12,
32と、この二つの混合器にその出力信号の位相
が同期するように局部発振周波数の信号のそれぞ
れを与える二つの電圧制御型可変移相発振器2
4,44と、上記二つの混合器の出力信号の位相
差を検出する位相検波器51と、この位相検波器
の検出出力に基づいて上記二つの電圧制御型可変
移相発振器にその発振周波数を制御する制御電圧
をそれぞれ与える二つの制御回路と、この制御電
圧を固定する手段とを備えたダイバシチ受信装置
において、上記固定する手段は、上記2チヤネル
の入力信号の信号対雑音比の差を検出し、この差
がかなり大きい所定値を越えているか否かを判別
する比較手段と、この比較手段の判別結果に基づ
いて上記2チヤネルの入力信号の信号対雑音比の
良い方のチヤネルの制御電圧を固定する切換手段
とを含むことを特徴とする。
The present invention consists of two mixers 12, each inputting two channels of input signals and outputting an intermediate frequency signal.
32, and two voltage-controlled variable phase-shift oscillators 2 that supply local oscillation frequency signals to these two mixers so that the phases of their output signals are synchronized.
4, 44, a phase detector 51 that detects the phase difference between the output signals of the two mixers, and a phase detector 51 that determines the oscillation frequency of the two voltage-controlled variable phase shift oscillators based on the detection output of the phase detector. In a diversity receiving device comprising two control circuits each providing a control voltage to be controlled, and means for fixing the control voltages, the fixing means detects a difference in signal-to-noise ratio between the input signals of the two channels. and a comparison means for determining whether this difference exceeds a considerably large predetermined value, and a control voltage for the channel with a better signal-to-noise ratio of the input signals of the two channels based on the determination result of the comparison means. and switching means for fixing the.

〔作用〕[Effect]

比較手段で2チヤネルの入力信号のS/Nの差
(対数値の差)を検出し、このS/Nの差が所定
値を越えているか否かを判別する。この比較手段
の判別結果に基づいて切換手段で自動的に良好な
S/Nのチヤネルの電圧制御型可変移相発振器の
制御電圧を固定し、低いS/Nのチヤネルの局部
発振を制御して低いS/Nのチヤネルを良好な
S/Nのチヤネルの位相に同期させる。以上の動
作によりデータを欠損することなく合成後の復調
信号のS/Nの低下を防止し、かつ複雑な操作お
よび受信状態の連続監視等の操作者の負担がな
く、安定した動作が得られる。
The comparing means detects the S/N difference (difference in logarithmic value) between the input signals of the two channels, and determines whether or not this S/N difference exceeds a predetermined value. Based on the determination result of the comparing means, the switching means automatically fixes the control voltage of the voltage-controlled variable phase shift oscillator of the channel with a good S/N, and controls the local oscillation of the channel with a low S/N. To synchronize a channel with a low S/N to the phase of a channel with a good S/N. The above operation prevents a drop in the S/N of the demodulated signal after synthesis without losing data, and provides stable operation without burdening the operator with complicated operations and continuous monitoring of the reception status. .

〔実施例〕〔Example〕

本考案の実施例について図面を参照して説明す
る。
Embodiments of the present invention will be described with reference to the drawings.

図は本考案一実施例ダイバシチ受信装置のブロ
ツク構成図である。図外からチヤネルA,Bの入
力信号が入力端子11,31にそれぞれ入力され
る。入力端子11,31からの入力信号がそれぞ
れ混合器12,32の入力に接続される。混合器
12,32からの位相が同期するように制御され
た第一中間周波信号がそれぞれ自動利得制御増幅
器13,33の入力に接続され、また自動利得制
御信号が制御入力に接続され第一中間周波信号が
増幅される。自動利得制御増幅器13,33の出
力はそれぞれ混合器14,34の入力に接続され
る。また混合器14,34の局部発振信号入力に
は図外から第二局部発振信号が接続される。混合
器14,34から第二中間周波信号がそれぞれ帯
域波器15,35を経由してリミツタ16,3
6の入力および合成器52の入力に接続される。
The figure is a block diagram of a diversity receiving apparatus according to an embodiment of the present invention. Input signals of channels A and B from outside the figure are input to input terminals 11 and 31, respectively. Input signals from input terminals 11 and 31 are connected to inputs of mixers 12 and 32, respectively. First intermediate frequency signals whose phases are controlled to be synchronized from the mixers 12 and 32 are connected to inputs of automatic gain control amplifiers 13 and 33, respectively, and automatic gain control signals are connected to control inputs of the first intermediate frequency signals. The frequency signal is amplified. The outputs of automatic gain control amplifiers 13, 33 are connected to the inputs of mixers 14, 34, respectively. Further, a second local oscillation signal is connected to the local oscillation signal input of the mixers 14 and 34 from outside the figure. The second intermediate frequency signals from mixers 14 and 34 are passed through bandpass filters 15 and 35 to limiters 16 and 3, respectively.
6 and the input of synthesizer 52.

合成器52ではチヤネルA,Bの第二中間周波
信号が合成され、帯域波器53を経由して復調
器54に接続され、復調器54で復調された信号
が出力端子55に接続され、出力端子55から復
調信号が送出される。
In the synthesizer 52, the second intermediate frequency signals of channels A and B are combined and connected to a demodulator 54 via a bandpass filter 53, and the signal demodulated by the demodulator 54 is connected to an output terminal 55 and output. A demodulated signal is sent from terminal 55.

リミツタ16,36の出力は位相検波器51の
入力にそれぞれ接続される。位相検波器51では
チヤネルA,Bの第二中間周波信号の位相差が検
出される。位相検波器51から検出された位相差
がそれぞれ非反転増幅器21および反転増幅器4
1の入力にそれぞれ接続される。
The outputs of limiters 16 and 36 are connected to the inputs of phase detector 51, respectively. The phase detector 51 detects the phase difference between the second intermediate frequency signals of channels A and B. The phase difference detected from the phase detector 51 is detected by the non-inverting amplifier 21 and the inverting amplifier 4, respectively.
1 input, respectively.

ここで本考案の特徴とするところは、一点鎖線
で囲むスイツチ開閉制御部分である。すなわち、
非反転増幅器21および反転増幅器41の出力
は、それぞれスイツチ22,42を介して電圧制
御型可変移相発振器24,44の入力にそれぞれ
接続される。電圧制御型可変移相発振器24,4
4の出力(第一局部発振信号)は混合器12,3
2の局部発振信号入力に接続され、混合器12,
32は位相制御される。
Here, the feature of the present invention is the switch opening/closing control portion surrounded by a dashed line. That is,
The outputs of non-inverting amplifier 21 and inverting amplifier 41 are connected to inputs of voltage-controlled variable phase shift oscillators 24 and 44 via switches 22 and 42, respectively. Voltage controlled variable phase shift oscillator 24, 4
The output of No. 4 (first local oscillation signal) is sent to mixer 12, 3.
mixer 12,
32 is phase controlled.

図外からチヤネルA,Bの入力信号のS/Nが
それぞれコンパレータ25,45の入力に接続さ
れる。コンパレータ25,45ではチヤネルA,
Bの信号のS/Nの差が検出され、コンパレータ
25,45から検出結果がそれぞれ変換器26,
46の入力に接続される。変換器26,46の出
力はそれぞれスイツチ22,23,42,43の
「オン」、「オフ」を制御する。すなわち、2チヤ
ネルのS/Nの差が所定値を越えた場合には、い
ま良好なS/NのチヤネルがチヤネルAとする
と、スイツチ22は開にされ、電圧制御型可変移
相発振器24の入力はスイツチ23を介して共通
電位に接続される。低いS/NのチヤネルBのス
イツチ42は閉の状態およびスイツチ43は開の
状態を保持する。良好なS/Nのチヤネルがチヤ
ネルBとすると、スイツチ42は開にされ、電圧
制御型可変移相発振器44の入力はスイツチ43
を介して共通電位に接続される。低いS/Nのチ
ヤネルAのスイツチ22は閉の状態およびスイツ
チ23は開の状態を保持する。
The S/N ratios of the input signals of channels A and B are connected to the inputs of comparators 25 and 45, respectively. In comparators 25 and 45, channel A,
The S/N difference of the B signal is detected, and the detection results are sent from the comparators 25 and 45 to the converters 26 and 45, respectively.
46 inputs. The outputs of the converters 26 and 46 control the "on" and "off" states of the switches 22, 23, 42, and 43, respectively. That is, if the difference in S/N between the two channels exceeds a predetermined value, and the channel with the better S/N is channel A, the switch 22 is opened and the voltage-controlled variable phase shift oscillator 24 is turned on. The inputs are connected via switch 23 to a common potential. The switch 42 of channel B with a low S/N remains closed and the switch 43 remains open. When the channel with good S/N is channel B, the switch 42 is opened and the input of the voltage controlled variable phase shift oscillator 44 is connected to the switch 43.
connected to a common potential via. The switch 22 of channel A with a low S/N remains closed and the switch 23 remains open.

このような構成のダイバシチ受信装置の動作に
ついて説明する。図において、いま、S/Nの異
なるチヤネルAおよびチヤネルBの各々の信号が
入力されると、コンパレータ25,45でS/N
の差(入力レベルの差)を検出し、仮に、チヤネ
ルAの入力信号のS/NからチヤネルBの入力信
号のS/Nを引いた値が所定値を越える場合に、
コンパレータ25,45から制御信号が出力さ
れ、変換器26,46によつてスイツチ22およ
びスイツチ43を開とし、スイツチ23およびス
イツチ42を閉としてチヤネルAの電圧制御型可
変移相発振器24の制御電圧を零とし、チヤネル
Bの電圧制御型可変移相発振器44をチヤネルA
の位相に同期させる。したがつて、位相検波器5
1の出力は零となり、合成器52の各入力チヤネ
ルの位相が同相となり、入力信号のS/Nの差に
応じて自動的に合成後のS/Nの劣化を防止す
る。
The operation of the diversity receiving device having such a configuration will be explained. In the figure, when the signals of channel A and channel B, which have different S/N ratios, are input, the comparators 25 and 45
(difference in input level), and if the value obtained by subtracting the S/N of the input signal of channel B from the S/N of the input signal of channel A exceeds a predetermined value,
Control signals are output from the comparators 25 and 45, and the converters 26 and 46 open the switches 22 and 43, close the switches 23 and 42, and control the voltage of the voltage-controlled variable phase shift oscillator 24 of channel A. is set to zero, and the voltage controlled variable phase shift oscillator 44 of channel B is set to zero, and the voltage controlled variable phase shift oscillator 44 of channel B is set to
synchronize to the phase of Therefore, the phase detector 5
1 becomes zero, the phases of each input channel of the combiner 52 become in-phase, and deterioration of the S/N after combining is automatically prevented according to the difference in S/N of the input signals.

次に、チヤネルBの入力信号のS/Nからチヤ
ネルAの入力信号のS/Nを引いた値が所定値を
越える場合も同様にしてコンパレータ25,45
から制御信号が出力され、変換器26,46によ
つてスイツチ22およびスイツチ43を閉とし、
スイツチ23およびスイツチ42を開としてチヤ
ネルBの電圧制御型可変移相発振器44の制御電
圧を零とし、チヤネルAの電圧制御型可変移相発
振器24をチヤネルBの位相に同期させる。
Next, if the value obtained by subtracting the S/N of the input signal of channel A from the S/N of the input signal of channel B exceeds a predetermined value, the comparators 25 and 45
A control signal is output from the converters 26 and 46 to close the switch 22 and the switch 43,
Switch 23 and switch 42 are opened to set the control voltage of channel B voltage-controlled variable phase-shift oscillator 44 to zero, and channel A voltage-controlled variable phase-shift oscillator 24 is synchronized with the channel B phase.

〔考案の効果〕[Effect of idea]

以上説明したように、本考案は、両チヤネルの
入力信号のS/Nの一方が著しく劣化した場合に
も、良好なS/Nのチヤネルの位相に同期するよ
うに制御することにより、復調信号のS/Nの低
下を防ぎ、かつ煩雑な操作および受信状態の連続
監視等の操作者の負担がなく、安定した動作が得
られる優れた効果がある。
As explained above, the present invention enables the demodulated signal to be synchronized to the phase of the channel with good S/N even when the S/N of one of the input signals of both channels is significantly degraded. This has the excellent effect of preventing a drop in the S/N of the receiver, eliminating the burden on the operator such as complicated operations and continuous monitoring of the reception status, and providing stable operation.

【図面の簡単な説明】[Brief explanation of the drawing]

図は本考案の一実施例ダイバシチ受信装置のブ
ロツク構成図。 11,31……入力端子、12,14,32,
34……混合器、13,33……自動利得制御増
幅器、15,35,53……帯域波器、16,
36……リミツタ、21……非反転増幅器、41
……反転増幅器、24,44……電圧制御型可変
移相発振器、25,45……コンパレータ、2
6,46……変換器、51……位相検波器、52
……合成器、54……復調器、55……出力端
子。
The figure is a block diagram of a diversity receiving device according to an embodiment of the present invention. 11, 31...input terminal, 12, 14, 32,
34... Mixer, 13, 33... Automatic gain control amplifier, 15, 35, 53... Bandwidth wave generator, 16,
36... Limiter, 21... Non-inverting amplifier, 41
... Inverting amplifier, 24, 44 ... Voltage controlled variable phase shift oscillator, 25, 45 ... Comparator, 2
6, 46...Converter, 51...Phase detector, 52
...Synthesizer, 54...Demodulator, 55...Output terminal.

Claims (1)

【実用新案登録請求の範囲】 2チヤネルの入力信号をそれぞれ入力し中間周
波信号を出力する二つの混合器12,32と、 この二つの混合器にその出力信号の位相が同期
するように局部発振周波数の信号をそれぞれ与え
る二つの電圧制御型可変移相発振器24,44
と、 上記二つの混合器の出力信号の位相差を検出す
る位相検波器51と、 この位相検波器の検出出力に基づいて上記二つ
の電圧制御型可変移相発振器にその発振周波数を
制御する制御電圧をそれぞれ与える二つの制御回
路と、 この制御電圧を固定する手段と を備えたダイバシチ受信装置において、 上記固定する手段は、 上記2チヤネルの入力信号の信号対雑音比の差
を検出し、この差がかなり大きい所定値を越えて
いるか否かを判別する比較手段と、 この比較手段の判別結果に基づいて上記2チヤ
ネルの入力信号の信号対雑音比の良い方のチヤネ
ルの制御電圧を固定する切換手段と を含むことを特徴とするダイバシチ受信装置。
[Claims for Utility Model Registration] Two mixers 12 and 32 which each input two channels of input signals and output an intermediate frequency signal, and a local oscillation device so that the phases of the output signals of these two mixers are synchronized. Two voltage-controlled variable phase shift oscillators 24, 44 each providing a frequency signal.
and a phase detector 51 that detects the phase difference between the output signals of the two mixers, and control that controls the oscillation frequency of the two voltage-controlled variable phase shift oscillators based on the detection output of the phase detector. In a diversity receiving device comprising two control circuits that respectively apply voltages, and means for fixing the control voltages, the fixing means detects the difference in signal-to-noise ratio of the input signals of the two channels, and detects the difference in signal-to-noise ratio of the input signals of the two channels. a comparison means for determining whether the difference exceeds a predetermined value which is considerably large; and a control voltage for the channel having a better signal-to-noise ratio of the input signals of the two channels is fixed based on the determination result of the comparison means. 1. A diversity receiving device comprising: switching means.
JP11780086U 1986-07-31 1986-07-31 Expired JPH0342758Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11780086U JPH0342758Y2 (en) 1986-07-31 1986-07-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11780086U JPH0342758Y2 (en) 1986-07-31 1986-07-31

Publications (2)

Publication Number Publication Date
JPS6326148U JPS6326148U (en) 1988-02-20
JPH0342758Y2 true JPH0342758Y2 (en) 1991-09-06

Family

ID=31003655

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11780086U Expired JPH0342758Y2 (en) 1986-07-31 1986-07-31

Country Status (1)

Country Link
JP (1) JPH0342758Y2 (en)

Also Published As

Publication number Publication date
JPS6326148U (en) 1988-02-20

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