JPH0210680Y2 - - Google Patents

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a radio receiver, and in particular, an intermediate filter having at least two different frequency bands is provided between a tuner section and an intermediate frequency amplifier, and an intermediate filter having at least two different frequency bands is provided between a receiving station and an adjacent interference. The present invention relates to a radio receiver that automatically selects a predetermined intermediate filter based on the reception level of a station, and inputs the output of a tuner section to an intermediate frequency amplifier via the selected intermediate filter.

<Prior art> There are radio receivers that have only either a wideband filter or a narrowband filter installed between the tuner section and the intermediate frequency amplifier, but radio receivers that only have a wideband filter cannot receive signals when there is a fairly large station nearby. This causes interference, and in radio receivers with only a narrow band filter, distortion and separation deterioration occur during overmodulation. For this reason, an intermediate filter (referred to as a 1F filter) having at least two different frequency bands is provided between the tuner section and the intermediate frequency amplifier,
Broadband when there is no interference from neighboring stations.
Use an IF filter to receive good sound quality with little distortion, and when there is interference from adjacent stations, use a narrowband IF filter to receive interference-free reception even if you sacrifice some sound quality. A radio receiver with an automatic intermediate frequency band switching function has been proposed.

<Disadvantages of the prior art> However, conventional radio receivers with an automatic intermediate frequency band switching function require a circuit for detecting the level of interference signals and a discrimination circuit for determining the presence or degree of interference for each adjacent station, resulting in high costs. It is becoming the cause of

In addition, a detection circuit is connected to each IF filter provided between the tuner section and the intermediate frequency amplifier,
A radio receiver with an automatic intermediate frequency band switching function has also been proposed, which determines the presence or absence of interference by comparing the levels of a desired signal and an interfering signal by comparing the output levels of each detection circuit. However, such radio receivers cannot accurately determine the presence or absence of interference;
Since the configuration extracts the levels of the desired signal and interference signal through an IF filter, the characteristics of the IF filter are limited, and furthermore, the more IF filters there are, the more complex the configuration of the subsequent level comparison circuit becomes. There is.

<Purpose of the invention> The purpose of the invention is to provide a radio receiver with a simple configuration and an automatic intermediate frequency band switching function that eliminates the need to provide a level detection circuit or discrimination circuit for detecting the level of interfering signals for each adjacent station. It is to be.

Another object of the present invention is to provide a radio receiver with an intermediate frequency band automatic switching function that can accurately compare the levels of a desired signal and an interfering signal, and has a simple configuration even when the number of IF filters is large. It is.

Still another object of the present invention is to be able to detect the received level of the interfering signal from an adjacent interfering station without affecting the reception of the desired signal in any way, and to prevent sound interruptions and abnormal noises caused by detecting the received level. An object of the present invention is to provide a radio receiver with an automatic intermediate frequency band switching function.

<Summary of the invention> The radio receiver of the invention has two tuner sections, a first and a second tuner section, and is disposed between the first tuner section and a first intermediate frequency amplifier, and has different frequency bandwidths. at least two IF filters, a level detection circuit that is connected to the second tuner section and detects the reception level of each station, and first and second phase locked loops that share one PLL circuit;
It has a sampling and holding circuit that samples and holds the output voltage of the PLL circuit, and a controller, and causes the first tuner section to receive the desired signal, and causes the second tuner section to sequentially receive and output the desired signal and the interference signal. A predetermined intermediate filter is selected based on the reception levels of the desired signal and the interference signal detected by the detection circuit. Note that, except when detecting a level, the first phase-locked loop is closed to allow the first tuner section to receive the desired signal, and when detecting a level, the second phase-locked loop is closed and the signals of each station are sent to the second tuner section. receive it,
At the same time, a sampling hold value is input to the first tuner section to receive the desired signal. This invention has a simple configuration and can accurately compare the levels of the desired signal and the interfering signal, making it possible to correctly select a predetermined intermediate frequency filter (IF filter), and furthermore, the number of intermediate frequency filters can be increased. However, the configuration is not complicated. Further, when detecting the reception level of an adjacent interfering station, the audio of the desired station will not be interrupted or any abnormal noise will be generated.

<Example> As shown in Figure 2, the frequency of the desired station is ₀ , and the frequencies of the adjacent interfering stations _{are 1} (= ₀ - Δ) and ₂ , respectively.
(= ₀ + Δ), the reception level of each frequency is La, Lb,
If Lc is the following equations (however, K ₁ is a constant), La>K ₁・Lb …(1) La>K ₁・Lc …(2) When the following holds true, in other words, the level of the desired signal is interfered with. When the signal level is greater than K ₁ times, there is no interference from the adjacent interfering station, and when at least one of equations (1) and (2) does not hold, interference from the adjacent interfering station occurs. Therefore, the present invention (a) detects the level of the interfering signal from the adjacent interfering station within a short time while receiving the desired signal, and (b) uses the levels of the desired signal and interfering signal to detect (1). Determine whether equation (2) holds true, and (c) if both equations (1) and (2) hold true, input the tuner output to an intermediate frequency amplifier via a wideband IF filter, and ( If at least one of equations 1) and (2) does not hold true, the tuner output is set to narrowband.
The intermediate frequency band is automatically switched by inputting the signal to the intermediate frequency amplifier via the IF filter.

Figure 1 is a block diagram of the main parts of the radio receiver according to the present invention, Figure 3 is a time chart of the sampling hold command and local oscillator switching command, and Figure 4 is the process of automatic intermediate frequency band switching according to the present invention. This is a flowchart.

In FIG. 1, 11 is a first tuner section;
2 is a first intermediate frequency amplifier; 13a and 13b are IF filters disposed between the first tuner section 11 and the first intermediate frequency amplifier 12;
has a wideband IF filter, 13b has a narrowband IF filter, 14 has switches 14a and 14b,
An IF filter switching circuit, PLLP1 (see dotted line), inputs the output signal of the first tuner section 11 to the first intermediate frequency amplifier 12 via a predetermined IF filter.
is a first phase-locked loop that causes the local oscillator of the first tuner section 11 to oscillate at a frequency corresponding to the frequency of the desired station; 15 is the second tuner section; 16 is the output level of the second tuner section Level detection circuit that detects, PLLP2 (refer to the dashed line)
17 is a second phase-locked loop that causes the local oscillator of the second tuner section 15 to oscillate at a predetermined frequency; and 17 is a controller.

The first and second tuner sections 11 and 15 are high frequency amplification circuits 11a and 15a and local oscillators 11b and 15 that amplify input signals from the antenna AT, respectively.
b, mixers 11c, 15c, etc., and the level detection circuit 16 includes a narrow band filter 16a, a second intermediate frequency amplifier 16b, a detector 16c,
The intermediate frequency signal taken out from the second intermediate frequency amplifier 16b is detected by the detector 16c, and the detected output is sent to the AD converter 16.
d to AD convert and output. The first phase-locked PLLP 1 is formed by a local oscillator 11b of the first tuner section 11, a local oscillator switching circuit 18, a frequency dividing circuit 19, a PLL circuit 20, a low-pass filter 21, and a sampling hold circuit 22. The second phase-locked loop PLLP2 includes the local oscillator 15b of the second tuner section 15, the local oscillator switching circuit 18, the frequency dividing circuit 19, and the PLL.
It is formed by a circuit 20 and a low pass filter 21. The controller 17 outputs a sampling hold command SHC to the sampling hold circuit 22 at a constant cycle shown in FIG. 3, and also outputs a local oscillator switching command LOC to the local oscillator switching circuit 18. Further, when the sampling hold command SHC is at low level (at this time, the output signal of the local oscillator 11b is set to the local oscillator switching circuit 1), the controller 17
8 and frequency dividing circuit 19), the desired signal from the desired station (frequency
The reception frequency control data FCD is input to the PLL circuit 20 so that the first tuner section 11 receives and outputs the signal ₀ ). Furthermore, when the local oscillator switching command LOC is at a high level (at this time, the output signal of the local oscillator 15b is
8 and the frequency dividing circuit 19), the desired signal from the desired station and the interference signals from the first and second adjacent stations are sequentially applied to the PLL circuit 20 via the frequency dividing circuit 19.
₁ , ₂ ) is outputted as reception frequency control data FCD so that the second tuner section 21 receives and outputs the signals.

Now, when the sampling hold command SHC and the local oscillator switching command LOC are both at low level, the controller 17 sends the reception frequency control data FCD to the PLL circuit 20 in order to cause the first tuner section 11 to receive and output a signal of desired frequency ₀ . I am typing. As a result, the local oscillator 11b oscillates at a constant frequency higher than the desired frequency ₀ by the intermediate frequency, the first tuner section 11 receives and outputs the signal from the desired station, and the audio of the desired station is output from a speaker (not shown).

In such a state, the controller 17
At the timing shown in the figure (time t ₁ ), a high-level sampling and hold command SHC is first output.
At the rising edge of the sampling hold command SHC,
The sampling and holding circuit 22 samples and holds the output value of the low-pass filter 21. Thereafter, the hold value is applied to the local oscillator 11 until the sampling hold command SHC becomes low level.
b, and the local oscillator 11b oscillates at a frequency corresponding to the hold value. Note that the high level period of the sampling hold command SHC is short and therefore the hold value can be considered unchanged, so the first tuner section 11 correctly receives and outputs the desired frequency signal even during this period.

Next, the controller 17 inputs a high-level local oscillator switching command LOC to the local oscillator switching circuit 18 at the timing shown in _FIG . Enter. As a result,
The local oscillator 15b of the second tuner section 15 is
The phase-locked loop PLLP2 oscillates at a frequency higher than the desired frequency ₀ by the intermediate frequency, the level detection circuit 16 detects the level of the desired signal, and the controller 17 converts the level into the desired frequency.
It is captured as a reception level La of ₀ and stored in the built-in memory 17a.

After that, the controller 17 sets the local oscillator switching command LOC and the sampling hold command SHC to low level, and also sets the first tuner section 11 to low level.
Then, the reception frequency control data FCD is input to the PLL circuit 20 in order to receive the desired frequency ₀ .

Thereafter, by similar control, the controller 17 adjusts the first and second interference signal levels Lb from the adjacent interference station,
Lc is read and IF filter selection processing is performed using these reception levels La, Lb, and Lc.

Next, the operation shown in FIG. 1 will be explained with reference to the flowchart shown in FIG.

(a) When a channel selection switch (not shown) is pressed to select a channel, the controller 17 reads the channel selection information.

(b) The controller 17 sets both the sampling hold command SHC and the local oscillator switching command LOC to low level, and receives the desired signal (frequency ₀ ) from the selected station so that the first tuner unit 11 receives it. Frequency control data FCD
is applied to the PLL circuit 20. This allows the first
The tuner section 11 receives and outputs the desired signal.

(c) Then, after a predetermined time (time t ₁ ), the controller 17 sets the sampling hold command SHC to high level, and the sampling hold circuit 2
2 to sample and hold the output voltage value of the PLL circuit 20. Note that the sampling hold circuit 22 thereafter inputs the hold value to the local oscillator 11b until the sampling hold command becomes low level, and the local oscillator 11b oscillates based on the sampling hold value.
The tuner unit 11 is caused to receive the desired signal.

(d) At time _t2 after outputting the sampling hold command, the controller 25 sets the local oscillator switching command LOC to high level, and causes the local oscillator switching circuit 18 to transfer the output signal of the local oscillator 15b of the second tuner section 15 to the PLL circuit. 20. At the same time, the controller 17 inputs predetermined reception frequency control data FCD to the PLL circuit 20 in order to cause the second tuner section 15 to receive the desired signal, and reads the reception level La of the desired signal from the level detection circuit 16. and stores it in the built-in memory 17a.

(e) After detecting the reception level La, the controller 17 sequentially sets the local oscillator switching command LOC and the sampling hold command SHC to low level to set the first
The phase-locked loop PLLP1 is closed, and the first tuner section 11 is made to receive the desired signal.

(f) Then, after a predetermined period of time has passed (times t ₃ and t ₄ ), the controller sequentially again sets the sampling hold command SHC and the local oscillator switching command LOC to high level, and also switches the second tuner section 15 to the first Specified reception frequency control data to receive the interference signal (frequency ₁ ) from the adjacent station.
The FCD is applied to the PLL circuit 20, and the output of the level detection circuit 16 (reception level Lb) is read and stored in the built-in memory 17a.

(g) After detecting the reception level Lb, the controller 17 sequentially sets the local oscillator switching command LOC and the sampling hold command SHC to low level, inputs the reception frequency control data FCD corresponding to the desired signal to the PLL circuit 20, and 1 tuner unit 11 to receive the desired frequency. or,
In parallel with this, the controller 17 determines whether equation (1) holds true. If equation (1) does not hold, then interference is occurring from the first adjacent interfering station, so the controller 17 inputs the intermediate frequency filter selection command CS to the IF filter switching circuit 14,
The narrowband IF filter 13b is selected, and the processing from step c onwards can be repeated. As described above, the output terminal of the first tuner section 11 is connected to the input terminal of the first intermediate frequency amplifier 12 via the narrowband IF filter 13b.

On the other hand, if equation (1) holds true, then there is no interference caused by the first adjacent interfering station, so it is checked whether interference is occurring due to the second adjacent interfering station by the following process.

(h) The controller 17 operates at a predetermined timing (time
Sequential sampling hold command SHC at t ₅ , t ₀ )
At the same time, the local oscillator switching command LOC is set to high level, and the second tuner section 15 is set to the second tuner section 15.
In order to receive the interference signal (frequency ₂ ) from the adjacent station, the predetermined frequency control data FCD is set in the PLL.
The signal is applied to the circuit 20, the received level Lc is read from the level detection circuit 16, and the received level Lc is read from the built-in memory 17a.
to be memorized.

(i) After detecting the reception level Lc, the controller 17 sequentially sets the local oscillator switching command LOC and sampling hold command SHC to low level, and inputs the reception frequency control data FCD corresponding to the desired signal (frequency ₀ ) to the PLL circuit 20. do,
The first tuner unit receives the desired signal.
Further, in parallel with this, the controller 17 determines whether equation (2) holds true. If formula (2) does not hold, then the second adjacent interfering station is causing interference, so the controller 17 inputs the intermediate frequency filter switching command CS to the IF filter switching circuit 14 to select the narrowband IF filter 13b. ,
Thereafter, the process from step c onwards is repeated.

(j) If equation (2) holds true, there is no interference from the second adjacent interfering station, so the controller 17
An intermediate frequency filter switching command CS is input to the filter switching circuit 14, and the broadband IF filter 13a is switched.
is selected, and the process from step c onwards can be repeated. By the process of step j, the output terminal of the first tuner section 11 is connected to the input terminal of the first intermediate frequency amplifier 12 via the wideband IF filter 13a.

In addition, in the above, IFs with different frequency bands are used.
Although the case in which two filters are used has been described, the present invention is not limited to two filters, and may be configured to include three or more filters. In this case, multiple discriminants with different sizes of the constant k ₁ in equations (1) and (2) are prepared, and a predetermined IF filter is selected depending on whether each discriminant is true or not. do.

Although the configuration of the IF filter switching circuit 14 has not been described, each switch 14a, 14b
is composed of electronic switches such as switching transistors and diodes. In addition, although the IF filter switching circuit 14 is shown as two switches 14a and 14b in FIG. 1, for example, switch 14a may be removed and each IF filter 13a and
It is also possible to configure the input terminal of b to be connected to the output terminal of the first tuner section.

<Effects of the Invention> As explained above, according to the present invention, in addition to the first tuner section that receives and outputs the desired signal, there is a second tuner section that detects the signal levels from the desired station and the adjacent interfering station. and a level detection circuit are provided, and the IF filter is selected based on the reception levels of the desired signal and interference signal obtained from the second tuner section, so that there is no influence on the reception of the desired signal by the first tuner section. The reception level of each station can be detected without any input, and good reception can be performed without the audio of the desired station being interrupted or abnormal noise being added due to the reception level detection operation.

Further, according to the present invention, a controller for controlling the tuning frequency of the second tuner section and a level detection circuit are provided, and the controller causes the second tuner section to detect the desired signal and the interference of the first and second adjacent interfering stations. The signal is received, the received level of the desired signal and the interference signal detected by the level detection circuit are compared and determined by the controller, and a predetermined signal is determined based on the determination result.
Since the configuration is configured to select the IF filter, there is no need to provide a detection circuit or discrimination circuit for detecting the interfering signal level for each adjacent station, making the configuration simple.
Moreover, since the levels of the desired signal and the interfering signal can be accurately compared, a predetermined IF filter can be selected correctly, and furthermore, even if the number of IF filters increases, the configuration does not become complicated.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the main parts of a radio receiver according to the present invention, Fig. 2 is an explanatory diagram illustrating the presence or absence of interference,
FIG. 3 is a time chart of the sampling hold command and the local oscillator switching command, and FIG. 4 is a flowchart of the intermediate frequency band switching process according to the present invention. 11...first tuner section, 12...first intermediate frequency amplifier, 13a...wideband IF filter,
13b...Narrowband IF filter, 14...IF filter switching circuit, 15...Second tuner section, 1
6...Level detection circuit, 17...Controller,
18... Local oscillator switching circuit, 22... Sampling hold circuit, PLLP1, PLLP2... First,
Second phase locked loop.

Claims (1)

[Scope of utility model registration request] a first tuner section that receives and outputs a desired signal;
a first intermediate frequency amplifier; at least two intermediate frequency filters having different frequency bands disposed between the first tuner unit and the first intermediate frequency amplifier; and a first intermediate frequency filter based on an intermediate frequency filter selection command. a first switching circuit that inputs the tuner section output to the first intermediate frequency amplifier via a predetermined intermediate filter; a second tuner section; and a level detection circuit that detects the output level of the second tuner section; one
In addition to sharing the PLL circuit, there are first and second phase-locked loops formed corresponding to each tuner section, and a second phase-locked loop that inputs the local oscillator output signal of a predetermined tuner section to the PLL circuit according to a local oscillator switching command. 2 switching circuit, and a sampling hold disposed in the first phase-locked loop, which samples and holds the PLL circuit output voltage according to a sampling hold command and inputs the held value to the local oscillator of the first tuner section. a circuit, outputting a sampling hold command and a local oscillator switching command, causing the second tuner unit to receive and output a disturbance signal from at least an adjacent jamming station, and obtaining a reception level of the disturbance signal from the level detection circuit; A radio receiver comprising a controller that generates an intermediate frequency filter selection command based on the levels of the desired signal and the interfering signal.