JPH0342783A - Image shade line extracting device and picture processing device using the same - Google Patents

Abstract

PURPOSE:To easily obtain the shade line of an image such as a character and a graphic by generating the shade picture of prescribed picture element width in a shading direction determined beforehand to a non-image side from a changing point from an image part to a non-image part as seen in the prescribed direction of the image drawn on an original based on read picture information. CONSTITUTION:The direction to detect the changing point from the image part I to the non-image part NI is determined by relation to the shading direc tion S0. Namely in principle, processing is to detect the changing point from the image part I to the non-image part NI as seen in the shading direction, but in the case where two-dimensional picture processing in an orthogonal coordinates system is executed, for instance, in the shade line SL in the case where light shines in the direction from the upper left part to the lower right part of the image I, it is the changing point as seen from the direction S1 from left to right and the direction S2 from the upper part to the lower part, and in the shading line SL in the case where the light shines in the direction S0 from the just upper part to the just lower part of the image I, it is the changing point as seen in the direction S2 from the upper part to the lower part.

Description

[Detailed description of the invention]

[Industrial Application Field] The present invention relates to an image shadow extraction device that extracts shadow lines of an image based on image information obtained by reading a document on which images such as characters and figures are drawn, and the extracted shadows. The present invention relates to a regular image processing device that performs image processing related to lines. [Prior Art] In recent years, image processing devices such as copying machines and facsimile machines do not read images such as characters and figures drawn on a document and reproduce the images as they are, but instead enlarge or reduce the image, or italicize the image. Various devices have been proposed that perform processing such as color conversion, or combine two or more read images to form a new image. There is. Here, for example, as shown in FIG. 48, the letter "A" (
The shadow line (see figure (b)) can be used to highlight the original character "'A", and can be used to emphasize images of characters, figures, etc. when creating various documents. This is particularly effective. Conventionally, when creating a document using the shadow lines of characters, figures, etc., the shadow line image itself is placed on the document with °b, and the document is The object is subjected to various processing processes (scaling processing, italic processing, etc.) and various compositing processes to obtain a desired image using shadow lines. [Problem to be Solved by the Invention 1 As mentioned above] Traditionally, when creating a document using shadow images, it was necessary to draw the shadow lines of images such as characters and figures, which was a time-consuming process, especially when obtaining shadow lines for complex images. Therefore, an object of the present invention is to make it possible to easily obtain shadow lines of images such as characters, figures, etc. [Means for solving the problem] Technical means for solving the above problem

[Yo, Figure 1 (a
), the original 811 is optically scanned to form a predetermined image.
An image reading means 2 that reads image information in elementary units, and image information read by the image reading means 2.
A predetermined direction of the image (I) drawn on the original 1 based on
From the image part (1) to the non-image part (NI) as seen in
an image change point detection means 3 for detecting a change point;
from the image change point to the non-image (NI) side.
A shadow image generator that generates a shadow image with a predetermined pixel width in the shadow direction
4. Change from the above image part (I) to non-image part (NI)
The direction in which the shading point is detected is determined in relation to the direction.
Ru. In other words, in principle, shading is done from the image area when looking in the direction.
It detects the change point to the non-image area, but the orthogonal
When performing two-dimensional image processing in a coordinate system, for example,
From the upper left to the lower right of image I as shown in Figure 1(e)
Shadow line when light shines in the direction (So: shaded direction)
In SL, left to right direction (Sl) and top to bottom direction (S
The change point seen in (l) is imaged as shown in (f) of the same figure.
When the light shines from directly above to directly below (SO)
The shadow line SL indicates the change when viewed from top to bottom (Sl).
1 point, from the lower right of image I to the left, as shown in the same figure (Q).
In the shadow line SL when the light shines upward (SO),
From the right to the left (S3) and from the bottom (S4)
The change point in the sea urchin image I shown in the same figure (h)
Shadow line when light shines from left to right (SO)
In SL! The change seen from [to the right lr+1 (31)]
J of conversion point, etc.: It becomes like. Also, the direction of the above shadow can be determined in any direction.
However, the lower right/15 degree direction (see Figure 1(e)) is
-It's boat fishing and provides realistic shadow lines. The image processing device using the image shadow line extraction device described above is
1. In addition to the above 7jC configuration, as shown in Figure 1(b),
, a shadow image for processing the shadow image generated by the shadow image generation means 4
Pressure means 5 and image information read by image reading means 2
Original image (1) obtained based on information and shadow processing
Image synthesis means for synthesizing the processed shadow image from means 5
6a. The processing of the shadow image by the shadow image processing means 5 includes the color 2 conversion process of the shadow image and the process of converting the shadow image into a mesh image (mesh image).
), the process of converting a shadow image into a diagonal image (line or black),
) etc. refers to the processing of the expression form of the shadow image itself. A second image processing device using the above image shadow line extraction device
As shown in Figure 1 (C), the above image shadow line extraction
In addition to the configuration of the device, the image read by the image reading means 2
Processing the original image (I) obtained based on image information
The original image processing means 7 and the original image processing means 7
The processed image obtained by means 7 and the shadow image generating means 4
image synthesis means 6 for synthesizing the shadow image generated in
b. The image processing by the original image processing means 7 is based on the above shadow.
As in the case of image processing means 5, color conversion of the original image
processing, the process of converting the original image into a reticular image (
Shading〉, convert the original image to a diagonal image
Additions to the expression form of the original image itself, such as processing (drawing)
It refers to engineering. Furthermore, a third image processing device using the image shadow line extraction device described above is as shown in FIG. 1(d).
In addition to the configuration of the image shadow line extraction device, the above image reading means
The original image obtained based on the image information read in step 2.
Original image processing means 7 for processing the image (I) and a shadow
Shadow image processing that processes the shadow image generated by the image generation means 4
Processed image from means 5 and original image processing means 7
and the processed shadow image from the shadow image processing means 5.
It is equipped with a di-synthesizing means 6c. Image synthesis means 6a,
6b and 6c overlap the original image part and shadow part, respectively.
Although I perform a compositing process that combines them to create a new image.
It is. Processing in the same direction as the document scanning direction in image reading means 2
Real-time processing synchronized with reading by
In order to easily realize the above image change point detection,
Means 3 includes an image viewed in the scanning direction at 83 points for each scanning line.
Detects the change point from image part (1) to non-image (NI)
main scanning direction image change point detection means and each scanning line.
4. Change from image area (I) to non-image area (NI) viewed in the direction of movement of the image.
and sub-scanning direction image change point detection means for detecting points.
correspondingly, the shadow image generating means 4
is detected by the main scanning direction image change point detection means.
Generates a shadow image of a predetermined pixel width from the change point in the scanning direction.
Main scanning direction shadow image generation means and sub scanning direction image change means
Movement of the scanning line from the change point detected by the point detection means
Sub-scanning direction shadow image generator that generates a shadow image of a predetermined pixel width on the direction side
It shall be equipped with a means for In addition, as described above, the image reading means 2 sequentially
For processing equipment, as shown in Figure 1 (C)
The shadow is used to make it possible to generate a shadow image at an angle of 45 degrees (lower right).
and the main scanning direction shadow image generation means and the sub scanning direction shadow image generation means.
The generation method is to determine the inner cable unit to be generated from the detected change point.
Shifts the shadow image by one pixel in the scanning direction for each scanning line.
It is equipped with a shadow image generation shift means. This J: One pixel in each scanning direction for each scanning line
5 In the case where shadow images are generated pixel by pixel by shifting, the shadow images generated on the scanning direction side of each scanning line and
Continuity with the shadow image generated on the moving direction side of the scanning line
In order to ensure that the image change point detection means in the main scanning direction is
is an image part that changes from an image part to a non-image part
First image change inspection that detects side pixels as change points
output means and a non-image part that changes from an image part to a non-image part.
Second image in which pixels on the image side are detected as changing points
It is equipped with a change point detection means. Furthermore, in cases where the original image from which shadow images should be extracted is complex, etc.
In order to realize faithful shadow image generation even in
Means 4 (The image part of the shadow image to be generated
Shadow that prohibits shadow image generation in that part when it overlaps with (I)
It is equipped with means for inhibiting image generation. Well-balanced width depending on the size of the target image
In order to generate a shadow line in the shadow image, the shadow image generating means 4
A shadow width setting means that allows variable pixel width setting.
Become. The image reading means 2 is an image reader that has the function of reading multi-gradation 13 degree information, not just information about the presence or absence of an image.
In the case of shadow line extraction cracks, in order to facilitate the generation of shadow images,
The multi-tone density information read by the image reading means 2
image (I) and non-image based on predetermined reference values.
Binary image information that is converted into binary image information that differentiates (NI)
In addition to the conversion means, the image change point detection means 3
The target image information is converted into binary image information from the binary image information conversion means.
Then, the shadow image generation means 4 generates a shadow image obtained from the binary image information.
The device is equipped with a density conversion means that converts the density information into multi-gradation density information.
becomes. Similarly, the image reading means 2 reads multi-gradation m degree information.
For each image processing device with the function, the same as above
Image change point detection means 3, comprising binary image information conversion means;
Or image change point detection means 3 and original image processing
The target image information in means 7 is converted into binary image information from the binary image information converting means.
In addition to the value image information, the subsequent shadow image generation means 4, shadow image addition
each of the image synthesis means (6a, 6b, 6c)
The means performs processing using binary image information, and the two images obtained by the image 7 one-shot compositing means (6a, 6b, 6c)
A composite image that converts the value-side composite image into multi-tone density information.
The one equipped with image m degree conversion means roars. Furthermore, the density of the generated shadow image or composite image can be adjusted arbitrarily.
In particular, in order to be able to decide on the above concentration
The conversion means or composite image density conversion means
Density setting means that allows variable setting of multi-gradation density information.
Be prepared. [Operation] The image reading means 2 sequentially optically scans the original 1 to obtain a predetermined image.
The image information is read pixel by pixel. This read image information
Based on the information, the image change point detection means 3 draws the image on the original 1.
The image part (I) seen from a predetermined direction of the drawn image (I)
A change point from I) to a non-image portion (Nr) is detected. Therefore, from this detected image change point, the non-image
The predetermined shadowing to the (NI) side is performed by the shadow image generation means 4 in the direction.
A shadow image with a predetermined width of 1iTi+predetermined width is generated. And each picture
Statue room 1! J! 8 In the edict, firstly, the image processing means 5. is the shadow image generation means 4
Process the shadow image generated by
Based on the shadow image and the image information read by the image reading means 2.
image synthesis means 6 with the original image obtained.
A new composite image where a is composited and the shadow part is processed
is generated. Second, the original image processing means 7
obtained based on the image information read by the reading means 2.
The original image is processed and the resulting processed image is
image and the shadow image generated by the shadow image generation means 4.
The image compositing means 6b synthesizes the original image part and processes it.
A new composite image is obtained. Thirdly, the above shadow picture
Processed shadow image obtained by processing means 5 and the above original image
Image composition with the processed image obtained by processing means 7
The means 6c synthesizes the shadow part and the original image part.
A new composite image is obtained in which both have been processed. In particular, shadow images in the same direction as the scanning direction of the image reading means 2
When performing generation processing, for example, as shown in FIG.
), the main scanning direction image 9--ji change point detection means is provided in each scanning line (in the scanning direction).
From the image part (I) to the non-image part (NI
) is detected, and the scanning direction Sm is detected from the changing point.
On the side, the main scanning direction shadow image generation means has a predetermined l1IIi wire width (e.g.
For example, a shadow image with a width of 3 pixels is generated. Also, in the sub-scanning direction
The image change point is the image seen in the moving direction SS of each scanning line.
The change point from the image part (1) to the non-image part (NI)
Detection and moving direction SS side of the same scanning line from the change point
The shadow image generation means in the sub-scanning direction has a predetermined pixel width (for example, 3
Generates a shadow image with pixel width>. As a result, in Figure 1 (i)
Running direction 11'j for the image of a5 (hatched area)
J S m has a range Em from pixel position Cj+7 to Cj+9.
In addition, in the moving direction SS of the scanning line, there is a scanning line l.
Shadow images are generated in the range ES of i+6-L i+8, respectively.
. In addition, in those equipped with a shadow image generation shift means, the scanning light
Pixel on the scanning direction side 3m from the image change point at
After a shadow image is generated at position Cj → 7 (marked with ○), the shadow image
By the image generation shift means, the next scanning line is i+1.
1 pixel 0 in the scanning direction Shifted pixel position Ii & Cj + 8, and then the next scanning line
In L i+2, the pixel is further shifted by one pixel in the scanning direction Sm.
Shadow images are sequentially generated at position Cj+9. Scan the following in the same way
In the direction 3m, the pixel position in the scanning direction Sm from the image change point
After the shadow image is generated at position Cj+7,
Pixel position Cj+8 shifted by one pixel in the scanning direction Sm
, 0j+9, shadow images are sequentially generated. Also, the scanning light
The same goes for the moving direction SS of the scan line L i
Scanning line movement direction SS from the image change point at +6
After the shadow image is generated at the side pixel position Cj, the next scanning line is
Inl i+7, shifted by 1 pixel in the scanning direction 5l11
At pixel position Cj+1, in the next scanning line 11÷8
The pixel position Cj+ further shifted by one pixel in the scanning direction 5IIl
2, shadow images are sequentially generated. And from now on, the scan line
11+6 to 1148, pixel positions Cj+1, Cj
+2. Cj+3, pixel position Cj+2. Cj+3, Cj+
4 , . . . for each scanning line sequentially.
Shadow images are generated sequentially at pixel positions shifted one pixel at a time in the scanning direction.
be done. As a result, a shadow image is generated in the direction of 1 45 degrees to the right of the image (shaded area).If you follow the above process, the scanning direction will be 3m and the scanning line will move.
In the adjacent part of the image change point in the direction Ss, for example,
, no shadow image is generated at the pixel position marked with x in Fig. 1(i).
Not done. In this case, for example, as shown in Figure 1 (j)
In the main scanning direction image change point detection means, the first
An image change point detection means detects the image change point for each scan line.
Image part side pixel C changing from image part to non-image part
j (mu mark) is detected as a change point, and the second
Image change point detection means detects the image change point for each scan line.
Pixels on the non-image area that change from the image area to the non-image area
Cj+1 (△ mark) is detected as a changing point. therefore
, for each scanning line as described above from the rain detection change point.
Shadow images are sequentially displayed at pixel positions shifted one pixel at a time in the scanning direction.
is generated, one of the scan lines l-i
Shadow images are sequentially generated from the detected change point, that is, the pixel position Cj.
(O mark), generated on the scanning direction Sm side of each scanning line.
2 Shadow image generated on the SS side in the scanning line movement direction
continuity is ensured. ``Example'' The present invention will be described in detail below in the order of the table of contents.ContentsBasic configuration Image input sectionColor and dual information generation sectionShadow and line drawing generation sectionProcessed image generation section ■Outline extraction (white outline) ■Shading/lines [Image synthesis section Area processing Multivalue processing Image formation section Summary 3 ■Basic configuration The basic structure of the original scanning system is shown in Fig. 2, for example.
It's becoming a sea urchin. This is an opening at the top of the platen 12 on which the original 13 is placed.
A closeable platen force bar 14 is provided, while a
Light guide member 1 including a light source 15 and a Hilfock lens on both sides
6 and a one-dimensional image sensor 10 such as a CCD are arranged.
Together they constitute a scanning section. And this
The scanning unit moves parallelly (in the direction of the arrow in the figure) and scans the document 1.
In the process of performing the optical scanning of step 3, the image sensor 10
Based on the detection signal of each cell corresponding to the amount of received light output from the
Next, I looked at the gradation images, line diagrams, characters, etc. drawn in Manuscript 13-A.
Image information in corresponding predetermined pixel units is generated. Next, the basic configuration of the entire image processing device is, for example,
It is as shown in Figure 3. This example uses two-color image processing, e.g. black (main color)
) and red subcolor) image processing based on the premise of image formation.
It is a device. 2/1 In Fig. 3, 10 is a full-focus system that optically scans the original image.
sensor (equivalent to the image sensor shown in Figure 2)
, 20 are time-sharing units of cells from the full color sensor 10.
The color component of the predetermined pixel unit is
Convert them to data (green: G1 blue: B1 red: R) and
This is a sensor interface circuit that outputs in parallel.
full color sensor 10 and sensor toughness circuit
20 constitutes an image input section. 50 is the above cen
Each color component data (GB
Density information and color information as image information for each pixel from R)
This is a color image information generation circuit that generates this color image information.
The circuit 50 supports 256 gradation density data D and color information.
Sub color flag SCF and menu corresponding to the color “red”
Main color flag MC compatible with in-color “black”
Generating F. 70 is a signal from the color image information generation circuit 50.
Various types of density information and color information (SCF, MCF)
a correction/filter circuit that performs correction and filter processing;
100 is enlarged for the density 5 data D and color information (SCF, MCF) that have passed through the correction/filter circuit 70,
Editing/processing such as reduction, color inversion, etc.
It is an engineering circuit, and there is a shadow drawing in the editing/processing circuit 100 above.
It consists of a processing section, a processed image generation section, and an image composition section.
Ru. As described above, the correction/filter circuit 70 and the editing/filter circuit 70
Density data D and
Color information (SCF, MCF) is provided by the interface circuit 150
It is now provided to specific image forming equipment through
There is. This image forming equipment is a recorder that performs two-color reproduction.
There are 200 user printers, 1M260 image sending/receiving devices, etc.
Furthermore, the density data D and color information are sent to the computer 270.
rI(
Stored in a magnetic disk attached to the neck, etc., and used at the terminal device of each department.
System aspects that utilize this information are also possible. Above level
When connecting a user printer 200, two colors are used as a whole.
The copying machine is configured and the image transmitter/receiver 260 is connected.
If the facsimile is configured as a whole,
1゜6 ■, Original image input section This image input section and the color information generation section explained in the next section ■ are combined.
The image reading means, which is a component of the present invention, is specifically described.
It has become For example, the full force sensor 10 is as shown in FIG.
5 to achieve a predetermined dot density (16 dots/rtm)
10. CCD sensor depth. (1) to 10(5) are original
While alternating back and forth with respect to the document sub-scanning direction S,
They are arranged in a staggered pattern and have an integrated structure. Each C
The OD sensor chip 10 (11 to 10(5) is shown in FIG.
As shown, each cell (photoelectric conversion element) is partitioned diagonally.
Green G1 Blue B1 Red R filters (Zera
filters, etc.) are provided in order. And next door
Green filter cell 11g and blue filter hill 11 are in contact with each other
b and red filter cell 11r form a pair, and from each cell
level according to the received light fil (corresponding to the original reflectance).
The output signal is processed as a signal for one pixel P. 7 The sensor interface circuit 20 is basically arranged in a staggered manner.
Each CCD hinge depth 10 (1) ~ 10 (5
) is a correction function to align the color component signals (G, B, R) based on the output signals from
is processed serially as a signal from each cell of the chip.
Each color component signal +4 (G, B, R) is converted to the above pixel P unit.
The function of converting into parallel signals of - pixel P (each
Compensation for deviations in detection positions of color component signals (G, B, R)
It has normal functions, etc. The circuit shown in Figure 6 is a staggered arrangement of COD sensor chips.
This is a circuit that realizes the function of aligning the output from the
Ru. In the figure, each COD sensor chip 10(1) to 10
The signal that is serially output from (5) to each cell is
A/D conversion via amplifier circuits 21 (1) to 21 (5)
It is input to conversion circuits 22 (1) to 22 (5). In each A/D conversion circuit 22 (1) to 22 (5), the above
Example of Renly output j signal for each cell according to received light b1
For example, it is output as 8-bit data. Each of these A/D conversion circuits 22 (1) to 22 (5)
At the subsequent stage is a latch circuit 23 (1) for timing adjustment.
~23 (5) is provided, especially in the document sub-scanning direction S (
(see Figure 4), in front of other COD sensor chips.
CCD sensor chip 10 (2) and same 1 arranged in
For the system 4), the latch circuits 23 (2), 23
(4) At the subsequent stage, the “I”0 memory 24
．． 25 are provided. This “■FO memory 24.2
5 is the CCD sensor chip 10 (2) and 10 (4)
Delays the output timing of color component signals for the system.
Other CCD sensor chips 10(1), 10(3)
, Output of the same line signal for the system of 10(5)
This is to align the power timing. Therefore, the
While the write timing is determined to be a predetermined timing,
, the readout timing (delay amount) depends on the CCD sensor chip.
10(2) and 10(4) scan lines and other CCDs
The distance l1lIl between the scanning lines of the Sen No. Nadip (e.g.
, 62.54z m > and the full power sensor 10
Determined based on document scanning speed. For example, formed
9 If the scanning speed differs depending on the magnification of the image being
The read timing is controlled according to the magnification. In this way, the readout timing can be varied depending on the magnification, etc.
In this case, consider the case where the read timing is the maximum bW.
The capacity of the FIFO memory 24.25 is determined by
The memory capacity corresponds to the allowable delay amount. Each of these FIFOs
Latch circuits 26 (2), 26 after the memory 24 and 25
(4), while the CCD sensor chip 10 (1
), 10(3), and 10(5) above.
The latch circuits 23 (1), 23 (3), 23 (5
) is followed by a direct method latch circuit 26 (1), 2
6 (3) and 26 (5) are connected and FIFO2
The preceding CCD sensor chip 10 (2
), 10(4) system color component signal B and other sensor searches
The color component signals of the input system are connected to each latch 26 (11 to 2
6 In (6), those on the same scanning line are aligned,
It is transferred to the subsequent stage at a predetermined timing. Each latch circuit
26 (1) to 26 (5), we see that each color component signal
G → B -> corresponding to the cell arrangement of the COD sensor chip
R-) G-) B→R-)... They are transferred serially in the order 0. The circuit shown in FIG.
Each color component signal that is serially transferred in the
A circuit that realizes the function of converting pixel-by-pixel parallel signals
It is. In the figure, each of the above COD sensor chips 10(1) to
Serial-to-parallel conversion circuit 30 corresponding to 10(5)
(1) to 30 (5) are provided. Each of these series
Al-parallel conversion circuit 30 (iHi=1...., 5
) is the color component signal that is serially transferred as described above.
Latch circuit 31 g where (G, B, R) are input in parallel
, 31 b, 31 r obiko, 1l (D each uf times
The path 31o is active when transmitting the color component signal G (green).
clock signal, synchronized with jg4 (Q clock).
, 31b is activated when transmitting the color component signal @B (blue).
31" in synchronization with the clock signal (B clock)
is the clock signal that becomes active when transmitting the color component signal R (red).
latches each color component signal in synchronization with clock (R clock).
It has become so. In addition, each of the latch circuits 31q,
31b. 1 31 "In the subsequent stage, there is also a function to adjust the transfer timing.
Latch once again pixel by pixel 1~Latch 1~Latch
Circuits 32g, 32b, and 32r are provided, each of 1 to 32r.
Rice date latch 32g, 32b. 32r is the previous timing at the falling edge of the above R clock.
The latched data (color component signals) of each stage are relatched to the same level.
RuJ: The sea urchin is turning. Furthermore, this I ~ Rice Stater
The circuits 32<), 32b, 32r are
Its output is enabled by the enable signal (i) (i=1...,5).
Drive/non-drive of the force is controlled. The above serial-parallel conversion circuit 30 (1) to 30 (5)
) is the memory circuit 34 and the writing of this memory circuit 34.
Timing control circuit 36 that controls loading and reading
It has not been installed yet. Memory II+1 path 34 is for each color configuration.
It has a dedicated memory for minutes (G, B, R)@, and each color
Enable the above when writing %t-d to component memory.
(1) → (2) → (3) - → (4) → (5)
in turn switches its readiness state and its write access state.
By controlling the dress according to the prescribed rules, each color
One line of data is sequentially arranged in the memory for every 2 components (G, B, R).
It's becoming a sea urchin. Then, write a dedicated note for each color component.
Pixel-by-pixel color formation is achieved by sequentially reading out data from the pixels in parallel.
Minute data is transferred to the subsequent stage sequentially from one end of one line to the other.
Ru. Note that the write timing in the timing control circuit 36 is
This memory circuit 34 is
The resolution is converted at the border. For example, the memory circuit 34
Timing so that the resolution in the subsequent system is 400 SPI
The reading control circuit 36 controls the read timing.
. The circuit diagram shown in Figure 8 shows each color component (G, B) in one pixel.
, R) to realize the correction function regarding the deviation of the detection position.
It is a road. As shown in FIG. 5, due to the structure of the full color sensor 1o,
The reading positions of each color component G, B, and R within a pixel are spatially misaligned.
The signal from each cell is converted into a color component as it is.
When processed as a signal, other color pixels appear at the border of the black image.
Phenomenon that occurs, so-called goose] - Problems such as occurrence
occurs. Therefore, 3. This correction circuit is designed to prevent such occurrence of ghost 1.
In order to match the reading level of each color component,
This is how it was done. Specifically, each section shown in Figure 9
In the array of pixels, each color component when paying attention to the pixel PO.
The reading position is virtually compensated for to the position of cell G11.
It is correct b. The correction method is that the adjacent pixel p
Considering n-1, set the reading position of each color component in the cell Gn position.
The weighted average is calculated so that the That is, Gn = Gn... (1) Bn
= (Bn-1+2Bn)/3・(2)Rn-(2
Rn-1+Rn) /3-(3) calculates each color.
To get the minute data (Gn, Bn, Rn)
are doing. For example, the circuit shown in Figure 8 shows the circuit that realizes the above calculation.
There is a circuit shown. Color component data output pixel by pixel by the circuit shown in Figure 7.
data is input to the correction circuit in parallel.
Ru. As for the G component system, the latch circuit 38g
For the B component system 4, the next latch circuit 4 is installed after the latch circuit 38b.
1 and the bit latched by the latch circuit 38b.
A shifter 42 for shifting is provided, and a latch circuit 4
Add the latch data of 1 and the shift data of shifter 42
Add the adder 43 and the addition result in this adder 43.
A lookup table that outputs 1/3 of that as a response input.
A ROM (ROM) 44 is provided. Also, the R component
Regarding the system, the next latch circuit is installed after the latch circuit 38.
The data latched by the circuit 45 and the latch circuit 45 is
A shifter 46 is provided to shift the lap.
Latch data in circuit 38 and shift data in chic 46
Adder 46 that adds the data and the addition result of this adder 46
A rule that outputs 1/3 of the address as above as input address.
A backup table (ROM) 48 is set up.
. With this configuration, in the G component system, the above equation (1>
By realizing 1 pip 1-shift], the number of operations is doubled.
Therefore, in the system of B component, the above formula (2), R
In the component system, the above equation (3) is realized. The above is the full color sensor 10 and Senna interface.
The 7A basic configuration of the image input section consisting of the circuit 20
Yes, when scanning a document with the full color sensor 10,
Each color component data (G,
B, R) are displayed sequentially. Each color component signal that has been processed in the image input section as described above.
-Processing such as shading correction performed for boat fishing
The information is then transferred to a color image information generation section, which will be described next. ■0 color image information generation section FIG. 10 shows a specific example of the color image information generation circuit 50 in FIG.
It shows a similar structure. In the figure, from the Senna interface circuit 20,
Among the color component data transferred pixel by pixel, G component data
Calculate the difference (R-G) between R component data and R component data manually.
Input the subtraction circuit 51, B component data and R component data.
A subtraction circuit 52 is provided to calculate the difference (R-B)6. Each subtraction circuit
The subtraction result in 51 and 52 is used as a lookup table in parallel.
It is input to the address end of the bull 53. lookupte
Table 53 LJ Based on the above subtraction results, calculate the value of the pixel.
Outputs the product of saturation 01 hue mouth (mouth x C) and color discrimination
It is read in 8-bit units, for example
For example, if the upper 5 bits are (1-1x C), the lower 3
The bits are divided into color judgment outputs (=J is excluded).The contents of the above lookup table 53 are, for example, as follows.
It is stipulated in As shown in Figure 11, the red (R) color component and the green (G) color component
The vertical axis represents the difference between the color components (R-G), and the difference between the red (R) color component and blue.
The color space whose horizontal axis is the difference (R-B) from the color component of (B)
When set, any distance from the origin O and rotation angle θ can be set.
The color is identified. The distance "is a factor that mainly determines the saturation C, and the color
The closer to the origin O in space, the more the culm approaches achromatic color.1. Ma
In addition, the rotation angle θ is mainly a factor that determines the hue.
I'm here. For example, in the 7th pattern of "red" and "magenta", it is distributed in the position surrounded by the broken line in Figure 11.
. From the above relationship, (R-G) data and (R-8)
Calculate from the data according to r = ((R-G)2+ (R-8)2)Σ
The distance 11 r from the origin that can be measured and the same (RG) data
From the (R-B) data, according to θ-tan 1 ((R-G)/(R-8))
Within the color space specified by the required rotation angle θ
Color judgment is made at the position. Also, the saturation C is (R-G) data and (R-B) data.
The relationship between the distance from the origin determined by the above formula and the saturation C
, for example, the experimentally determined relationship shown in Figure 12
Therefore, it is required. In addition, in FIG. 12, the distance lil
When ltr becomes smaller than a predetermined value rO, the color becomes achromatic.
The saturation C becomes II O II. Furthermore, "hue)" is (RG) data and (R-8) data.
The relationship between the same angle θ and the hue 1-1 determined by the above formula, for example, the relationship determined experimentally as shown in FIG.
required according to the person in charge. In addition, in Fig. 13, rotation
When the angle θ is smaller than the predetermined value θ0, the hue opening is forced.
II OII What's up? In this way, the color discrimination result, saturation C and hue mouth are both (R
-G) data and (R-B) data.
Therefore, (R-G) and
Lookup table with (R-8> as address input)
53 performs the above calculations, judgments, etc., and determines the color.
Output and output the product of saturation C and hue mouth (Cx mouth)
It is configured like this. And as mentioned above (CXH
) value is expressed in 5 bits, and the color discrimination result is expressed in 3 bits.
For example, 9 Table 1 is expressed as shown in Table 1 above. In addition, the above-mentioned FIG. 12 and FIG.
The relationship shown in Figure 13 is related to the color separation required for the system.
There are many ways to look at it, depending on your ability to do so. In addition, in Fig. 10, the data is input in parallel pixel by pixel.
Each color component data is processed by a multiplication circuit 5 whose G component data is multiplied by 06.
4, and 55 multiplication circuits with B component data of 0.1 times.
The R component data is input to the multiplier circuit 56 which is multiplied by 0.3.
ing. The multiplication results in each multiplication circuit 54゜55.56 are
0 is input to the adder circuit 57, and the addition result in this adder circuit 57 is VV = 0.6.
G +〇, 3R + 0.1B is the brightness data of the pixel
and then transferred to the subsequent stage. The above brightness data V is the G component data of the color component data GBR.
Simply simplify the data and use that value as the B component data and R component data.
It is generated by taking into account the value. This is an image sensor (
Spectral sensitivity of G component signal in full color sensor 10)
This is because the curve has characteristics similar to the human specific luminous efficiency curve.
It is. Each coefficient (each multiplication
The multiplication value in the calculation circuit is the spectral sensitivity of the image sensor.
The final value is determined by the characteristics, spectral distribution of the exposure lamp, etc.
It is something that can be done. Furthermore, as mentioned above, the spectral sensitivity characteristic of the G component signal is different from that of humans.
Since it is close to the specific luminosity characteristic, it is required for the system.
This brightness data V is G component data according to the ability to
It is also possible to use Output related to saturation and /11 hue from the lookup table 53 (mouth X'C), color discrimination data, and addition
The brightness data V from the circuit 57 is
This lookup table is
Bull 58 is color density data corresponding to address manual power [)C
I have a function that outputs C. Specifically, the color density data [)C determined according to the formula [)C=KXCXmouth×V] is output by marking each of the above inputs. Here, K is a coefficient that varies depending on the color determination data. In this coefficient, for chromatic and achromatic colors, the right chromatic color is brighter.
From what we feel, we can combine the brightness levels of this chromatic color and achromatic color.
It is intended to be used experimentally in advance according to each discrimination color.
For example, the value is within the range of about 1.1 to 13.
is set to the value of Color discrimination output (3 bits) from the above lookup table 53
) and the color selection data set in the latch circuit 60 are
The color selection data is input to the matching circuit 59, and the color discrimination output is the color selection data.
When the 11 and 59 match, the output of 11 and 59 is
Standing at the bell - [2] Standing at the bell. This color selection data can be input by the operator or
The above is based on the setting input using dip switches etc.
Sera 1 to latch circuit 60 are connected to the sub color.
3-bit data corresponding to the color to be reproduced (see Group 1 above)
(see). The outputs of the five matching circuits are set by color selection.
υ button indicating whether the color is a subcolor (e.g. red).
It functions as a color flag SCF (color information), and furthermore,
This serves as the output selection signal (SEL) of the selection circuits 61 and 62.
ing. The selection circuit 61 selects a bright state according to the state of the selection signal.
Press the function to switch between degree data■ and ``0'' data.
When the selection signal is at the 1-1 level, the OII data is output.
, outputs brightness data V when the selection signal is at L level.
It has become so. The selection circuit 62 is in the state of the selection signal.
Accordingly, the color density data D from the lookup table 58
The function of switching between the data from the selection circuit 61 and the c.
color density data when the selection signal is low level.
[)C is selected by the selection circuit (5) when the selection signal is at L level.
J who outputs the data from 1: The sea urchin is turning. 3 In addition, the output bit of the selection circuit 61 is directly sent to the OR circuit 6.
3)j, and the output of this OR circuit 63 is the main
Main color indicating whether it is a color (e.g. black)
While functioning as a flag MCF (color information), the selection times
The output of line 62 is dark 1. Q j”-transferred to the subsequent stage as
It will be done. In the above color image information generation circuit, the main color of the original is
- (black) area, the outputs of the five matching circuits are at L level.
As a result, the brightness data V from the adder circuit 57 remains unchanged.
After passing through the selection circuits 61 and 62, the density data D is sent to the subsequent stage.
will be forwarded to. At this time, make sure that the melon data V is not O''.
From this, the main color flag MCF becomes low level, and one
Since the output of the matching circuit 59 is at U level, the Zab color
Flag SCF becomes level 1 (at a3 in Figure 1/1)
Main color area [see m). In addition, the original color
In a region (for example, red), the output of the matching circuit 59 is
1-1 level, and from the lookup table 58
The color density data of passes through the selection circuit 62 and becomes density data D.
is transferred to the subsequent stage. . 4 At this time, since the output of the selection circuit 61 is O'',
Main color flag M CF goes to L level and matches.
Since the output of path 59 is low level, the sub color flag is
The subcolor SCF becomes low level (subcolor in Figure 14).
See area ES>. Furthermore, the background area of the original (density II O
In I+), selection times! The output of 861 is 1101
With +, the output j of the matching circuit 59 will also become 1 level.
Then, it became 'CJrU data D day 101+ and became the main camera.
Color flag MCF and sub color flag SCF are both 1
level (see dorsal head region [n in Fig. 14). Each of the above calculation circuits controls the timing control circuit (not shown).
The drive is synchronized pixel by pixel at the bottom, and the dark
Degree data D and color flags (MSF, SMF) are the same
The next stage correction/filter circuit uses the data as a pair of pixels.
70 and transferred to the ship. In this way, density button D and color flag (MCF, 5C
F) is the correction/filter transferred pixel by pixel.
The data circuit 70 performs correction processing, for example, the color of the reading optical system.
Due to aberrations, bias in color sensitivity, etc. of the full color sensor 10, the main color (black) and the back and neck (white)
), there is a dot that has been determined to be Zab color (red).
Ghosts - (Appearance 3) Ghosts to prevent
Various correction processing such as correction, filter processing, e.g.
, MTF correction to emphasize high frequencies, and to prevent moiré.
Various filter processing such as high-frequency cut correction is performed. ■, Shadow line drawing generation unit This shadow line drawing generation unit generates an image, which is a component of the present invention.
A change inspection means and a shadow image generation means are embodied. FIG. 15 shows a binarization circuit, which is a specific configuration of the present invention.
It embodies the binary image information conversion means that is a requirement. In the figure, 101 is a correction/filter as described above.
256W from the color image information generation circuit 50 via the circuit 70
Density data D of three-tone representation yA (multi-gradation expression) and predetermined binary values
There is a comparison circuit that compares the
1 has the function of converting the multi-gradation expression data D into binary image data.
Ru. Similarly, the main signal from the color image information generation circuit 50 is
Color flag MCF, Zabu color flag SCF are above people
'7'' -1-] with binarized image data
input to each AND gate 102゜103 to be
The output of AND gate 102 is the new main color flag
Andobuto 103 output is a new sub color for MCF
The flag is SCF. With this configuration, the density data D of multi-gradation expression
Corresponding main color flag MCF, sub color flag S
CF is, for example, a binary image data as shown in FIG.
data and new main color flag MCF, sub color flag
lag SCF. In other words, the image data is the density
State that occurs when data D exceeds the binarization level
(Image part), new main color flag MC
[And the new Zabu Color Flag SCF is
The image data is returned to the original flag state only when it is in the rising state.
When the data is in a falling state (non-Esif part), it is forcibly brought down.Furthermore, each scanning line Lnfa is set to 49 as described above.
image data (n), main color flag MCF (n
), 4-knob color flag 5CF(n) is first-in, first-out
'I'0 of the formula is provided to the memory 104, and the overload of each scan is
The image data at the same pixel position one line before (
n-1), main color flag MCF (n-1), sub
Color flag S CF (n-1) is FIFO memory 1
Yes, as you can get from 04. The entire shadow line extraction circuit 4i'4 or, for example, as shown in FIG.
It is as shown. The image data of the line of interest L output from the above binarization circuit.
The motor (n) also connects one line through the inverter 111.
The image data (nl) with the same pixel color and position before
are input to the AND gate 112. Here, sub-scan
At the point where the direction changes from the image part to the non-image part
The image data changes from 1-1 level to L level.
Rode (image pig (n-1) = l-1, image data
(n) = 1), the output of Antoge 8 and Toto 112 becomes low level. Therefore, andgame
The output of port 112 changes from an image part to a non-image part.
Point detection signal, i.e. sub-scanning direction image change point detection signal
The number roars. On the other hand, the image on the line of interest output from the binarization circuit
The image data (n) has a change point in the main scanning direction at 1iil O,%.
It is input to the detection circuit 120. This main scanning direction change point
The specific configuration of the detection circuit 120 is shown in FIG. 18, for example.
It is as shown. The image data from the binarization circuit is, for example, shifted in two stages.
It is input to the register, and the register output and binary value of each stage
An image of 3 pixels continuous in the scanning direction from the output from the conversion circuit
Obtain data (m-1), (m), (n++1)
(not shown). In FIG. 18, the above three pixels consecutive in the scanning direction
As for the image data, the central image data (m) is AND gate 1
22 and other inputs via the inverter 123.
The image data (
m+1) is connected to the anime game h1 via the inverter 121.
22, the image data (m-1) that is 91 pixels ahead is input to AND gate 1.
24 is entered. Here, ′ is the main scanning direction.
The image changes from the image part to the non-image part with respect to the direction.
When focusing on the pixel on the side of the image, the image data of the pixel of interest (
m) is the low level, and the image data of the delayed pixel (m+1)
becomes 1 level, and as a result, AND gate 122 output
becomes low level. Also, non-image from the same image section
If we pay attention to the non-image side pixels that change gradually, we can see that the
The image pig (m) of the eye pixel is at L level, leading by one pixel.
The image data (m-1) of the pixel becomes low level, and the result is
As a result, the output of the AND gate 124 becomes low level. Immediately
, the horns of Ando Goo 1 to 122 are removed from the image section.
Pixels on the image side that change to the image area are detected as changing points.
First main scanning direction image change point detection signal (m)
And the output of Ando Goo 1 to 124 is from the image part
The non-image side pixel that changes to the non-image part is taken as the change point.
Detecting the second one run by detecting the direction image change point (June)
m +1). Furthermore, in FIG. 17, the change in the main scanning direction F is 0.
image change point detection information) and from AND gate 112.
The image change point detection signal in the sub-scanning direction is OR gate 1.
25 is entered. As a result, this orgate 125
The output is the image in the main scanning direction and sub-scanning direction.
A signal that rises at the transition point from the image part to the non-image part, i.e.
, becomes the image change point signal. On the other hand, 128 is a storage corresponding to each pixel position of the scanning line.
A FIFO configuration (first-in, first-out) library that controls addresses
memory. This line memory 128 has, for example, 8
The upper 7 bits of the bit data line (maximum 127
> is the numerical data related to the shadow line, and the least significant bit is the flag data.
video clock (V, CLOCK
) is its read/write clock (to RCK/WC),
A video valid signal (V,
VAD ) is its read/write enable signal (RE
/WE) and read/write based on each of those signals.
It is now under control. 130 is a selection circuit
Yes, this selection circuit 130 is set as the shadow line width to be extracted.
(=t I-J setting width X (7 bits) and the effect described later)
8 pins consisting of a flag at the time of detection (1 pin 1 ~)
1 to data (A> and 8 bits from the line memory 128 above)
data (7-bit data related to the shadow line and flag data)
Selectively output one of the following (Y)
- It has 16 functions. Specifically, the selection signal S is 1
When the B input side is at the 1 level, the selection signal S is at the L level.
The input side is selected respectively when . So
Then, stand at the image change point in the ↓ scanning direction and sub-scanning direction.
Up 5 [l! Image change from A Agate 125
The point signal serves as a selection signal for this selection circuit 130. In addition, the above shaded C-pup setting width data X +, 1, operation
When data specifies its pixel width W (operation input), X =
128+1-w and is supplied to this selection circuit 130. 131 is an adder circuit, and this adder circuit 131 is
The 7-bit data regarding the shadow line from the selection circuit 130 is input to the OR gate 12.
5 output bit to inverter 132, AND gate 1
1″ or 110 II Deday obtained via 33
As input B, the operation (Σ) of A+B is performed.
. Here, the shadow line read from the line memory 128
The 7-bit data in the
The bits are logically summed, and this logical sum signal is
to the page sync signal (PAGE 5YNC) indicating the
gate control 1] - via the AND gate 138 which is controlled by
AND gate 1 at the 8-input front stage of the adder circuit 131
There are 33 control signals. Also, 134.
135 is a flip 70 tube with an 8-bit structure, and the front stage
The flip-flop 134 is connected to the video clock (V, CL
7 bits from the adder circuit 131 in synchronization with
-Additional data (Σ) and flag from the selection circuit 131
The 1-bit data related to the data is latched, and the subsequent flip
The flop 135 is connected to the video clock by the inverter 136.
The flip-flop is synchronized with the inverted signal of the clock (VCLOCK).
Loop 3 Re-latches the 8 pins 1~data latched to 134 as is.
It's starting to look like this. Next, 70 flips in the second half
Of the 8-bit data of block 135, 7 bits related to the shadow line
Each bit of data related to the data flag is distinguished.
It is fed back to the line memory 128 in the same state. Furthermore, the image change point signal from the OR gate 125 is
It becomes the input gate 1111's 1 to 2 signal and
The inverted signal passed through the inverter 140 is the AND gate 1
42 = 1 n 1 herol signal. in this way
The gate-controlled AND gate 141 has the above
The edge detection 0 temple flag is lit in the AND gate 142.
7 lag data from in-memory 128 is input and
The output signals of gates 141 and 142 are A-1 to A-1, respectively.
143 is entered. The output of this oagu 1-143
When the signal becomes the control signal of AND gate 145
The inverted signal passed through the inverter 144 is the AND gate.
This is a control signal for the port 146. Each of these
The second gates 145 and 146 further invert the image data (n) through the inverter 147.
The gate is controlled by
The image change point signal and the output signal of the AND gate 138
Ant game 1-145 via or gate 139
, 146 in parallel. Then, this a
The output of the second gate 145 is expressed in the subcolor (red).
SC shadow image signal indicating the shadow image of the AND gate 146
M indicates a shadow image whose output is expressed in the main color (black)
It is a C shadow image signal. The edge detection flag described above will be explained. The image processing device processes two color data (main color and sub color).
Since we are dealing with non-image parts from the image part.
When a change point (edge) to the edge is detected, the
The color is expressed as a flag when an edge is detected. That hula
For example, the specific circuit for generating the signal is as shown in Figure 19.
It has become. In the figure, a second main scanning direction image change point detection signal (m
”l) (And gate 127I shown in Figure 18)
output) and new sub color flag (m-1) (Fig. 15)
AND gate 103 output) and the AND input
Gate 151 and sub-scanning direction image change point signal (n)
(Figure 17 shows (pull-and-gate 112 output) and 1 line.
1i1 knob color flag S CF in front of the input (see Figure 15)
O(puru'I'0me7ri10/l's output from 10/l'
and an AND gate 152 to which each AND gate is input.
The output signals of gates 151 and 152 are input to OR gate 153.
are doing. Here, the output of the AND gate 151 is the main scanning
The boundary where the direction changes from the image part to the non-image part
The color flag of the pixel at the boundary point is the color flag of the second main scanning direction image.
The image change point signal changes from the image part to the non-image part.
Since it is vertical-E at the non-image side pixel, the
Sub color flag S CF of pixels belonging to the image part
(m-1) as the color flag of pixel (m) at the relevant change point.
There is. Also, the outputs of Ando Goo 1 to 152 are related to sub-scanning.
This is the color flag of the pixel at the boundary point that has changed from the image area to the non-image area.
The change from the image part to the non-image part changes the pixels of the non-image part.
Since it is determined when reading, the relevant reading pixel (n
) Sub color flag of pixel (n-1) one line before
S CF (n-1) is the color graph of pixel (n) at the relevant change point.
It's laggy. Furthermore, regarding the main scanning direction, the main scanning direction change point detection circuit is
Detection of change point in the image of the first foot in the direction from Route 120
Signal (■) (AND gate 122 output in Fig. 18)
) and new sub color flag SCF (m) (in Figure 15)
AND gate 103 output)
154 is stoned. The output of this andgoo 1-154
is basically the main run, similar to the output of Antogame 1151 above.
The scanning direction has changed from the image area to the non-image area.
The color flag of the boundary point, in this case the first main scanning direction.
The direction image change point signal is transferred from the image part to the non-image part.
Since it rises at the pixel on the side of the changing image area, the
Zab color flag S CF (m
) is used as the 7-color flag of the pixel (III) at the change point. IT, output signal from OR gate 153
The output signal of gate 154 is input to OR gate 155, and this
The output of ORGATE 155 is the final ■ Fuji detection flag
It has become This edge detection flag is set to low level.
Togi shows that it is Zabu color, and conversely when it is L level
indicates the main color. Next, using the eel rectangular image shown in Figure 20(a) as an example,
The shadow line extraction process will be specifically explained. In this rectangular image, the diagonal line on the left side is the main color (black).
, the right side halftone area is sub-color (red).
, each scanning line has a 17-dot (pixel) structure for simplicity.
Assuming that each pixel position in the line memory 128 is
The address corresponding to 17) has °O′″ as an initial value.
How is it stored? Also, the operator can set
The input shadow line width W is w=3 pixels. The full color sensor 10 performs optical scanning by sequentially moving the scanning line ``1°8 L2.L3...''.
In the process of
Since there is no image data corresponding to each read pixel.
The data remains at L level. Furthermore, scan lines 4 to L8
Between “Image data” and “MCF” in Figure 21
The video corresponding to the image as shown in “SCF”
From 4 clocks (pixels) of clock (VCLOCK)
By the 13th clock [when the image data starts up]
In both cases, the main color flag MCl- changes from 1 clock to 9.
During the clock, the subcolor flag SCF continues
Low level status from 10th clock to 13th clock
becomes. Furthermore, after scanning line l-9, the image is
Since there is no image data, the main color
MCF, Zab color flag SC are respectively falling, L
Samurai level N. In the process of the above scanning, 6 rock waves of each part in each scanning line
The shape is as shown in Figure 21. Scanning line 1-1~
Between 3 and 3, the main character is that there is no image.
Direction change point detection - Main scanning direction image change point detection signal of vf1120 to 9 and AND gate
The sub-scanning direction image change point detection signals from 112 are both
Links the L level, and as a result, from A agate 125
The output signal (image change point signal) becomes L level.
Due to the
Therefore, both the MC shadow image signal and the SC shadow image signal 8 are at the 1-level.
The state is maintained. At this point, line memory 12
The contents of 8 are the address corresponding to each pixel position and the ``0'' data.
The data ('0'' for both shadow width and flag) is returned as is.
and then written again. Furthermore, in scan twin 1-4 83, the image in the main scanning direction is
level change point detection signal (first detection signal and second detection signal)
Logical sum of signals) (a) from image part to non-image part
The change position of 13 clock and 14 clock "1 tick is 1-"
1 level, while the image change point detection signal in the sub-scanning direction
No. (AND gate 112 output) (b) is the relevant scanning line.
4) [Turn in the sub-scanning direction (scanning line movement direction)]
There is no change from the image part to the non-image part
From L, 0 bell will be held. In this state, main scanning
13 clocks where the direction image detection signal (a) has four levels
The output of the OR gate 125 is 11 when the clock is 14 and the clock is 14.
level, and gate 15 at 13 clocks
4 (Fig. 19) Output, 14 clocks and 1 to 1
51 (Fig. 19) Outputs are at low level and edge detection is performed.
The output flag (C) is set at the same timing (13 and 14 clocks).
) becomes low level. As a result, at 13 clocks, the picture
Since the image data is rising, AND gate 145.
Both of 146 and 146 remain in a prohibited state, but 14
At the clock, the image data falls, and at the AND gate
The output of 141 becomes low level, especially AND gate 14.
The output of 5 becomes low level. That is, the MC image signal
No. (andbutton 146 output) (d) falls to 1-level.
On the other hand, the SC shadow image signal (AND gate
145 output) (e) is at low level at 14 clocks.
becomes. In the above process, the angle output from the selection circuit 131O at 13 clocks is set width data x X = 128
+1-3=126 (w = 3) is the adder circuit 13
1 (8 input is 'O') at the rising edge of 13 clock.
[flip 1] set on knob 134,
Set in flip-flop 135 at the falling edge of
After that, line memory 12 is loaded at the rising edge of 14
Written to the address corresponding to pixel position 8 @(14)
. Similarly, at clock 14, the selection circuit 130 outputs the
Shaded number setting radius data X-126 and edge detection
The output flag becomes 8-bit data and shifts by 1 clock.
Corresponds to pixel level Fff (15) of line memory 128
written to the address. Note that other pixel positions ii'? of the line memory 128? (1)
~ (13), (16) ~ (17) to the address corresponding to
"OIT day" is written. In the next scanning line L5, the "OIT date" is written.
As in the case, if the main scanning direction image detection signal (a> is 1
As soon as you reach level 11 with 3 clocks or 1/l clock
, sub-scanning internal image change inspection 2 What happens when the output signal (b) maintains the L level?
The detection flag (C) is set at the corresponding 13th and 14th clocks.
It becomes low level at the right timing. Therefore, same as above
MC shadow image signal (andketo 146 output) (d) is L
While maintaining the level, SC shadow image signal 8 (and
1 to 145 output) (e) is 1/l [1 at 1 turn]
Bell yells. Furthermore, at 15 clocks, line memory 12
8 to pixel position (15) data (previous scanning line 1-4
data written in>, that is, data related to shadow lines (
7 bits) “126” and flag data (1 bit h
) “1” is read out, OAG 1-137 output, and A
At the same time as the output of the Dogo Mill 138 becomes low level, the
Toge-1-1'1.2 output becomes 11 level, and the result is
As a result, the 87C shadow image signal (AND gate 145 output) is
Then he stood up and yelled. Note that the SC shadow image signal falls at the 17th clock. In this process, 13 clocks are added as in the case of scanning line L4.
The shadow setting width “126” and edge detection flag “1” output at clock and clock 14 are 1.
128 pixels (1/F?(
14) and (15). And furthermore, 1590
1F recorded shadow line read out from line memory 128 by
The data “12 G” related to t
+ 1 ++ is added to become 127” and the flag is
7 lip-flops 134, 135 with data ``1''
Line memory 128f/)1n! ii Misaligned picture
It is written to the address corresponding to prime position ff1 (16). At the next scanning line 1G (Yo, 1-scanning direction image change
Point detection signal (a), sub-scanning direction image change point detection signal
(b), the state of the edge detection flag (C) is
This is similar to the case of lines L4 and L5. Therefore, the above
and fFi], MC Shadow Image Communication E (AND Gate 146 output)
force) (d> maintains the L level, and the SC shadow image signal
No. (AND gate 145 output) (e> becomes 14 clock
It becomes low level. Additionally, at 15 clocks, the scan line
1.5, the pixel position of the line memory 128
The data stored in (15) (regarding the shadow line “ 126
“4 Flag data “1”> outputs AND gate 145.
]-1 level, and the SC shadow image data continues to rise.
The state will be as follows. Furthermore, at the 16th clock, the line
Data at pixel position (16) from memory 128 (previous scan color)
(data written in step 5), that is, the data related to the shadow line.
7 bits 1~) 127” flag data “1” is read.
Similarly, the AND gate 145 output is low level and 1.
5, the SC shadow image data continues to rise.
Ru. In the above processing process for line 16, this run is the same as above.
Shading output at clocks 13 and 14 in
Setting width “126” and edge detection flag “1” is 1 stroke
Pixel positions 414) and (414) of the line memory 128 are shifted pixel by element
15). Then, at the 15th clock, the above run
As in the case of scan line L5, the image in line memory 128
Shadow line read from address corresponding to prime position (15)
is obtained by adding '1' to the data '126'.
"127" is the picture of line memory 128 which is shifted by one pixel.
It is written to the address corresponding to the elementary position (16). Furthermore
, 5 Read from line memory 128 at 16 clocks
Data “127” regarding the recorded line is added to the adder circuit 131
111 II is added at "128", that is, 7
In bit representation, it becomes II O11 and the line memory 128
to the address corresponding to the pixel position (17) shifted by one pixel.
written. Thereafter, scanning line L7. At L8, same as scan line L6
MC shadow image signal H3 (AND gate 14
6 output> maintains the 1- level, and the 14 clock
to 16 clocks, the SC shadow image signal (AND GO 1
~145 output) is at level 11. In addition, 17
In the clock, the line memory 128 is stored in the previous scan line.
The data written to the address corresponding to pixel position (17)
Since the data is 110 II, the SC shadow image signal is [
fall to the level. When the scanning line further shifts to 19, this scanning line L
9, in the main scanning direction, from the image area to the non-image area.
The image in the main scanning direction as there is no change to the
While maintaining the change point detection level M(a)I, L6 level is detected, especially in the sub-scanning direction.
From the image section to the 13th clock
Because there is a change in the image in the sub-scanning direction,
The change point detection signal (AND gate 112) (b) is low level.
Le's four dogs are yelling. Mako, this sub-scanning direction image
1. When the state of detection is L2"i, the
The output of the second gate 152 causes the sub color flag SCF to rise.
Due to the rising frontage level, edge detection efficiency is reduced.
Frontage of lug (C) from 10 clocks to 13 clocks
level condition. In this state, from 4 clocks to 9 clocks.
Up to Rock, the image change point from ORGATE 125
The number is low level, and the edge detectability flag (C) is 1-level.
Therefore, inverter 144 output and OR gate
139 output becomes low level, AND gate 146
The output is at low level. Edge detection continues from 10th clock to 13th clock
Because the sex flag (C) is level 11,
gate 143 switches to low level and AND gate 146
The output of the amplifier becomes the 1-level, while the output of the AN7 dog 145 becomes the low level. Therefore, M.C.
Frontage level of shadow image signal 0 from 4th clock to 9th clock
The SC shadow image signal becomes 1 from the next 10 clocks.
The state remains at the 1-1 level until 3 clocks. Furthermore,
At 14 clocks, pixel 1/H is transferred from line memory 128.
'I (14) data (1) written in 4-sash twin L8
data), i.e., paper width data (7-bit
-) 126” and flag pig (1 bit > (L
1 II is read, the OR gate 137 output, and the amplifier
When the gate 138 output becomes 1-1 level, the amplifier
The gate 142 output becomes 1-1 level, and as a result,
SC Kage 1 Iji Noburo (AND gate 145 output) stands
maintain the elevated position. Also, when knocking on the 15th, it is read from the line memory 128.
Data of pixel position (15) (with respect to paper width ' 1
26”, flag data “1”), 16 clock
Pixel position (16) read from the same line memory 128
data (paper width C゛127", flag data 11
111), similarly, and gate 145 output horn,
That is, the SC shadow image signal has an 11 level and 8 levels. As a result, the SC shadow image signal is clocked at the 13th clock.
From 16 to 1, maintain level 11 until 1 clock. In the above process, from 4 clock to 9 clock, select times
Shading from path 130 is based on set radius X = 126 and edge detection
The gender flag-II OII is output, and this 8-pin
l-data is a Noritub flop 134. 135, the line memory 128 is shifted by one pixel.
Write to addresses corresponding to pixel positions (5) to (10)
It will be done. Also, select from 10 clocks to 13 clocks.
Only the edge detectability flag output from the circuit 130 is 1.
11 II, and its state (as for the paper width, ''' 1
26”) and the corresponding 8-bit data is also stored in the line memo.
Fit pixels and positions shifted by 1 pixel of 128 (11)
~(14). Additionally, 14 clocks and 15
The pixel position ffff(1
4) Data regarding paper width read from (15) '1
26" is added by 1" in the addition circuit 131 and becomes 127.
”' roar, line with flag data rt 1 Jl
It is written to the address corresponding to (15)9 (16), which is a pixel position shifted by one pixel in the memory 128. Also, 16
The pixel position (16) of the line memory 128 is determined by the clock.
The paper width data “' 127” read from
In the circuit 131, "1" is added to "12B", that is, "O
゛′, and the line memory is stored along with the corresponding flag data.
Corresponding to the position 11 (17) of 128, which is shifted by 1 pixel.
written to the address. Following the above scanning line L9, in <Llo, the main scanning direction and
There is a change from the image area to the non-image area in both the sub-scanning direction.
Since there is no image change point detection signal in the main scanning direction,
No. (a), sub-scanning direction image change point detection signal (b) and
The edge detection flag (C) always maintains L level.
. In this state, the image change from Oagu 1-125
At the same time that the conversion point detection signal goes to L level, the previous scanning line L9
From 5 clocks to 10 clocks, which is one clock shift from
The spaces between are pixel positions (5) to (10) of the line memory 128.
Data read from (written on 116 running platform line L9)
126
Due to the "do flag data "0", the output of the Aage 0 1137 and the OR gate 139 goes low level.
At the same time, the impark 144 output becomes 11 level and M
C shadow image signal (AND gate 146 output) (d) is 1
1st level roar, 7 more, 11th clock to 14th clock
The pixel position (11) of the line memory 128 is
The data read from ~(14) is only flag data.
changes to 1″, so the OR gate 143 output is
The signal rises, the inverter 144 output falls, and then
As a result, the MC shadow image signal becomes L level and the SC shadow image
Signal (AND gate 145 output) (e> becomes low level)
Ru. Furthermore, at 15.16 clocks, the line memory
Data read from 128, related to paper width' 127
” and the flag data II I IN, the SC shadow is
The image signal maintains eye level. As a result, SC shadow image
The image signal can also maintain a frontage level of 15.16 clocks.
Ru. In the above process, the line between 5 clocks and 10 clocks
Data read from memory 128 (with respect to paper width)
126", flag data "'o"> and 1 The same line memory 1 between clock 11 and clock 14
Data read from 28 ("C126" regarding paper width,
The flag data ``'O'') is about the paper width.
is added ``1'' and becomes 127'', which is stored in the line memory.
Corresponds to pixel positions (6) to (15) shifted by one pixel in 128
You will be sent to the specified address. Furthermore, line memory is used at 15 and 16 clocks.
To the pig “127” regarding the paper width read from 128
1111+ is added, becomes “0” and the corresponding flag data is
The line memory 128 is shifted by one pixel along with the data '1''.
Write to addresses corresponding to pixel positions (16) to (17)
will be included. Furthermore, in the scanning line 111, the image changes in the main scanning direction.
Point detection signal (a), sub-scanning direction image change point detection signal
(b) and edge detection flag (C) are similarly L level.
to hold. In this state, the input from A agate 125 is
Mage change point detection 0 bow becomes 1-level and forward movement
6 clocks further shifted by 1 clock from the scan line 1-10
128 pixels of line memory between 11 and 11 clocks
Data read from (11) (related to paper width) 12
7" and the flag data "'O"), the or
Gate 143 output and inverter 144 output are low level
Then, MC shadow image signal 0 (AND gate 146 output) (
d) roars at Robel. Furthermore, from 12 clocks to 15 clocks
Until locking, the line memory 128 pixel position (1
The data read from 2) to (15) is flag data.
[Since pu changes to 1'', or gate 1/I3 output
Power rises to level 11 and inverter 14/l falls.
As a result, the MC shadow image signal becomes l-level.
SC shadow image signal (AND gate 145 output) (e) is
level. Furthermore, at the 16.17 clock, La
Read from pixel position (16) (17) of in-memory 128
Since the data related to the shadow image to be taken is 1101+,
, the output of the OR gate 137, and further the output of the OR gate 139 is L.
level, and the SC shadow image signal falls to the L level. In the above process, from clock 6 to clock 15, the
11111 is added to the paper width related data ``127'' read from the thinner 128 and becomes 0.
'', and the line memory 1 is stored along with the corresponding flag data.
Corresponding to pixel positions (1) to (16) shifted by one pixel in 28.
The email was sent to the specified address. This line memory 12
Addresses corresponding to all pixel positions (1) to (17) of 8
110 IN is stored in the response as data regarding paper width.
The state will be as follows. In this way, each pixel 411/i of the line memory 128
[When the paper width data becomes “0”, the main scanning direction
from the image area to the non-image area in both the direction and sub-scanning direction.
From scan line L12 onwards, where the change point is not present,
Both MC shadow image signal and SC shadow image signal are always at L level.
It will be in a retained state. Through the above processing, the images shown for each scanning line in Figure 21 are
MC shadow image signal □; (d) and SC shadow image signal (e) are obtained.
However, if this is expressed as an image, it is shown in Figure 20 (b).
The right side and bottom side of the original rectangular image are
A paper pile of 3ii1ii width is generated 45 degrees downward from each side.
It becomes what is given. 4 In the above process, pixel color f? of scanning lines 14 to L8?
i? The image change point in the main scanning direction is detected in (13).
This is where the shadow picture should originally be generated (Mu mark)
, as shown in Fig. 17, the image data (n>
And gate control of output stage AND gate 145°146
Since a roll is performed, shadow image generation is prohibited.
. This means that the shadow image that should be generated in the original image part is
This prohibits the generation of shadow images when they overlap, and furthermore
The image is complex and the pixel width of the shadow image to be generated is large.
Similar processing is performed in other cases, resulting in more realistic shadows 1]
can be realized. In addition, the main scanning direction is
The image changes from the image part to the non-image part with respect to the direction.
The image changes in both the image part side pixels and the non-image part side pixels.
Since the conversion point is detected, in the above process, the
scanning line corresponding to the corner of the image]-8 pixels A device (1
3) in the lower right 45 degree direction (L9, pixel position (14)
) and LIO1 pixel position (15)), and the current
This prevents shadow image loss in this area. V, processing ii! ! i-image generation unit This processed image generation unit generates the original image, which is the main component of the present invention.
The means of adding images to images has become concrete, and for example, shadow paintings have been used in history.
And the basics of processing the original image What kind of shading/lines?
The means for generating patterns is specifically shown. ■Outline extraction (white outline) This "outline extraction (outline)" is the outline of the original image.
Processing related to the original image to extract the white image
It is processing. The overall configuration of the outline extraction circuit is shown in FIG. 22, for example.
It looks like this. This outline extraction circuit is basically
The shadow line extraction circuit shown in Figure 17 is constructed according to Katsura's idea.
In the case of a shadow line, from the image part, 11.
While the change to the image part is detected, the change in the outline is detected.
In this case, change from image part to :11 image part (iz
Both positions of change from non-image part to image part
Detection 6 A line drawing is generated in the pixel (ff) from delivery.
The image generation direction is also similar to that of shadow images, with one pixel per scanning line.
It is not a shifter, but a shifter in the main scanning direction and sub scanning direction.
It is generated as is. Detailed explanation based on Figure 22
Then it becomes as follows. On the line of interest output from the binarization circuit shown in Figure 15
The image data (n) is one end of the two-man team 157
and 1 to the other input terminal of this AND gate 157.
The image data (n-1) at the same pixel position before the line is
It is input via converter 158. Also, this 1 la
The image data (n-1) before input is from the other two people.
input to one end of the AND gate 160, and
The image data (n) of the line E of interest is input to the other input terminal.
It is input via an inverter 159. And above
The output of each ANDGUT t157, 160 is OR gate 16
1 is entered. Here, in the sub-scanning direction,
The image data changes at the boundary point where the image part changes from the image part to the image part.
Where the L level changes to the L level (image data
data (n-1) -L, image data (n) = H), and outputs of ando 1 to 157 are low level.
On the other hand, in the same sub-scanning direction - (from the image part)
The image data is low level at the boundary point that changes to the non-image area.
At the point where the image data changes from to L level (image data (n
-1) - Mouth 1 image data (n) = 1>, AND gate 1
The output of 60 is low level. Therefore, and gate 1
The boundary where the output of 57 changes from the non-image part to the image part
The output of Antogame 1-160 becomes the detection signal of the boundary point.
Detection of boundary points that change from image part to non-image part (
i:; >'J, and their logical sum
The output of the OR gate 161 is applied to each pixel position (final
lf becomes the image edge detection signal in the sub-scanning direction. Also, the image data (n) on the scan line of interest and one line
Image data (n-1) at the same pixel position before input is OR
This 71) Noguto 156 output
The main scanning direction outer shape detection circuit 1 uses the force as new image data.
70 is entered. 2.The main scanning direction outer shape detection circuit
170 is the image data (n) and the image data one line before
Process the logical sum 8 (or gate 156) with data (nl) as new image data.
The reason for this will be explained later. The specific configuration of the main scanning direction outer shape detection circuit 170 is as follows.
For example, it is as shown in FIG. In the same figure, 171 and 173 are image reading types, respectively.
The video clock signal (V, CLOC) which becomes the timing signal 8
K), and each counter 171,
173 is initialized during the period when the load is 0 (LD) is 1-level
The data is set and the total count from this initial pig is the highest.
When the value reaches a large value (for example, 255), the
It's about to start up. Then, each counter 171.
In 173, the outline line width data from CPtJ is the initial data.
D, and the above image data is copied as is.
The image data is input as a load signal to the counter 171.
The inverted signal passed through the inverter 172 of the counter 17
It is input as the load signal of 3. Here, the above outline line width data is determined by the operator
This is input by operating the numeric keypad on the control panel, and specifically, the external shape to be extracted by the operator.
When the pixel width W of a line is input, the outline line width piggyback X is calculated according to X = 256 + 1 - w, and the calculation result X is sent from the CPU to each counter.
171.1.73. In this case, the settings
The pixel width W that can be set is 2 dots I- or more (maximum setting pixel width W)
The bare width is, for example, 129 dots. 174 is the carry C from each counter 171.173 above.
The output is the same as the video clock signal j3 (V, CLOCK).
A latch circuit with a four-unit configuration that latches each one in parallel with each other,
175 is the rising edge of the image data, 'Sera1-, inverter
195 output (carry C output of counter 171) falls
176 is a flip-flop that is reset at
When the image data falls, the output of the inverter 196 is activated.
Reset at the fall of (carry C output of counter 173)
each flip-flop.
The data terminals of pins 175 and 176 are always fixed to 0 at the 1-1 level. and each flip-flop 175.
The output Q of 176 is input to the OR gate 177, and this OR gate
The output of the gate 177 becomes a main scanning direction outer shape detection circuit. In the main scanning direction outer shape detection circuit 170 having such a configuration,
For example, if a setting input of pixel width w = 3 pixels is made,
In the process, the status of each part becomes as shown in Figure 24.
. First, at the falling edge of the previous image data during the document scanning process,
Outline line width data X=25641-3= in the counter 171
254 is set as initial data,
In this state, when the relevant image data starts up, Noritsu starts at the same time.
The output Q of the block flop 175 rises to a low level. Konoto
The above outline line width data 254 is displayed in the other counter 173 for the first time.
Set as period data. Then, during the scanning process,
The counter 171 sends the video clock (V, to CLOC).
When one clock is counted (count value 256>255),
Carry output C rises. Next video clock (V, C
At the rising edge of LOCK), 1-yari output C is generated.
The 1U power 2Q of the latch circuit 17/l falls to the 11 level.
stand up. Next video clock (V, CLOCK)
The output 2 of the latch circuit 174 at the rising timing of
Q h < falling to l level, latch li'j circuit
17/'1 output 4Q rises and the inverter 195
The output falls to 1 level. This allows flip-flop
The flip flop 175 is reset, and the flip flop III knob is reset.
The output Q of 175 falls to L level. From then on, the image
During the process of scanning the part, the image data retains 11 levels.
This state will be maintained for as long as the One scan is the image part
When the boundary point of the non-image area is reached and the image data falls
, at the same time the output Q of the 7 rib flop 176 is at the 1-1 level.
Le stands up. Then, as in the case above, the scanning process
The counter 173 is the video clock (V, CLOCK).
) divided by 1 clock, the count value 256>255 )
Zonokitori Tsuno C stands up. Next video clock (
- at the rising timing of V, , CLOCK)
[The spear output C falls to the level, and the latch circuit 174
Output 1Q rises to low level. next video clock
2 The latch circuit is activated at the rising edge of (V, CLOCK).
The output IQ of circuit 174 falls to the L level, and the latch circuit
Output 3Q of 174 rises and output of inverter 196
drops to 1 level. This makes the flip-flop
176 is reset and its output port falls to L level.
Ru. This results in the output Q of flip-flop 175.176
The outline in the main scanning direction (S, J3 is the logical sum of
3 clocks from the rising edge of the data, and 3 clocks from the falling edge of the data.
The condition will be at the level of a rock frontage. In other words, this main scanning direction outline signal is
Scanning from the point of change to the image section (the rising edge of image data)
3 pixels width in the direction, change from image area to non-image area
3 pixels in the scanning direction from the falling edge of the image data that lights up
4i is used to represent the outline of the width. Furthermore, in FIG. 22, the main scanning direction outer shape detection circuit
Main scanning direction external shape signal from 170 and Oagoo h 161
The image edge detection signals in the sub-scanning direction from
I am inputting to games 1-178. 3 As a result, the output of this Oagoo 1-178 is the image
Signal that rises at the edge part in the main scanning direction and sub-scanning direction
becomes. On the other hand, the remaining circuit configuration is the shadow line extraction circuit shown in FIG.
3, that is, each picture of the scanning line
"I"0 memory 179 corresponding to the elementary position and the outline line width setting
Fixed value (7 bits) and edge detection flag (1 bit)
8-bit data (A input) and the above OAG-1 to 17
Depending on the state of edge detection from 8 to 0 memo
Read data from line width 179 (7 bits 1 to 7 bits related to line width)
Switch between data and flag data (1 bit) (B input)
A selection circuit 180 that controls the line width, and a selection circuit 180 that
data (A) and OR gate 178 to inverter 1
82° 1-bit data via AND gate 183 ("
Addition circuit 1 that adds 0" or '1") (B)
81, and further includes an edge detection from the or gate 178.
Logic output according to the state of output 8 and the state of flag data
Power system, inverter 187, AND gate 188
．． 189, Oagoo 8/I to 190, and further discussion depending on the state of data regarding line width.
System that performs logical output, OR gate 184, AND gate 1
85 and an OR gate 186. So
and performs logical output according to the output signal from the above platform system.
Inverter 191 and AND gates 192 and 193
The output of this AND gate 192 is
SC contour signal indicating the contour line expressed in color (red),
The output of the gate 193 is expressed in the main color (black).
The tMc outline signal indicates the outline line. Note that the above-mentioned outer line width data X in the sub-scanning direction is based on the above-mentioned
As with the shadow line width, the operator specifies the pixel width W.
(Operation input) Then, it is calculated according to
It is. Regarding the edge detection flag mentioned above, please refer to the following J.
It has become. Since the image processing device handles two-color data (main color 5, subcolor), it is the same as for shadow images.
When an edge of an image is detected, the color of that part is changed.
It is expressed as a flag when an edge is detected. That flag raw
For example, as shown in Fig. 25,
It has become. In Fig. 25, in the sub-scanning direction, from the non-image area
Detection signal of a boundary point changing in the image area (sub-scanning [1 mouth
detection), specifically the AND gate 15 in FIG.
7 output and the AND gate 103 output shown in Figure 15 ().
The new subcast flag SCF and the input tag
-1 to 201 and from the image section in the same sub-scanning direction.
Detection signal of boundary point changing to non-image area (sub-scanning low
)L), specifically, andgoo 1 to 1 shown in Figure 22
60 outputs and “1”0 memory 104 outputs in Fig. 15.
The new sub-color flag SCF and the human-powered AND
gate 202, each AND gate 201.202
The output signals are input to OAGOO 1-203. here
Then, the output of the AND gate 201 is converted from the non-image part to the image part.
This is the color flag of the 6 pixels on the boundary that changed to the image area, but during the image reading process,
In this case, a change from a non-image part to an image part is an image part.
Since it can be determined when reading the pixels of
The Zabukara flag S CF (n) of pixel < n) is left as is.
The color flag is set as the color flag of the pixel (r) at the boundary point. Ma
In addition, the output of ANDGET 202 is conversely transferred from the image part to the non-INPUT
The color flag of the pixel at the boundary point that changed to the image part is
In this case, the change from the image part to the non-image part is
This is determined when reading the pixels in the image area.
Inner pixel (r+-1) one line before the read pixel (n)
The sub color flag 5CF(ni) of the pixel of the boundary point
(ml) color flag. The appearance of or gate 203
The force signal is generated by the inverter 204 according to the above-mentioned outline in the main scanning direction.
By the inverted signal of the signal (main scanning direction external/external shape detection circuit 170)
Input to AND gate 205 which is gate controlled
are doing. On the other hand, from the non-image area to the image area in the main scanning direction,
The external shape generated from the boundary point that keeps changing (main scan → eye detection), specifically the frame in Fig. 23.
Rip-flop 175 output becomes clock terminal (CLK)
, Zabu color flag SCF is input to the data terminal (D), respectively.
[Flip flip 1] tab 206 and the same main scanning direction.
From the boundary point where the image part changes to the non-image part
The external shape that occurs (main scan [1 → L detection), specifically
The output of the Noritsu flop 176 in FIG.
The Zabu color flag SCF is connected to the clock terminal (CI K).
terminal (flip-flop 208 input to DJ respectively)
The output Q of the Noritub flop 206 and the external shape signal
(Main scanning 1 → 11 detection)
The output of the rib flop 208 and the relevant external shape signal (main scanning aperture)
→L detection> is inputting a lot to Antogame-+-209
. Here, the main scanning direction outline that generates each of the above outline line signals
In the line detection circuit 170, the image data of the scanning line is
Logic between data and image data of the same position pixel one line before
Since the sum is treated as actual image data, this
Subcolor input to Tani Noritsubu flop 206.208
8 Similarly, for the flag SCF, the subcategory of the relevant scanning line is
The color flag and the subcolor flag of the inner cable at the same position one line before.
The logical sum of the lags as the actual sub color flag S CF
I'm handling it. Also, in this main scanning direction, the sub-scanning
As in the case of , the change from non-image part to image part
When detecting the reading pixel (m) at the time of detection,
Lag SCF (m) is used as the color flag of the outline part.
However, conversely, when changing from the image part to the non-image part,
is the pixel (m-) one pixel before the read pixel (m) at the time of detection
1) Sub color flag SCF (m-1) is set to the relevant outline
Some color flags are set. Each of the above AND gates 207
, 209 is input to the OR gate 210, and further
The output of the gate 210 is the ANDG 1-2 on the sub-scanning side.
It is input to OR gate 211 along with the output from 05.
, the output of this OR gate 211 is when the final edge is detected.
It is flagged. When this edge is detected, the flag is
Indicates that it is a sub color when it is L level, and vice versa.
Sometimes indicates the main color9. Next, let's take a rectangular image as shown in Figure 27(a) as an example.
, the outline extraction process will be specifically explained. In this rectangular image, the diagonal line on the left side is the main color (black),
The right halftone dot area is Zabu color (red). In addition,
For simplicity, each scanning line consists of 17 dots (pixels).
Assuming that, each pixel position of 179
) is preset with “O” as an initial value.
It is in a delivered condition. Also, the operator can enter the settings.
The output line width W is 2 pixels. The full color sensor 10 scans the scanning line at 11°L2, 1
3. The process of performing optical scanning by sequentially moving the
So, between scan lines 11 to 1-3, there is an image.
Therefore, the image data corresponding to each read pixel is
Compatible with L level. Furthermore, scan lines 4 to 1-8
In between, ``Image data I+ 11 N7'' in FIG.
1 CF: II As shown in “'S CF”
, 4 clocks (pixel) to 13 clocks of the video clock (V0 to C1, OC) corresponding to the image.
As the image data rises up to the eyes, the main camera
Rough flag M CF is 9ri from Pekrotsuku 1]tsuku's t
lll, also, the Zab color flag SCF is pulled FA'ki1
From 0 clock to 13 clock, the state is low level and
Become. Furthermore, the image exists again after 9 on the scan line.
Since there is no image data, main color flag M
CF, Zabu Color Flag SC' fall respectively, and the level
maintain the rules. During the above scanning process, the signal waves of each part in each scanning line are
The shape will be as shown in Figure 26. There is no image between scan lines 1 and L3.
Therefore, the main scanning direction from the main scanning direction outer shape detection circuit 170
The external shape signal and the image in the sub-scanning direction from the OR gate 161
The image detection signals both have L level, and the line
From the memory 179, the initial value ``O11'' becomes the video clock.
The O11 data is read out synchronously, and the O11 data is read out as is.
It returns and is written into the line memory 179 again. follow
Introducing 1-level for both MC external signal and SC external signal.
1 It becomes a state of holding. Furthermore, in the scanning line L4, the main scanning direction outline signal
(a) changes from 1,11-image part to image part
2 clocks (set pixel width) from the 4th clock, and
, 14 clots changing from reverse image part to non-image part
I-1 level for each 2 clocks (same pixel width) from the
(main scanning direction external shape information in Figure 24)
(same as issue). And the sub-scanning method from A Agate 161
The image edge detection signal in the direction @(b) is at scanning line l-3
to L4 [change from non-image part to image part
Rise to level 1 from 4th clock to 13th clock
The state will be as follows. In this state, the image in the sub-scanning direction
-edge detection signal (b) reaches eye level (sub-scanning)
→To 1> Between the 4th clock and the 13th clock, especially
Liebcan - Flag S CF is 11th level roaring 10th
From the lock to the 13th clock is the ant in Figure 25.
The output of game 1-201 becomes H level and edge detection F
R Norag (C) will rise to the I-1 level.
. At the second 14th clock, the main scanning direction external shape signal (a) becomes low level.
Togara (main scanning port → L) Flip-flop 208 is set
The AND gate 209 at the subsequent stage selects the relevant main scanning direction.
1” The same 1” level state is confused while the external signal is low level.
The edge detection flag (C) is set to the above 13 clock.
Continue from the 15th clock (further 2 pixels) to the 1st level
maintain the condition. On the other hand, the main scanning direction external shape signal (a) or the sub scanning direction
If any of the image edge signals (b) of
The period from the 4th clock to the 15th clock is shown in Figure 22.
The output of the OR gate 178 becomes low level. do
In between, the selection circuit 180 selects and outputs the A side.
In both cases, the B input of the adder circuit 181 is fixed at "O". subordinate
Therefore, from the 4th clock to the 15th clock is the video clock.
In synchronization with the lock, line memory 179 (4> to (16)
) to the address corresponding to the pixel position of
128+1-2=127(W=2) and edge
The detection 05 flag (C) becomes 8-bit data and is sequentially I
)3 It's getting mixed up. Note that other pixels in the line memory 179
Applications corresponding to positions (1) to (3) and (16) to (17)
PaO''' data is written to the address (the same goes on from here on).
). In this way, the line menu is synchronized with the video
In the process of data being transferred to and from memory 179,
From 4 clocks to 9 clocks, 1 and above, or gate 1
When the output of 78 is low level, the edge detection flag (C
) becomes L level, and gate 188.1
Both 89 are level 1 and the second stage is Andogoo 1-19.
The output of 3 becomes the 11 level. That is, the MC external shape signal (d
) has risen to the 11th level. , also 10
From the clock to the 15th clock is Or Gate 178.
Similarly, when the output is at level 11, the edge detection flag (
Since C) is a low level, and get 188 is a low level.
level, and the output of the subsequent AND gate 192 becomes low level.
The output of the AND gate 193 becomes the low level. Immediately
In other words, the MC external signal (d) has fallen to the L level.
Meanwhile, the SC external signal (e) has risen to low level.
In the scan line 1-5 following the test scan line 1-4,
In this case, the main scanning direction outline signal (a) is the field of scanning line “4”.
As in the case of
From the lock to the 5th clock and from the image section to the non-image section
People from 14 to 1590 that change into parts
2ii1j element is at level 11, but in or game
The image edge detection signal in the sub-scanning direction from the
b) is a power bow image on scan lines 1-4 to 15.
Since there is no change, 1betenori I] rack imming
1-Level roar. Also, the edge detection flag (C) is
, image edge detection signal in the sub-scanning direction +3 (b
) changes to the L level in the sub-scanning direction as shown in Figure 25.
The output of the AND gate 205 maintains the - level.
From then, 13ri] Maintain L level until the cock, 14
From the clock to the 15th clock, external shape information in the main scanning direction is sent.
Due to the low-level status of the issue, the low-level status also occurs.
Ru. In the scanning line L5 in the above state, the 5th main scanning direction external shape signal (a) is at the low level at the 4th clock.
In 5 clocks from [Yoor gate 178 output is low level]
As in the case of scan lines 1-4,
When the MC external signal (d) becomes 1-11 novel, the light
pixel position ff1(4) of the online memory 179; Outline line width data X-1 is returned to the address corresponding to (5).
27 and flag information ii On is 8 pits 1~data etc.
is written. Then, the main scanning direction is 1i'jJ.
(a) is L level from the 6th clock to the 13th clock.
Then f Gel A Tsunoguto 178 output becomes 1-level.
<i, so the outputs of andgoo 1 to 188 are 1-level.
The output of the AND gate 189 becomes the line main signal.
Flag data (14 scans) read out sequentially from memory 179
The data written during
Bell, 11th level from 10th clock to 13th millstone
Autumn (becomes IjA. Yuda, these days, Raishin
Outline line width data 127 (
OR gate 1 by Tanabe data during 14 scanning)
84 output becomes low level and Andgoo 1~185 further
OAGOO 1-6 186 output becomes low level. This allows you to
The MC external shape signal (d) from port 193 is the above read flag.
9 more clocks after 6 clocks when the data is at L level
The level 11 state is maintained until the flag data becomes
This is from the 10th clock to the 13th clock, which is the low level.
The MC external signal (d) falls to 1-level and conversely rises.
The SC outline signal (e) from the second gate 192 is at low level.
The state will be as follows. On the other hand, the output of OR gate 178 is 1 level.
During the period from the 6th clock to the 13th clock, which is the
Outline line width data 127 read from the online memory 179
“1” (B input - 1) is added by the adder circuit 131.
and 127+1=128, that is, ll OIT(7
(by bit representation) is the corresponding pixel position (6) to (1
3) is written to the address corresponding to. Also at this time,
The read flag data is directly converted to the corresponding outline line width data.
The data is written to the line memory 179 along with the data "OIT." Furthermore, the clock is turned off again from the 14th clock to the 15th clock.
The Agate 178 output rises to level 11 and the edge detection flag (C) goes low.
Since it becomes a bell, the SC outline signal 'l3(e) continues.
Maintain low level condition. Also, at this time, selection circuit 1
80 switches to the A side, and the pixel position of line memory 179
Input the settings to the address corresponding to (14) and (15).
Outline line width data X=127 and edge detection flag
((1IT is written as data to 8 bits 1. Next, when the scanning line moves to L6, the external shape information in the main scanning direction is written.
@(a) and the image edge signal in the sub-scanning direction σiJ (b
) and edge detection flag (C) for scanning line 15.
The same situation will occur. In this state, the main scanning direction outline signal (a) is at the low level.
The above scan line
L4. Similar to L5, MC external signal (d) is at 1-1 level
Then, the pixel position of line memory 179 is ff1 (4)
, Outline line width data X at the address corresponding to (5)
= 127 and flag data II OII is 8 bit data
Tanabe becomes the data. Then, the main scanning direction outline signal
From the 13th clock to the 13th clock when (a) is at the L level, the or gate 178 is at the L level.
The signal is read out from the line memory 179 when the signal is turned on.
Line width data is '0' (data written during 15th scan)
When the output of the OR gate 184 becomes 1 level and the
The output of gate 185 and OAGOO i~186 is L level.
becomes le. As a result, the MC external shape signal (d) and the SC external
Both signal signals (e) are at L level. This time, Anne
Since the output of Dobuto 185 is at L level, the addition circuit
B input of 181 is O++, line memory 179?
The outer line width data “O++” read from
written on the dress. Furthermore, the above applies from the 1/I lock to the 15th clock.
As in the case of scan line L5, the OR gate 178 output is
The SC external signal (e) becomes 1-1 level.
Become. At this point, the selection circuit 180 switches to the A side, and the selection circuit 180 switches to the A side.
For pixel positions (14) and (15) of in-memory 179
Outline line width data set and input to the corresponding address X = 1
27 and edge detection flag “1” is 8 bit data.
It will be written. 9 After that, scanning line L6 in scanning lines l-7 and 18
The same process is repeated. Furthermore, when the scanning line moves to L9, this scanning line
Although there is no image, the main scanning internal/external shape detection circuit
170 is the logical sum with the image data of 1 line 1) lJ'.
Since the processing is being performed on the data, the relevant run
Even at scanning line [-9, the main scanning direction external shape signal (a) is
As above, between the 4th clock and the 5th clock and 1
The period from 4 clocks to 15 r1 kotsuku is low level.
The state will be as follows. And a side run from Or Gate 161
The image edge detection signal (b) in the scanning direction is scan line 1.
From -8 to L9, the image part changes to the non-image part.
From 4 clocks to 13 clocks
-1 becomes a state. This J: Sea urchin main scanning direction external shape information
The image detection signal (a) and the image detection signal (b) in the sub-scanning direction are
The state is the same as that of scanning line L4, and the state in the sub-scanning direction is
Change in image edge detection signal (b) (sub-scanning 1-1-
) L ) and the change in main scanning direction external shape signal (a) (main scanning aperture
→L) to 10ri00 From the lock to the 13th clock is the AND in Figure 25.
Gate 202. Same from 14th clock to 15th clock.
Is each output of the AND gate 209 set to low level?
Also, the edge detection flag (C) is also set for scanning line L4.
As in the case, the sub color flag SCF is set to low level.
Low level from 10 clocks to 15 clocks
The state will be as follows. In such a state, the MC contour signal (d) and the SC contour signal (d)
The signal 0(e) is the scanning line.Similar to the case of 4, the MC external shape signal
Number (d) is 14th level from 4th clock to 9th clock.
state, and the SC external signal (e) continues for 10 clocks.
The state of the 1-1 level continues until 15 clocks. this
At this time, the main scanning direction external shape signal (a
), or image edge signal (b) in the sub-scanning direction.
From the 4th clock to the 15th clock when becomes low level
, new addresses corresponding to pixel positions (4) to (15)
Outline line width data X = 127 is written to
Address 01 corresponding to the same pixel positions (4) to (9) contains flag data II OII, and the following pixel position 1 (
A flag is set for the address corresponding to 10) to (15).
Data 111 ++ is paired with the above outline line width data respectively.
is written. In the scanning line L10 following the scanning line L9,
, there is no image, and the previous line L of the image data
Since the logical sum data with 9 is also II O++, the main
Scanning direction external shape signal (a) and sub-scanning direction image
What is the state in which both the detection signal (b) is held at L level?
Due to this, the edge detection flag (C) is also set to L.
What happens when the level is maintained? Smell like this-
(, from 4th clock to 9th clock is line memory 17
The outline line width data read from 9 is X = 127 (1
(data written during 9 scans) A-1 to 184
The output becomes four levels, and furthermore, andbutton 185, or
While the output of Goo 1 to 186 becomes 11 levels, at the same time
The flag data read in pairs is “'O” (L9 run).
The output of AND gate 189 is
Since 02 is at the 1-level, the MC external shape signal from the AND gate 193 (
d) becomes a low level state. Also, the next 10 clocks?
15 clocks are read from the line memory 179.
The outer line width data to be generated is 127 as well, but its pair is 127.
Since the flag data becomes “1”, the and game
The output of gate 189 becomes low level, and in this case, the and game
SC external signal (e) from port 192 becomes low level.
. In the process of reading this line memory 179, the outer line width data
If the data is P○'' (pixel positions (1) to (3) and (1)
6) to (17)) are the same data as 110 II.
Then, it is routed again to the address corresponding to the same pixel level.
On the other hand, if the outline line width data is 127,
The outputs of gates 185 and 183 become four levels, and adder circuit 1
Since the B input of 81 becomes 1″, 127+1=12
8, that is, II OI + data at the same pixel position (4)
~(15) is written to the address corresponding to the address. Flagde
For data, the read data is returned as is and other than the above
It is paired with the shape line width data and written to the original address.
. 03 In the following scanning line L11, 43, the external shape signal in the main scanning direction is
No. (a), image edge detection signal in the sub-scanning direction (b)
, the edge detection flag (C) both held L level.
state. Processing at scanning line L10 before Zoshi-C1
Outline line width data stored in line memory 129 by
is O'' at all pixel positions (1) to (17) in one line.
Therefore, the MC external shape signal (d) and the SC external shape signal
Both issues remain at [level]. Then, the following
In the scanning line, this clasp line 11 and +1-i
The state is as follows, and the MC external signal and SC external signal are as follows.
After that, the state is maintained at L level. Through the above processing, the images shown for each scanning line in Figure 26 are
MC outer diameter signal (d) and SC outer diameter signal (e) are obtained.
However, when this is displayed as an image, as shown in Figure 27 (b)
, the left side from pixel position (9) is the main color (MC: black).
, diagonal line>, the right side from pixel position (10) is the subcolor
(SC: Red, halftone part) A rectangular outline with a line width of 2 pixels
This becomes a line image, that is, a white image. 04 In the above processing, the image is actually
Although there is no external shape signal in the main scanning direction (a
) becomes low level when J: Sea urchin is the attention level mentioned above.
Image data of the in pixel (n) and the same pixel one line before
New logical sum data with position image data (r+-1)
Outline extraction processing in the main scanning direction (main scanning direction) is performed as image data.
This is because the scanning direction outer shape detection circuit 170) is
Ru. This means that the outline in the sub-scanning direction is
Outline signal (a) or image edge detection in sub-scanning direction
After the output signal (b) falls to L level,
Since it is generated in width, its main scanning direction outline signal (
a) and the image edge detection value e in the sub-scanning direction (b)
This is to completely align the falling scanning lines. to this
For example, as shown in FIG. 27(b), the scanning line
Side run from pixel positions (4) to (13) in
The sameness of the outline line in the scanning direction and the pixel position ff1 (14) (15)
The lines will line up. Conversely, image data handled as above
If the data is not logical sum data, the outer shape information in the main scanning direction is
No. (a) is complete 05 All falling scanning lines are 1-9 and the image in the sub-scanning direction
Because it is one line earlier than the edge detection signal (b)
, the pixel position of the scanning line 110 is shown in FIG. 27(b).
External images are no longer generated at positions (14) and (15).
, this will result in a missing outline. ■Shading/line marking This "shading/line or c" was extracted as above.
``Shading'' or ``lining'' of the original image or shadow image.
The net baton, which is the basis for obtaining the image, and the generation of the line pattern.
The 1° net pattern and line pattern that specifically show the means of construction are as follows.
For example, as shown in FIG.
For direction - C64 dots x 64 dots dot pattern
becomes. For the memory that stores this dot pattern
data is handled in bytes (8 bits), and memory
For example, as shown in FIG. 29, the data structure in
Eight dot patterns (64x64) are arranged.
Then, each pitch 1 to 06 position of Pi1-data is assigned to the dot at the same position of each pattern.
It has become something like this. Therefore, 1 the pattern data is stored in this memory.
When writing data, use 64 bytes 1 to ×64 data.
Write. Specifically, for example, as shown in FIG.
, the entire O-th bit of each byte data (64 dots x 64
A certain line pattern is expressed with dots 1-), and 1 pits 1
~ [1 rest (64 dots 1 ~ x 64 dots) for other net patterns
A dot pattern is expressed, and up to 8 types of dot putters can be created in the same way.
is expressed. This net pattern and line pattern generation circuit is, for example,
It is as shown in Figure 31. In the same figure, 231 is a clock signal (CK), and
Input video valid signal (v, si AD: 1 right-effect scanning
This is a counter that counts the line
The counter 231 has a 6-bit output (Qo to Q5) configuration.
The -1 bit (C) is the inverter 232.
and page sync signal (PAGE 5YNC: 1 page
Goo 1~Controlled and gate in )
233 to the load terminal (FD).
235 beam D j link signal;, (to C) do 07 and input video - link signal @ (V, Cl0CK
: It is a counter that counts 1 pixel).
, this counter also has a 6-bit output (Qo~Q5).
Therefore, the carry bit (C) is connected to the inverter 236 and
Video valid signal (V, VAD)
[l-do via trolled andgoo 1-237
It is fed back to the terminal (ID). The counter 231.
235 has a total of 12 pin output (counter 231 is up)
(6 bits for counter 235, 6 bits for counter 235)
I'm using the M4 counter. Then, the counter 235 has an initial value in each scanning line.
Products from ``0'' to 64 dots 1- (to Callan 1) are finished.
Initial setting (direct 110) is performed by the carry output each time
I+ is reset to 1, and the counter 231 is reset to 1 for each scan.
64 lines (color) from the initial value No. 11 on the page
At fTj when scanning (toward line 1) ends, the
is reset to the initial setting value “O”.
Ru. 250 is a pattern such as the above-mentioned net pattern or line pattern.
This is a memory (SRAM) that stores information (see Figure 28 and Figure 30), and the above address counter.
The address output from the counters (counters 231, 235) is
This memory 250 is accessed via the multiplex memory 241.
It is connected to the address bus (ADD). Also, a deep enable signal from CPLI (not shown)
(SRAM CF) is connected to the memory via the inverter 242.
Output input to allow reading of memory 250
input to the cable terminal (0''), and similarly
Write signal from J (SRAM WR) and the above chip
The enable signal (C') enters the negative logic AND gate 243.
The output signal of this AND gate 243 is sent to the memory 25.
Write enable terminal (vital
) is entered. The data bus (D) of the memory 250 is
In addition to systems that directly transfer pattern information to subsequent stages, there are
A buffer 251 is connected, and the
The pattern information from the CPU is written into the memory 250.
It's becoming a comic book. This buffer 251 is CP
The chip enable signal (SRAM CE) from U
In the event of an accident (level), the shading/line pattern information from the CP09 U is stored in the memory 250.
while the same deep enable signal E is active.
(low level), the output is forced to ″
``High impedance'' is maintained. Also, the above address
The address value from the counter is input (B input)
The other input terminal (input to) of Breza 2/11 has a CPL.
Address data from J is input, and this multiple
The recliner 241 uses the deep enable signal (SRAM
, CE) is at low level (read 1), the B input side
Select the same deep enable signal (SRAM C[)
When is at the 1-level (at the time of writing), select the Δperson's side.
Ru. Note that the data read out from the memory 250 is, for example,
For example, it has an 8-bit configuration (see Figure 29).
When the controller performs an operation to specify pattern information, the specified
Only the bits corresponding to the selected pattern are selected (selected).
(Circuit diagram omitted), only that bit information can be read as image information.
It is transferred pixel by pixel to the subsequent stage in synchronization with . 10 Pattern information such as net patterns and line patterns as described above
The pattern generation circuit that generates writes pattern information.
If the chip enable signal (C[> and
A, 2';; (to SR 8 WR) to knock live (L RA)
(bell), input sequentially from the initial value II OI+.
Address to be incremented (8 DDR [SS: 12
bit) from the CPU via multiplexer 241.
250 address buses (ADD).
Then, in synchronization with that, the same CPU sends 8 bits (1 by 1 -
2) The pattern data shown in Figures 28 to 30 is
The data bus (D
). As a result, as mentioned above (Fig. 29 and
See Figure 30> Due to the structure, pattern data is stored in memory 250.
written to. Here, when changing the size of the pattern, the CPU
This is done by changing the magnification and getting lucky. For example, when 1Y4 times, it corresponds to 32 bytes x 32.
The pattern data will be written four times. This results in
, 1/4 pattern can be obtained compared to the original pattern.
. 11 Next, when compositing images as described later,
When reading the pattern information stored in the tail 250,
Push enable signal (CE) and write signal; 2 (SRA
Set M old () to active/C state (level 11)
, in this state, increments are performed sequentially in synchronization with the video clock.
Address counter (counter 231, 235)
) is memorized via multiplexer 241.
address bus (ADD) of the memory 250. this
The dot]-pattern of the specified address will be memorized.
Read with 8-bit disk (equivalent to 8 types) from 250
Served. At this time, the counter 235 G;
64 counts 1 to 63 from O to 63 in
The counting operation is repeated, and the counter 231
Each time the in moves, it is incremented to 64 counters in the same way.
The count operation is repeated until the count is reached. Then, each scan line
In areas where mesh patterns, line patterns, etc. are required.
Chip enable signal (CE) is controlled to low level
. From this, for example, net()/line() will fit into the required area.
A medium net pattern/line pattern of 64 dots 12 t1 to x64 dots is obtained.
``It is done.'' ■Image compositing section This image compositing section converts the original image into
Further processing of the resulting outline drawing (white image)
means (original image processing means) and shadow processing means
Each image synthesis means is embodied in the following. Figure 32 shows the target of processing based on the outline line drawing and shadow drawing mentioned above.
This is an image combinatorial circuit that performs the combination of images. In the same figure, 220 is explained in FIGS. 22 to 25, etc.
This is an outline extraction circuit 220.
As mentioned above, the outline expressed by the rib color is
The SC outline signal shown and the outline line expressed in the main color
The MC outline signal shown is output for each pixel. 222
is the shadow line extraction circuit explained in FIGS. 17 to 19, etc.
As mentioned above, this shadow line extraction circuit also generates sub-forces.
13 The SC shadow image signal showing the shadow image expressed in color and the main color
The MC shadow image signal showing the bulge expressed in
Output in elementary units. 224 is a switching circuit;
Switching circuit 22 /IIJ depending on the state of switching signal S
If either power or 81 manual power switching output J1Y is made.
At the same time, depending on the state of the switching signal S, A2 can be manually operated or
82 One of the manual switching outputs) 2Y will be done.
It has become. Specifically, when the switching signal S is at the 1-level,
When the output system IY side is A1 human power, the output system 2Y side is A2 human power.
are output respectively, and the same switching signal S is output at the fourth level.
81 manpower is output on the IY side and 132 manpower is output on the output 2Y side.
be done. The A1 input terminal of this switching circuit 224 and the 8
2 input terminal receives the MC shadow image signal from the shadow line extraction circuit 222.
is input in parallel, while the same A2 input terminal and 81 input terminal
is the SC shadow image signal from the shadow line extraction circuit 222 in parallel.
Input the color specification signal f183 (■ level) from the CPU.
Le. Color conversion specification, L level: same color specification) is this switching time N22
It is provided as the switching signal E of 4. Based on this, MC shadow image signal and SC
The output system from the C shadow image long moon switching circuit 224 is switched.
You will be able to do it. Specifically, if the color specification belief υ is at L level,
Dokini [Yo1. MC shadow from IY side of IJ exchange D1 road 224
While SC shadow image signal 0 is output from the image signal B12Y side
, when the same color designation signal is at level 11, the switching circuit is reversed.
SC shadow image from the IY side of 224 (MC from the 2Y side in August)
A shadow image signal is output. 226 and 228 are two multiplexers;
Multiplexers 226, 228 output their selection signals SA, S
Switch output (IY, 2Y) as shown in the following table depending on the state of B.
This is what we do. Then, processing data selection signal 1 is
The selection signal SA and the processed data selection signal 2 are the selection signal
The number is SB. Table 2 Here, the input system of the multiplexer 226 has one
Ruto, 1 Do, I D3, '2D2 Fig. 15
The power flag SC generated by the circuit shown in
(corresponding to the original image data that becomes the book color) is the IDI
, the output from 2Y of the switching circuit 224 is connected to ID2.2D3.
The force signal is sent from the outline extraction circuit 220 to 2DO and 2DI.
The SC outline signals are inputted respectively. Also, multiplayer
Looking at the human-powered system of KuIt 228, ID011D
3. In 2D2, the main circuit generated by one circuit shown in Fig. 15
Link flag MCF (original image that becomes the main color)
image data> is set to ID1.1D2.2D3 as above.
The output signal from 1Y of the switching circuit 224 is connected to 2D0°16, and the MC outline signal from the outline extraction circuit 220 is connected to 2D1.
I am inputting various information. And the second system of multiplexer 226
The outputs IY and 2Y of the main unit each do not show sub-color image data.
SC image data A (1Y) and SC image data B (2
Y), and the outputs 1Y and 2Y of the multiplexer 228 are
MC image data A showing image data of each main color
(IY) and MC image data B (2Y), husband
each image data is transferred to the subsequent stage with the corresponding attributes.
It's becoming a sea urchin. In the above combinational circuit, the processing data selection signal
The relationship between the image pigs of A and B lines selected as 1 and 2 is as follows:
SC image data (output of gusset presser 226) and MC image
The data (multiplexer 228 output) is as shown in the following table.
Become. Table 3 A shadow clear signal is input to the switching circuit 224, and this shadow clear signal is input to the switching circuit 224.
When the relay signal E reaches the 1-1 level, the corresponding circuit 2
24 outputs (1Y, 2Y) are now fixed at O''.
ing. This means that the extracted outline drawing and shadow drawing overlap.
This function also allows you to prioritize the outline and erase the shadow image when
The above shadow clear signal is, for example, as shown in FIG.
It is generated by a similar circuit. In other words, processing data selection
Processing data selection signal via signal 1 and inverter 221
2 is input to the AND gate 223, while the MC external signal
The signal and the SC outline signal are input to the OR gate 225, and this
Output signals of Andoo 1 to 223 and OR gate 225
The output of the AND gate 227 which is manually operated is reflected by the rear signal.
8. What's going on? According to a circuit like this 18, the processed data selection signal 2 is
", when the processing data selection signal 1 is "'1", that is,
The output of system A is "shadow drawing" and the output of system B is "outline drawing".
(see Table 3), MC external signal or SC external form
When any of the signals rises, the shadow rear Noburo rises (1
-1 level). Figures 34 and 35 show specific image synthesis circuits.
Ru. Figure 34 shows the mesh/line pattern of the area excluding the original image.
Or selectively generate either a mesh/line pattern for the entire surface.
and the color (sub color or main color)
Is it a network that also performs switching (p/line data generation circuit)?
Ru. In Fig. 34, the measurable value obtained by the circuit shown in Fig. 15 is shown.
MC unprocessed image data corresponding to in-color flag MCF
(see Figure 16 (Puru new MCF))
Book color flag SCF (new 5CF in Figure 16)
SC unprocessed image data corresponding to Noagu 1 to 371
3119. Is it a mesh from a mesh pattern or line pattern generation circuit (not shown in Figure 3119)?
(P/L data and the output signal of the NOR gate 371
is input to the AND gate 372. In addition, the 31st
The net pattern and line pattern output from the circuit according to the diagram
The data is 8 pits 1 ~ data corresponding to 8 types of patterns.
However, the input to the circuit shown in FIG.
The lined pig is selected as the pattern to be actually synthesized.
1 bit data corresponding to each pixel selected (selection circuit not shown)
data. You can also create a net pattern, line pattern on top of the image.
The image part is the shading that applies patterns such as
Change to the same pattern and switch between "fine letters"
()/Network selection code (Network tJ: l-1 level,
Small letters: 1-level) and Ia final addition 2 (selection signal 3)
Manpower to Exclusive OR (EOR) gate 373,
Gate control is performed using the output signal of this FORGOO 1-373.
Through the trolled AND gate 374 - [the above un
The output signal of Toge-h 372 is input to OR gate 377
are doing. Furthermore, the output signal 8 of the -1 E OR gate 373 is input to the inverter 375, and this inverter 375
AND gate controlled by the inverted signal at
The above shading/crossing data via gate 376 is
It is input to OR gate 377. And this oage
The output signal of gate 377 is output to AND gate 381,
382 in parallel. On the other hand, the above inverter
The output signal of 375 is input to A-1 to 379, 380.
At the same time, the color designation signal (role) of net ()/line or 4-J
Bell: Main power level: 4 Nab color) is or
to the gate 379 and also via the inverter 378.
Inversion of the color designation signal is input to the OR gate 380.
The above AND gate 381 outputs the OR gate 379.
Gate controlled by signal, and AND gate
382 is gate controlled by the output signal of OR gate 380.
It is meant to be rolled. In the above shading/underlining data generation circuit, and game
MC in which the output signal from port 381 is expressed in main color.
21 The output signal from the AND gate 382 is expressed in subcolor.
This indicates the SC network or the [b/line] data. In the shading/line generation circuit with this circuit configuration,
, Status of network character selection signal 3 and final ship T selection signal
The relationship between the state and the generated net ↓)/line (the relationship with the node data is as follows)
It becomes like this. ■Shading/fine character selection signal - “1” (low level)
, when the final processing selection signal 3 is "1"' (th level), the output of the OR gate 373 becomes L level, and the amplifier is turned off.
When the AND gate 374 becomes disabled, the AND gate 3
Since 76 is the permissible state, the shaded/lined data
will be exposed as is, and the entire area will be shaded/lined.
. At this time, whether the shaded/lined color designation signal is 1-1
In the case of level, Iyoandget381 is in permissive state.
MC shading/line (
data is output, while the same color designation signal is at L level.
In this case, the AND gate 382 is in the permissive state and the entire screen is displayed.
() 22 / SC shading/crossing data is output in the underlining state.
Ru. ■ Net/screen character selection signal - “O” (L level), maximum
Final song T selection signal 3-・If it is "1" (+- (level)), the output of FOR gate 373 becomes low level, and the AND
When the gate 374 enters the allowable state, the AND gate 37
6 will be prohibited, so please do not use anything other than the original image.
This is the outside part (Noah Gate 371 is level 1).
Shading/line data is output. In other words, the original picture
Shading excluding image/I! Il number data is output
be done. In this case, as well as above, the shaded/FJ
MC shading/line data according to the state of the color designation signal
Alternatively, it will be SC network, GJ/line, or c data. In addition, shading/fine character selection signal - “O” (1-level)
, if the final processing selection signal 3 is “O” (L level), E.
The output of the OR gate 373 becomes 1- level, and the above
The result is the same as in the case, and the screen character selection signal -
"1" (L level>, final addition 23) ■If the selection signal 3 is "O" (+- level), the EOR gate
The output of the output 373 is at the 11th level.
It will be similar. Figure 35 [More images, shadow drawings, outline drawings, mesh/lines
This figure shows an image synthesis circuit that synthesizes patterns. This image synthesis circuit handles the main) J-ra images.
MC image synthesis system, SC image synthesis system that handles subcolors, and
It consists of First, looking at the M Cii, n image synthesis system, M C
ii! Final processing selection to Ii image data (see Figure 32)
Signal 3 is exclusive OR (FOR) gate 26
1, and the output of this EOR gate 261 and the network
(from the output/line data generation circuit (see Figure 34))
MC shading/line or number data enters or gate 262
I'm working hard. Also, input to this OR gate 262
output of EOR gate 261 and MC network (J/line or U
Data is simultaneously input to AND gate 263. So
Then, the output signal of the OR gate 262) J becomes -[j
taamika [) / netmon 24 Andgames that are rolled to gate controller 1 by character selection signal
This input is input to the OR gate 267 via the
Agate 267 also has a net from inverter 265 (
Gate control is performed using the inverted signal of the input/screen character selection signal 53).
The above-mentioned AND game via AND CATE 266 that is
The output signal from port 263 is input. Furthermore, Oage
Output signal of port 267 and MC image data B (see Figure 32)
) is input to the or gate 268, and this or gate 26
The output signal from 8 is one input of multiplexer 280.
end (B) and one input E of the other multiplexer 282
(A) is input in parallel. The configuration of the SC image synthesis system is also similar to the above MC image synthesis system.
, SC image data A (see Figure 32), final processing selection
Signal 3, SC network/c line/c data, shading/details
Regarding the character selection signal and SC image data B (see Figure 32)
te, EOR Gate 271, OR Gate 272, Antoge
-1-273, 274, 276, inverter 275,
A similar logic circuit is constructed using Agate 277°278.
ing. 25 Then, the output of the OR gate 278 is sent to the multiplexer 280.
the other input terminal (A) of the multiplexer 282 and the other input terminal (A) of the multiplexer 282
are input in parallel to the input terminal (B) of. For each multiplexer 280, 282 above,
Color specification signal for specifying the color of characters or halftone/shading
is input as the selection signal S, and each multiplexer 2
80,282 both selected 4g month, when 3 is low level
to the B input side, and to the input side when the same selected Shinkyu S is at L level.
A selection output Y is performed. After each multiplexer 280, 282 there are 4 more
A two-way multiplexer 284 is provided.
The multiplexer 284 changes the state of its selection signals SA and S8.
Depending on the state, the switching output (IY,
2Y), and the final processing selection signal 1 is the selection signal.
S8, final processing selection signal 2 is selection signal SB
. Looking at the input system of the multiplexer 284, the 1st system
Then, the SC image data B is in IDO, the 26th agate 279 output is in 1D1, and the OR gate 277 output is in ID2.
However, the output Y of multiplexer 282 is input to ID3, respectively.
However, in the 2nd system, MO image data B is stored in 2DO and output data is stored in 2D1.
Agate 269 output is output to OR gate 267 to 2D2.
The output Y of the multiplexer 280 is input to 2D3.
I'm working hard. Then, the output 1Y of this multiplexer 284 is the final
→ It becomes SC image data that expresses the knob color, and the same
MC image data where force 2Y finally expresses the main color
Take a look. - [Generation of mesh/line patterns shown in Figures 31 to 35]
, a3 in each processing and synthesis circuit, processing data signal 1,
2. Final processing selection signal 1.2゜3 and mesh [)/fine letters
Compatible with processed images of each department depending on the signal status (16 types)
The resulting image data is output. "Status and addition of each signal"
-Relationship of images [, it looks like a linear table. Furthermore, this table
does not express color processing; in fact, this
For each mode (0) to (15) in the table,
Overlay color signal, halftone/line text, halftone/line shadow [pu color selection signal]
Further color processing is performed in the state of 27. Table 4 28 In Table 4 above, each state of [Noru (0) to (15)] is explained.
Ru. (0)...original image In this state, the processing data selection signal (2, 1) - (1
, 0), SC image data B and MC image
Both data B becomes the original image signal (see Figure 32 and table).
, the final processing selection signal (2, 1) = (0, 0).
, SC image data output from multiplexer 284
[SC image data 81 The same MC image data is the above MC
This becomes image data B. Therefore, in the end, the original data is
The read image, for example, Fig. 36 (
The signal related to the original picture A I+ as shown in a) is
It will be output. (1)...White image In this state, processing data selection signal (2, 1) - (0
0), therefore, SC image data B and MC image data
Both data and B become outline line drawing signals (see Figure 32 and table).
), final processing selection signal 3. (2,1) = (0,0)
This is the same as the case (0) above. Therefore, in the final 29, both SC image data and MC image data contain outline line drawing data.
36(b) for the read image 8''.
A signal related to a white image like this is output. (2)...Shadow line In this state, processing data selection signal (2, 1) = (1
1), SC image data B and MC image data
Both data B become image signals (see Figure 32 and Table 3).
, final processing selection signal (2, 1) = (o, o) r above
(0) This is the same as in (1). Therefore, @eventually
Both SC image data and MC1ilffl image data are shadow image data.
Figure 36 shows the read image 11 A n.
A signal related to a shadow image as shown in (C) is output. (3)...Bold letters In this state, the processing data signal (2, 1) = (1, 1
), SC image data 8, MC image data
A is the original image signal, and each data B is the shadow image signal (32nd
(See Figure and Table 3), 2 ma/ko, ? iu final pressurization selection signal (3
, 2, 1) = (0, 0, 1), so Fig. 35
The output state of each EOR gate 261.27”l at 30 is
MC image data 8, SC image data A itself
Is multiplexer 28/1 1D? , 2DI selection output
5cion image data and MC image data
The above correspondence 1J image data A and the same image data B
It becomes a sum signal (OR gate 269°279 output). follow
As a result, the original image and shadow image overlap, and the reading j1 image is
II A For I+, the sky as shown in Figure 36(d)
Signals related to character strokes are output. (4)...With white shading [In this state, processing data selection signal g (2, 1) = (0
Since 1), 5Cii! ii Image data A, MC
Image data 8 is a shadow picture signal G, and each f-ta B is an outline line drawing signal.
(See Figure 32, Table 3). Also, the final machining selection signal
(3,2,1) 10,0.1), so the above
(SC image data and MC image as in case (3))
Image data corresponding to 8 and 6 images
It becomes the output state of the sum signal of B (OAG in Fig. 35).
-1 to 269, 2 f9 output>. Therefore, the 31 shadow image and the outline line overlap, and the read image "A"
In contrast, the white shading shown in Figure 36(e) is an image.
The PA signal is output. (5)... In this state, the processing data selection signal g (2, 1) = (0
0), 5Ciii image data A, MC
Both image data A becomes the original image signal (see Figure 32 and Table 3).
(see). In addition, especially the final processing selection signal 3-0, shading/fine
Since the character signal is -1, E O in FIG.
R goo 1~373 output is 11 levels and and game
374 is in the permissible state. This allows the net()/line
[Depending on the state of the color specified Shinbo, the original part (MC, S
(C unprocessed image data)
,? i+(pdata (hereinafter, line or shading) is simply
”) is output (MC shading data or
(Yo SC shaded data). In this state, further R line processing
Selection signal (3, 2, 1) = (0, 1, 0), network (
Since it is -1, in Figure 35,
MC, SC image data from FOR Gamegoo 261.271
Data A is output as it is at 32, and AND gates 264 and 274 are in the allowable state.
and the multiplexer 284 is ID2.2D2
is in the selected output state, and the SC image data and MC image data
Images other than the original image part above, such as image pig A that corresponds to both data
Kake data souden B (or gate 262.272 output) j
> becomes. Therefore, the shading data of the original picture and parts other than the original picture are
The state where ta overlaps and t! Scanned image II A I+
Regarding the shaded image shown in Fig. 36(f),
A signal is output. (6)... Net (line) character In this state, processing data selection signal (2, 1) = (0
0), SC image data A, MC image data
Both data A and A become the original image signals (see Figure 32 and Table 3).
In addition, especially the final processing selection signal 3-0, halftone I)/fine character signal
Since the number is -0, the EOR gate in Figure 34
373 output becomes L level and AND gate 376 is allowed.
Becomes in a state of confinement. This changes the state of the shaded color specification signal.
network or C data is output as is (MC network or
33 or SC shaded data). In this state, further R-ray is applied.
Engineering selection signal (3, 2, 1) - (0, 1, 0), network?
iJ3 in Figure 35.
MC and SC images from EOR gates 261 and 271
Data A is output as is, and and goo 1 to 266.
276 is in the permissible state, so only the original part must be unzipped.
and gate 263 (273) and gate 266
The shaded pig is transferred via (276). and,
The multiplexer 284 has 10
2.21) It is in the selection output state of 2, and 5Cii!
ii Image data and MC image data are both corresponding image data.
AND signal of data 8 and shaded data (andgo 1 to 2
63.273 output). Therefore, it is the original part.
It becomes a shaded state, and the read image ii A u
On the other hand, regarding a fine character image as shown in FIG. 36(Q),
A signal is output. (7)... Net (line) character inversion In this state, processing data selection signal (2, 1) = (0
0), both SC image data A and MC image 34 image data A become original image signals (see Figure 32 and Table 3).
). In addition, especially the final processing selection signal 3-1, mesh ()/fine
Since the character signal becomes -〇, Fig. 34 shows [Full FO
R gate 373 output becomes 11 level and AND gate
374 is in the permissible state. As a result, −[description (5)
As in the case, depending on the state of the halftone color specification signal, the original image area
Shaded data for parts other than the minutes is output (M
C-shaded pig or SC-shaded data). Update in this state
Then, the final processing selection signal (3, 2, 1) - (1, 1, 0
), the shading/fine character signal becomes -0, so the 35th
From EOR gates 261 and 271 in the figure, MC and SC
Inverted data of image data A is output, and AND gate 2
66 is the permissible state, so it is a part other than the original picture [Poor
and gate 263 (273>furthermore, and gate 2 (3
6 (276>), the network data is transferred.
In the case of (5) and (6) above, the multiplexer 284
Similarly, it is in the selected output state of ID2.2D2,
Compatible with both SC image data and MC image data■1
Logical product of the inverted signal 35 of 1-image data A and the shaded data for parts other than the original image part
signal (antogame 1-263, 273 output). subordinate
So, the part other than the original part has become a screen.
36(h) for the read image “A I+”.
A signal related to an inverted image of small characters such as ``Z'' is output. (8)...White mesh (line) In this state, processing data selection signal (2, 1) ==(
00), the MC image data is transferred to the SC image data.
Data A is the original image signal, and image data B is the outline line drawing.
It becomes a signal (see Figure 32 and Table 3). In addition, especially the final processing selection value 2 ÷ 3 - 1,
Since the letter is @-0, as in the case of (7) above,
, In Figure 3/I, depending on the state of the halftone color designation signal,
, Is the netting for parts other than the original part (Nodata outputs
(MC shaded data also (yoSC shaded data)
. In this state, the final processing selection signal (3, 2, 1)
-(1,1,1)
Therefore, EOR gt-261 in Fig. 35,
36 inverted data is output from 271 to MC and SC image data, and the AND gate 266°276
is in the permissive state, and the multiplexer 284
3.2D3 selection output state is reached. As a result, both SC image data and MC image data
Shading data other than the original part (Andbutton 263, 2F)
3 output> and the corresponding image data B
-1 to 268.2 8 outputs. Therefore, the outline drawing
The shading data for parts other than the original image overlaps.
, as shown in FIG. 36(i) for the read image "'A".
A signal related to the white-hatched image is output. (9)...Outline m (line) Bunzai In this state, processing data selection signal (2, 1) = (0
0), SC image data A, MC image data
T8 is both an original image signal, and the same image data B is both an outline drawing signal.
(See Figure 32 and Table 3). In addition, especially final processing selection signal 3-0, shading/fine character signal
Since the number is -〇, as in the case of L (6),
In Figure 34, depending on the state of the halftone color designation signal, the halftone color
37 (MC shaded data or SC shaded data). In this state, the final processing selection signal (3, 2, 1) -
(0, 1, 1), network character signal (p/mesh character signal - 0)
Therefore, in Fig. 35, 1'J13 OR gate 261,
MC, SC image data A is output as is from 271.
, and the AND gates 266 and 276 enter the permissive state, and
, the multiplexer 284 selects the output state of ID3゜2D3.
It becomes a state. In addition to this, J stiffness, SC image data and MC image
The image data is the mesh of the original part or the l-1 data (and game).
263.273 output) and the corresponding image data B.
It becomes Soden Bow (or gate 268.278 output). follow
In this case, the shaded data on the outline side and the original part overlap.
The read image is engraved at ``8'' and shown in Figure 36 (j).
A signal related to an image of thin white characters such as (10)...Outline mesh (line) shading In this state, the modified data selection signal jS (2,1) =
, = (01), so SC image data A, M
C Image data A are both for shadow images, and image data B is common.
38 becomes an outline line drawing signal (see Fig. 32 and Table 3). In addition, especially the final addition I 'J selection multiplication signal 3-O1 network
Since the character signal is −〇, it is different from the case of (609) above.
Similarly, in FIG. 34, the state of the halftone color designation signal
The shaded data is output as is (MC network or
(data or SC shaded data). In this state, further R finishing selection signal Q (3, 2, 1) -
(0, 1, 1), net character signal (pu/grain character signal - becomes 0)
Therefore, FOR gate 261.27 in FIG.
1 to MC, SC image data 8 are output as they are, and the
As soon as the command gates 266 and 276 enter the permissive state, the master
The multiplexer 284 is in the selected output state of ID3゜2D3.
Become. As a result, SC image data and MC image data
Both are the shaded data of the shadow part (and gate 263,
273 output> and the corresponding image data B j′j(
, Iage-1~268.278 output). Therefore,
Is it the mesh between the outline line drawing and the shadow part? [When the data overlaps]
36 (k) for the read image LL A I+.
) As shown in
Output 39 (11)... Net (line) shading In this state, processing data selection (2, 1) =
Since (10), 5Cii! ii image data A,
MC image data A is a shadow image signal, and image data 13 is
Both are original picture number 8 (see Figure 32, Table 3);
Final processing selection signal (3, 2, 1) = (0, 1, 1)
, the screen becomes ('J/screen character signal - 0, and the above (10)
Since it is the same as the case, Fig. 35 shows the iJ3
SC image data from the final stage multiplexer 284 and
Both the MC image data and the MC image data are
(263, 273 output) and the corresponding image button B
) i (or gate 268, 278 output)
. Therefore, the original image and the mesh data of the shadow #J part are heavy.
When the read image II A
Regarding the halftone (=I 4) image as shown in Figure 36 (1)
A signal is output. (12)... Netting (line) with white shadow () In this state
is the processed data selection month (2, 1) = (01).
Therefore, SC image data A and MC image 1/IO image data A are both shadow image signals, and image data B are both external shapes.
It becomes a line signal (see Figure 32 and Table 3). Also, especially the final
Processing selection value @ 3' = 0, shading/fine character signal -
1, so as in the case of (5) above, the 34th
In the figure, depending on the state of the halftone color designation signal, the original 1i
Net data is output for parts other than b7 (
MC shaded data or SC network (pdata). this condition
Further, in the final addition, the two selection signals (3, 21) = (0,
1,1), since the shading/fine character signal is -1,
From E OR goo 1-261.271 in Figure 35
MC, SC image data A is output as is, and
The ports 264 and 274 are enabled, and the multiplex
The lexer 284 enters the ID3.2D3 selection output state. As a result, SC image data and M'Cl1i image data
Both the shadow image data and the shading data for areas other than the original image.
The sum signal of the data (Oagoo 1 to 262.272 output) and
Furthermore, it and the image data B are related (Or Gate 268
．． 278 output). Therefore, the outline drawing, shadow drawing, and further
Shading for parts other than the original image 41 The data overlaps, and the read image 11 A I
For +, there is a net like the one shown in Figure 36 (m).
A signal related to the shadow A4 image is output. (13)...Mesh (line) or (shadow line) In this state, processing data selection signal (2, 1) = (1
Since 1), as in the case of (2) and (3) above,
, SC image data A, and MC1iii image data A are both
The original image signal and the same image data B are both the shadow image signal (the first
See Figure 32 and Table 3>. In addition, especially the final processing selection signal, etc., as in the case of (8) above, in FIG. 34, the network
Depending on the state of the overlay color designation signal, parts other than the original image
Shading data is output (MC shaded data or
SC network (button data) a In this state, further select the final processing
Signal (3, 2, 1) - (1, 1, 1), net or t/
The above (8) is also used in this case, probably because the halftone signal is -〇.
Similarly to the case of [OR gate 26 in FIG.
1,271 outputs an inverted signal to MC image data.
, AND gate 266°276 becomes permissible state and
, the multi-player "42 284" becomes the selected output state of id3, 2D3. From this, 5CiiIll image data and MC image data
Both are the shading data (and
Sum signal of gate 263, 273 output) and image data B
(OR gate 268, 278 output). Therefore, the shadow
Shading data for areas other than the image and the original image overlap
state, and the 36th
A signal related to a shaded line image as shown in Figure (n) is output.
Powered. (14)...Hatting (line) uppercase letters In this state, processing data selection signal (2, 1) - (1
1) Therefore, as in (13) above, the SC image data
Both data A and MO image data A are original image signals and the same image data.
Both T and B become image signals (see FIG. 32 and Table 3). Ma
In addition, especially the final processing selection signal 3-○, shading/fine character signal
-1, so as in the case (12) above, the
In Figure 34, depending on the state of the halftone color designation signal, the original
Shading data is output for areas other than the image (MC
Shaded pig or SC shaded data). history in this state
, 43 Final machining selection signal @ (3, 2, 1) - (0, 1, 1)
, the shaded/fine character signal is −1, so in this case
Similarly to L (12), the final stage multiplexer 28
SC image data and MC image data Gt image data from 4
Is it the mesh for the parts other than the data A and the original picture (the sum of the data
signal (or gate 262.272 output) and furthermore the image
Sum signal with image data B (Oagoo 1 to 268.278 output
power). Therefore, the original picture, the shadow picture, and the parts other than the original picture.
The shaded data overlaps, making it difficult to read.
At 4pm on the image "8", a network as shown in Figure 36 (0) is created.
A signal regarding the bold character image is output. (15)...Network (line) character shading () In this state, processing data selection signal (2, 1) ==(
11), so the above cases (13) and (14)
Similarly, SC image data A and MC image data 8 are both original.
Both the image signal and the same image data B become a shadow image signal (32nd
(see Figure, Table 3). In addition, the above (9), (10), and (11)
As in the case, the final processing selection signal (3, 2, 1) = (
0, 1, 1), Shading/Shading +] - 〇
44. In Fig. 34, depending on the state of the shaded color designation signal,
, the shaded data is output as is, and further, as shown in Fig. 35.
, the SC image from the final stage multiplexer 284
The data and MC image data are the meshes of the image data A part.
data (AND gate 263.273 output) and image data
Sum signal with data B (OR gate 268, 278 output)
Become. Therefore, the net about the principle part [no data and shadow]
The images overlap, and the scanned image "'A"
36(p).
A signal related to the image is output. In each of the above processes, shadow color designation Shingetsu (Figure 32), shading /
Line color designation signal (Figure 34), net/pictogram, net/picture
In the state of the color designation signal (Fig. 35) for text, halftone/shading
Accordingly, the generated mesh (line pattern), shadow image, outline line drawing
color information (main color MC or sub color MC) for each signal.
Color SC) will be added. Also, when compositing shadow images and outline drawings in different colors,
In the overlapping tf portion, the shadow clear signal in circuit 45 shown in the v833 diagram rises, the shadow image signal is removed, and the
This prevents color information from being generated for the same pixel.
It will be done. ■, Area processing Above, original picture (original image), shadow picture, outline drawing, mesh (
Line) or [Various processing related to
It is also possible to realize this only for the areas that are covered. The circuit shown in Figure 37 scans the specified area on the document.
This is an area recognition circuit for recognition during the scanning process. In the same figure, 300 is a so-called editor pad, etc.
There is a coordinate input device 'Fil' C, and the area on the document, e.g.
The operator pentagizes the coordinate data of the four corners of the rectangular area.
Irino j or key human power j, it's becoming a sea urchin. this
In the coordinate input device fiff300, for example, there are two types of attributes.
It is now possible to specify areas (first area, second area) with
Ru. 310 is an example where L coordinates are input from human powered device 300
From the ordinal data of one point λ or 1/I6, create a region that recognizes a box-shaped region connecting those coordinate points.
The circuit 320 is a pixel for each A"C" when reading an image.
Is it inside or outside the area recognized by the area creation circuit 310?
This is a region determination circuit that performs the determination of
320 is the recognition area data and output during the document scanning process.
page sync signal (PAGE 5YNC), video
Override signal (V, VAD), video clock signal
(V, CLOC) for each read pixel.
Is the pixel within the first region (ARDT 1: H level)?
, in the second area (8RDT2: eye level), in the first area
, outputs a signal for determining whether it is outside the second area (AROUT)
It looks like this. Figure 38 is based on the area discrimination signal from the above area recognition circuit.
and output the desired processing signal only for the specified area.
This is a signal selection circuit for This signal selection circuit is
``Data selection signal'', but similarly, ``Most data selection signal''.
The same applies to the final processing selection signal and the shading/fine character signal.
A signal selection circuit having a similar configuration is provided. 1 I! 1.7 In the same figure, 335 is 8-bit input data (0 to 7)
Encode to convert into 2-bit data (AO281)
The input lower 5 bits of this encoder 335 are
It is fixed at "1" (+-1 level). Also
, each area data from the area recognition circuit (Fig. 37) is
The upper 3 bits of the encoder 335 are transferred via the inverter.
The out-of-area data AROUT is transmitted through the inverter 331.
and input the second area data ARD T' 2 to the input terminal (5).
is connected to the input end (6) via the inverter 332, and the first region
Data A R+')T1 is input via the inverter 333.
It is input to the power end (7). This area data (8RD
T1. ARDT2. AROUT) and encoder 335
The relationship with the output (AO, AI) is as shown in Table 5. Table 5 1/18 337 is a two-way multiplexer, and the control of S8 and SR is
Depending on the condition of the input saw, either input 1DO to ID3 will be selected.
IY, one of J2DO ~ 2' D 3 is 2Y
It is designed to be outputted respectively. And its entry and exit
The power relationships are similar to those in the table above. This ma
Each input terminal IDO to ID3.2DO of the multiplexer 337
~2D3 has operator specified input - U CP
A processing data selection signal output from U is input. Specifically, first, IDO to ID3 send processing data selection signals.
With the specification regarding issue 1, AR1 with the first area as a square image
■ Processor selection signal 1 targets 1DO1 second area
AR2 processing data selection signal 1 is 1D1, targeting outside the area
The selected AR external processing data selection signal 1 is input to 1D2 respectively.
ing. Next, 2DO to 2D3 are powered [I Jl data selection]
AR that targets the first area with the specification of selection B2
1 processing data selection signal 2 targets the 2DO1 second area
[AR2 addition] - data selection signal 2 is 2D1, outside the area
The imaged AR external processing data selection signal 2 is input to 2D2 respectively.
I'm working hard. Note that 1D3 and 2D3 are in the open state.
Ru. Then, the output (2Y. 1Y) of the multi-branch 337 becomes the final processing data selection signal (2, 1).
, is used in the circuit shown in FIG. 32 mentioned above. On the other hand, 338 is also a two-way multiplexer, but this
The multiplexer 338 is one system (IY output system)
Only is used to change the specification regarding coloring, and the IDO
The AR1 coloring designation signal targeting the first area is sent to ID1.
The AR2 shadow color designation signal targeting the second area is sent to ID2.
Input each AR outside corner color designation signal for outside the area.
There is. Then, the output IY is the final coloring designation signal.
This is applied to the circuit shown in FIG. 32 described above. Selection signal sent to each multiplexer 337 and 338 above
In this case, the output signal from AO of encoder 335 is the selection signal.
SA, the output signal from Doujin 1 becomes the selection signal SB.
There is. 50 With the above configuration, for example, if the first area is
When processing tI', add AR1] - data selection signal
1 and AR1 processing data selection signal 2 to the desired state.
(see Table 4), machining data setting signals that are applied to other areas (see Table 4).
2, 1) can be set to (1, 0) (Table 4 shows ()
): Figure 36 (a) Original picture>. Then, the process of image reading
Then, each pixel is output from the area recognition circuit shown in Figure 37.
The first area data ARDTI is
When reaching level 11, the amount of multi-break starts from 337.
No.81<1 processing data selection signal 1 and AR1R1 processing
■■ in Figure 32, which was mentioned in Day 9 Report Selected Report 82! supplied to one road
, the selected output is the same as the state of this "processing data selection signal"
"Final processing selection signal""Shading/fine character signal [
Processing and synthesis processing is performed according to the state of each signal. This allows only the first area to be read during the image reading process.
The image signals that have been subjected to the desired additions and synthesis processing are sequentially forwarded.
Ru. The same applies to other areas and coloring specifications.
The process 51 is performed based on the designation for each area. ■, Multi-value processing Various composite images generated by the processing described above
The signal is basically binary image data, but this binary
The image data is converted into a multivalued image data before being transferred to the image forming section.
converted to data. The circuit for this multi-value processing is as shown in Fig. 39, for example.
ing. In the same figure, a3, 342 and 3/l 34 selection circuit
and each selection circuit 342.3/1.3+ yo II
OII data (A) and set concentration data from CPU (8 pins)
1~:256 gradations) (B> Select output Y
The selection signal is set when the human power S is at the eye level.
Concentration data (B) is determined when the same selection signal human power S is at L level.
Select and output each OII data (a):
There is a sea urchin-C. The above setting concentration data can be set by the operator.
Operation of keys, etc. installed on the console panel L
Specify the desired dark 1a data as input.
In response to the operation input, setting density data is also transferred from the CPU. In addition, the final
The MC image data and SC image data that are output as
I am inputting to Agu J-341 and this ORGATE 34
1 output signal is the selection 4g of each selection circuit 342.343
It's +33 and Natsu°. In history, 3/14.345 is also
One selection circuit 344 is a selection circuit, and one selection circuit 344 is a selection circuit.
81 degree reading data input directly from the information generation circuit 50
D (A) and the output data (B) of the selection circuit 342.
Select one of them and output Y, and the other selection circuit 345 reads the same.
density data (A) and output data of the selection circuit 343
(B) is selectively output Y. These selection circuits 344 and 345 also have −[description circuit 342
．． Similar to 343, the selection signal S input is at level 11.
When the (B) side data is selected when the same selection signal S input is at L level,
Now the data on the (A) side is selectively output Y.
There is. Then, the cutoff generated by the circuit shown in Fig.
The switching signal SS is the selection signal of each selection circuit 344, 34.5.
No. S and 53. The circuit shown in Figure 40 processes and synthesizes the image described above.
(determines the state of the switching transmission +38 s above)
Ru. In the same figure, the above-mentioned final processing selection signal 2 and the same signal
3 is the inverting input and input to 351, and the R line is added.
The engineering selection signal 2 and the net character signal (and goo 1)
Enter ~352 and enter -C. And each and gate 3
ri 1.352 Dekai Kei 3 enters Punto Gate 353
The text has been input into the word noguto 355.
Ru. In addition, this Orbut 355 has an MCC mesh line pattern.
line data SC network/line pattern data is OR gate 3
54. On the other hand, the final song] Two selection signals
1 and the same signal 2 enter the AND gate 356 with negative logic configuration.
processing data selection signal 1 via the inverter 357.
and processing data selection signal 2 are respectively input to the Nandobutto 358.
To those who support us, the above Antogames 1 to 356 and Nantes
The output I of the gate 358 is an AND gate with a negative logic configuration.
359]. 54 Then, the output signal 8 of the OR gate 355 and the negative logic configuration
The output signal of the AND gate 359) is the output signal of the AND gate 36
0, and the output signal 3 of this AND gate 360 is the final
As a result, the above switching becomes 3.3 s (as shown in Figure 39).
are supplied to each selection circuit 344, 34.5. In the circuit shown in FIG. 40, processing of each of the above images,
The state of the switching signal SS is as follows depending on the mode of synthesis.
Ru. Processing data selection signal (2, 1) = (1, 0), final
Processing selection signal (3, 2, 1) - (*, o, o), network
In the case of original image output with overlapping/fine character signal - * (
(See Figure 36(a), Table 4(0)), Switching signal 7”j S
S always maintains the 1-level. In addition, processing data
Selection signal (2,1) = (0,0), final processing selection signal
(3,2,1) -(0,1,0), shading/fine text
No.-1 meshing (line) image output (Figure 36 (''),
(see Table/l (5)), the switching signal Ss corresponds to
Only when the network (line) pattern signal is at level 11
Becomes a bell state. Furthermore, in other cases, the relevant
The switching signal 3s maintains the 55-11 level. Above j; Una switching (iW 'I'i S S to J,
, in the case of both net (line) and GJ images, either net or εJ/line or #ts.
4. About each dot in Bataan. t, h>selection circuit 3
/12.3/1.3 and selection circuit 344.345 selection
Since both the signal S and the low level are low level, it is shown in Fig. 41(a).
Showing 1: Sea urchin, set 81 degree data D for the dot.
N is output. Also, the net or 4t/line putter
For dots other than N, cut J'A (rj Bow S s
is at L level, as shown in Figure 41(b).
The read density data D of the background is output as is. subordinate
So, in this case, as shown in Figure 41 (C),
The above setting S degree data [)H dot and the reading density dot
By combining with the tsuto, the entire image shingetsu is iq. In addition, if the switching signal always maintains the low level,
As shown in Figure 42, the M Ciij++ image art data
Image part where any of the SC image data is low level
Then, the set density data [)N is output, and other non-image
In this section, the Lr OII data is output as final 56 concentration data. In addition, the original image where the switching signal Ss is always at the same level.
In the case of , there is no concentration change and the read concentration data is always read.
D is output. The color that corresponds to the density data obtained by the above multi-value conversion
The flag is the MC color flag, which is the MC image data as it is.
MCF, SC image data as is as SC color flag
The CFs are transferred sequentially. IX, image forming unit Processing and updating in the correction/filter circuit 70 as described above.
The editing/processing circuit 100 performs shadow image extraction, outline extraction, and modification.
'a degree data and paired colors that have undergone various compositing processes
- Flags (MCF, 5CF) are interface circuit 15
0 via laser printer 200. Images of fax etc.
The data is transferred to an image forming device such as a transceiver 260. This picture
For example, a laser printer 200 performs processing in an image forming device.
will be explained below using an example. In this case, a copying machine (digital copying machine) is constructed as a whole.A two-color image is produced based on the density data D and color flags mentioned above.
The basic configuration of the laser printer 200 that performs forming is as follows:
For example, it is as shown in FIG. shown here
Laser printers that form two-color images use an electrophotographic method.
The main color is black image formation and the nub color red image formation
The image forming process is realized in one image forming cycle.
The so-called 1-pass 2-color (IP2C) type
It's a photo machine. In FIG. 43, an image is formed around the photosensitive drum 440.
Charger 441, sub color (red) to execute the process
Developing machine 442 for main color (black), developing machine 14 for main color (black).
43, Before transcription: l:] Rotron/1.48, Cleani
ff1446 are arranged respectively, and the subcolor
The exposure position of ZAB color just before the development el 442 for
Ps is the main color developer just before the main color developing machine 443.
Color exposure positions Pm are set respectively. For exposure system
When I looked at it, I found that there was a record for writing images about the main color.
- The Dai No. 58 The light of the light from Do 411 is kept at a constant speed by the servo motor / 113
Rotating polygon mirror 414 and f-θ lens 415
, the main color through optical systems such as reflectors 417 and 418.
- Exposure position ii # P m is set,
Laser diode for writing images about color/110
Similarly, the illuminating light from the polygon mirror 414 and f-θ
The sensor is transmitted through a lens 415 and an optical system such as an anti-D [416].
It is set to reach the exposure position ps of the black color. Ma
In addition, the transfer position around the photosensitive drum 440 is
Data for Corotron 444 and Recording Sheet Peel-1
Rakuko [1 Tron 4/I5 is placed, and the upper
Each developing machine 442.443 generates a photoreceptor drum 44.0.
The red toner image and black toner image formed on the paper are removed from the paper feed system.
The images are transferred in bulk onto the conveyed recording sheet 450.
It has become. Then, a recording sheet 45 on which the image has been transferred
0 further undergoes image fixation in the fixing device 447, and then, for example,
-1. On the other hand, if we look at the control system of the laser diode 459 10.411 for image writing mentioned above, it will be as follows.
. via the image processing system interface circuit 150 described above.
The density data [)m and the color flag C "-" are displayed in pixel units.
The color flag CF is supplied, and the color flag CF is
color density data Dm (black density) and sub color density
Switching circuit 401 that separates the degree data Ds (red density)
is set.J'3, in the above processing section
The color flag is the main color flag MCl-Dozabu color
It was composed of 2 bits of flag SCF, but the above switching
The color flag CF provided to the circuit 401 is
The base circuit 150 expresses other colors such as Zab color.
Can be changed to 1-bit configuration. □For body orientation, use the above ribbed collar.
-Flag SCF IP from interface circuit 150
Transferred to the next stage. the pixels in the background area as the main color
- area, and this switching circuit 401 is controlled.
The color flag C to be controlled is locked for pixels in the sub-color area.
level, and pixels in other areas are 1-level.
60 I'm trying to make it happen. The specific '1 MIJ of the switching circuit 401 or, for example, the 44th
It is as shown in the figure. In other words, the state of the color flag
Two selection circuits 4'21 and 422 are installed to select the output from two systems of input signals (A and B) depending on the state.
The density data D is input to the selection circuit 421 at the input node j@B and
and the input terminal A of the selection circuit 422.
The input terminal A on the opposite side of the selection circuit 421 and the selection circuit 422
110 I+ data is input to input terminal B on the opposite side.
are doing. These selection circuits 421 and 422 are at L level.
The A side is input with the control input of , and the B side is input with the low level control input.
Each force signal is selected and the color flag CF is selected.
This is the control input. Then, one selection circuit 42
1 output is sub color density data DS1 and the other selection circuit
The output of 422 is the main color density data ()m.
It is configured to be transferred to the subsequent stage in elementary units. this
In the switching circuit 401 having such a configuration, the image in the sub-color area is
For the element, the corresponding Zabu color density data [)S is after
The other areas (main color area and back weight area)
For pixels, the corresponding main color density data [)
m is transferred to the subsequent stage. The main color density data separated by this switching circuit 401
The data [)m and the color magnification data l)s are respectively
Book color m degree data [)S is the first screen generator
402, the main color 1flf [pig [)m] is the second step.
It is input to the clean generator 403. Each screen generator 402.403 has an 8-bit
through the switching circuit 401 expressed in 256 gradations.
Each m degree data [)m, l)s is laser-dipped for each pixel.
This converts it into an iode modulation code. specifically
is the density data D expressed in 256 gradations by the laser of each pixel.
This is used to convert the amount of lighting area, for example, as shown in Fig. 45.
For one pixel P, three divided pixels (-
leave pixels) SP1 to SP3 are set, and the density data
The laser lighting area is determined by the number of divided pixels according to the data.
ing. The modulation values output from the screen generators 402 and 46203 are set. For example, if you follow Table 6, the code will be as shown in Figures 46 (a) to (d).
It is possible to express each pixel in four stages as shown in
. In addition, as mentioned above, the density data D of 256 gradations is set to 4 levels.
The threshold of each step when converting to the code of each color is
Based on the reproduction characteristics (development characteristics), input 'c4 degree data
The settings are set so that faithful color reproduction is achieved. therefore
, the first screen generator 402 is the sub color (red)
color reproduction characteristics, the second screen generator 403
Separate threshold values are set for each color based on the color reproduction characteristics of Incolor 63 (black).
It will be done. 1 page from the above first screen generator 4.02
Color modulation code 5C (11 lines of 1-T "O memo"
40/l (first-in, first-out);
Main color modulation from screen generator 403
Code MC corresponds to each via gap memory/106
The second RO8 control circuit 405 and the second RO3 control circuit 4
07 is entered. −[Gap memory=1.06
As mentioned above, the Zab color exposure position ffff P
S and main color exposure position pm of each developing machine 442, 44
Due to the arrangement of No. 3, Gillep Gl is placed on the photosensitive drum 440.
) from the main color image and the main color
- Modulation of the main color to align the image formation position
The code transfer timing corresponds to Jl.
This is to delay it by the amount that it takes. Therefore, the gap
The damage to the memory 406 and the read timing are determined by each of the above exposures.
Light position ps, pm? To be determined by Tsubu Gl)
. 64 The -RO8 control circuit 405 is a sub-color modulation code.
Generates a laser modulation signal for the corresponding system based on the SC.
In addition, a servo motor for rotating the polygon mirror 414 is installed.
413 is generated. Also, the above
Is the second RO8 control circuit 407 the second ROS control circuit 405?
based on the main color modulation code MC.
Then, a laser modulation signal of the corresponding system is generated. Based on the control signal from the -RO8 control circuit 405
The motor driver 412 is a glue motor for polygon mirrors.
While driving the motor 413 at a constant speed, the -RO8 control circuit
Based on the sub-color modulation signal from 405, the laser driver
Iba 408 is a laser for writing images for sub-colors.
The diode 410 is turned on and off, and the second
A star appears on the main color modulation signal from the RO8 control circuit 407.
Next, the laser driver 409 detects the main color.
On/off drive of laser diode 411 for image tugging
is being carried out. As shown in section 2, the main color image writing register 65 The diode 411 and the →knob color image writing register.
By controlling the on/off of the diode 410, the charger
Each color is placed on the photosensitive drum 440 which is uniformly charged by 441.
An electrostatic latent image is formed at a potential state corresponding to the
The sub-colors for the image are processed by the developing machine 442.
Red 1 to color development, developer machine 443 for main color
Black dove development is carried out. And a photosensitive drum
/The red and black toner images formed on I40 are fed
The history is transferred to the recording sheet 450-H supplied from the system.
After image fixation, the recording sheet with two-color reproduction is discharged.
be done. Various processing and compositing as explained in the above image compositing section, etc.
For example, if the image on the original is
As shown in figure (a), when J and sea urchin become “A”, the operation
J-data selection signal based on the specification from the controller, final
Depending on the state of the processing selection signal, shading/fine character signal,
The real timer is synchronized with the scanning at the scanning section (see Figure 2).
Immediately, the images (b) to (p) are processed and edited like Nesa.
The page is reproduced on the record 66 sheet. In addition, in the image formation of the above-mentioned sub-color, as shown in FIG. 47 (
A latent image Z1 with the exposed area as the image area as shown in a) is formed.
This latent image Z1 is transferred to the first developing bath at the developing stage 11442.
Developed under IAS VBI and colored in Zab color (red).
A toner image T1 is formed. In the above main color image formation, Fig. 47 ([)
) A latent image 72 is formed in which the non-exposed area becomes the image area.
This latent image Z2 is transferred to the second developing via in the developing machine 443.
Main color (black) toner developed under VB2
- Image T2 is formed. And specifically, these
Toner image T1. T2 is polarized at corotron 448 before transcription
After the sheets are aligned, the recording sheet 1 is transferred to the transfer corotron 444.
~ 450 are transferred all at once. X. Summary In the above embodiment, the main scanning direction and sub-scanning direction are
Pixels that change from image area to non-image area (change point)
Detect it, and shift it by 1 pixel in the scanning direction every 16 fins from the change point to the set pixel width.
Shadows are generated sequentially. This is shown in Figure 20.
The 45 degree shadow at the bottom right is J in the direction, giving a realistic shadow.
is generated. In addition, in this case, the circuit shown in FIG.
The image area changes from the image area to the non-image area in the scanning direction.
When converting pixels, both the image part side and non-image part side are changed.
45 degrees to the lower right starting from both pixels.
Since shadow images are generated sequentially in the direction of
Shadow images can be prevented from being cut out at the border between the
continuity will be ensured. In the above process, shadow images are generated sequentially in the main scanning direction and sub-scanning direction.
will be accomplished. This applies to lines that have already been read and scanned.
Do not perform shadow image generation processing by closing the pixels of
This allows real-time scanning to be performed in synchronization with the scanning of the original.
This process is especially suitable for reproducing shadow images in time.
Ru. This J: A memo that stores image data instead of processing it.
Secure the image data before the reading time using
By doing so, it is possible to create an arbitrary shadow in the direction shown in Fig. 1.
68 <0>etc.> shadow image generation is also possible. In addition, the shadow line width data X set in the line memory is
For the pixel width W, it is calculated as X = 128+1-w, but this
This is due to the Therefore, simply set the pixel width W directly.
according to an algorithm that generates a shadow line drawing with the pixel width W.
Of course, such processing is also possible. The pixel width of this shadow line may be fixed in advance, but
By being able to set the controller's operation input to 1,
, the size of the image on the manuscript, and the width is balanced.
A shadow line drawing with a width that matches the user's preference is generated.
. , In the example described in E, a binary image is converted to multi-tone data.
However, this is especially necessary when reproducing binary images.
isn't it. However, in the above embodiment, there were originally 256 gradations.
Since the image is read with
Multivalue processing is performed to match the image reproduction processing.
ing. And, the multi-gradation data can be set variably.
69, so that the density can be reproduced according to the user's preference.
Become. Furthermore, in the above example, each step of image addition 1 and compositing
is doing the right thing. . Only the generated shadow image is processed into a line image, and the processed shadow image and
A "hatched image" that combines the original image (original picture)
(See Figure 36 (1)), the original image is whitened out.
Or process it into a line image and generate the processed image and the above.
``Outline shadowed &amp;image'' (3rd
See Figure 6 (e)〉 “Fine text with shading is an image” (Figure 36)
(see (p)), add the original image to the white image]
Process the shadow images generated together into line images, and process each of them.
"White mesh shadow" (=
Ik) image” (see Figure 36(k)).
is being generated. In addition to the above-mentioned image synthesis, the above-mentioned embodiment
Paintings or original images as well as their composite images
We also generated a composite image that performs netting on
('i: See Figure 36) 1. This 70 makes it possible to generate images with even higher added value.
The color changes that can be made in the above embodiments are not limited to the following images.
or shape conversion, etc. can be set as appropriate. This also applies to mesh patterns or line patterns used in processing.
Examples include, but are not limited to, dot patterns, special
Set the repeating pattern of the fixed image (◆) as desired.
be able to. In the above embodiment, a two-color reproduction copier is used as an example.
However, of course, the details of copying machines aimed at reproducing monochrome images
Image forming equipment, and even multicolor (full color) image reproduction
It can also be applied to the intended image forming device. [Effects of the Invention] As explained above, according to the present invention, the read image
Predetermined image 11i'i written on the manuscript based on the information
Detecting the point of change from the image to the non-image part when viewed in the direction, and moving from the image change point to the non-image side.
Generates a shadow image with a predetermined pixel width in the predetermined shadow direction.
Since the shadow lines of images such as characters and figures are
It becomes easy to culm. Furthermore, the shadow image generated in this way and the processed image of the interface
Any combination, combination of shadow image with any image,
Or, the addition of both the shadow and the original image - the images together.
From reading the interface of J, S, and Shido to the synthesis of
A composite image can be obtained through extensive processing. These things add more to the read image.
It is possible to generate images with 11 values. . Also, the above change point can be detected in the same direction as the document scanning direction.
By performing such processing and shadow image generation processing, the image
The process is synchronized with the reading of image information in the reading T stage.
real-time processing synchronized with image reading.
easily realized.

[Brief explanation of drawings]

FIGS. 1(a), (b), (c), and (d) are block diagrams showing the configuration of the present invention, and FIGS. 1(e) to (J) are examples of shadow image states. Figure 2 is a diagram showing an example of the structure of a scanning system of an image processing device according to the present invention, Figure 3 is a block diagram showing an example of the basic configuration of an image processing device according to the present invention, and Figure 4 is a structure of a full color sensor. Figure 5 shows an example of the layout of each cell of a full color sensor.
Figure 9 is a circuit diagram showing an example of the configuration of a sensor tough circuit; Figure 9 is a diagram showing an example of a cell configuration in pixel units;
The figure is a circuit diagram showing an example of the configuration of a color image information generation circuit, Figure 11 is a diagram showing the state of color discrimination in color space, and Figure 12 is a diagram showing the relationship between distance r from the origin and saturation C in color space. Figure 13 is a diagram showing the relationship between angle θ and hue aperture in color space, Figure 14 is a diagram showing the correspondence between density data and color flags, and Figure 15 is density data of 256 gradations. Fig. 16 is a diagram showing the status of the binarized image data and color flags (MCF, 5CF), and Fig. 17 is the entire shadow line extraction circuit. An example of the configuration is shown.
4 Circuit diagram, Fig. 18 [About the main scanning direction 1~73 An example of the configuration of a main scanning direction emptying point detection circuit for detecting a change point from an image area to a non-image area 1 Circuit diagram, Fig. 19
The figure does not show an example of the configuration of the edge detection flag generation circuit, FIG. 20 is a diagram illustrating an original image drawn on a manuscript and its shadow image, and FIG. 21 is a diagram of the shadow line extraction circuit. FIG. 22 is a circuit diagram showing an example of the overall configuration of the outline extraction circuit; FIG. 23 is a circuit diagram showing an example of the configuration of the outline detection circuit in the main scanning direction; and FIG. FIG. 25 is a timing chart showing the operating state of the outline detection circuit; FIG. 25 is a diagram showing a configuration example of a circuit that generates an edge detection flag in outline extraction processing; FIG. 26 is a timing chart showing the operating state of the outline extraction circuit. , FIG. 27 is a diagram illustrating the original image drawn on the manuscript and its outline line, and FIGS. 28 to 3
0 is a diagram showing the storage state of mesh patterns and line patterns (mesh/line patterns) in memory, FIG. 31 is a diagram showing an example of the configuration of a circuit that generates mesh/line patterns, and FIGS. Figure 35 is a diagram showing an example of the configuration of 1!1174 paths related to image processing and composition, Figure 36 is a diagram showing an example of image processing and composition, and Figure 37 is a diagram for determining the area specified on the original sheet. Figure 38 is a diagram showing an example of the configuration of a circuit. Figure 38 is a diagram showing an example of the configuration of a circuit that switches the output of various processing command signals for a specified area. Figures 39 and 40 are binary image data that have been variously processed and synthesized. 41 and 42 are diagrams showing the state of conversion to multi-tone image data. Figure 43 is an electrophotographic two-color printer. FIG. 44 is a diagram showing an example of the configuration of a circuit that separates density data using color flags, FIG. 115 is a diagram showing an example of divided pixels constituting one pixel, and FIG. A diagram showing an example of the relationship between the laser modulation code corresponding to the density data and the laser lighting state, Figure 47 is a diagram showing an example of the development characteristics of the main color and sub color, and Figure 48 is the original image (original image) [Explanation of symbols] 1... Original document 75 2... Image reading means 3... Image change point detection means 4... Shadow image 1 precept means 5...・Shadow image processing means 6a, 6b, 6cm=Image 7...Original image processing means 10...Full color image processing means 20...Hinza Intaf J 50...Color image information generation circuit 70...Correction/filter circuit 100...Editing/processing circuit 150...Interface circuit 200...Redeprinter 260...Image transmitter/receiver 270...Kombita utility synthesis means circuit

Claims (12)

[Claims] (1) An image reading means (2) that optically scans the original (1) and reads image information in predetermined pixel units;
) image change point detection means (3) for detecting a change point from an image part (I) to a non-image part (NI) when viewed in a predetermined direction of the image (I) drawn above; and a detected image change point. An image shadow line extracting device comprising: a shadow image generating means (4) for generating a shadow image of a predetermined pixel width in a predetermined shadowing direction from the non-image (NI) side to the non-image (NI) side. (2) An image reading means (2) that optically scans the original (1) and reads image information in predetermined pixel units;
) image change point detection means (3) for detecting a change point from an image part (I) to a non-image part (NI) when viewed in a predetermined direction of the image (I) drawn above; and a detected image change point. shadow image generation means (4) for generating a shadow image of a predetermined pixel width in a predetermined shadow casting direction from the side toward the non-image (NI) side; and shadow image processing for processing the shadow image generated by the shadow image generation means (4). means (5); the original image (I) obtained based on the image information read by the image reading means (2); and the shadow processing means (5).
Image synthesis means (6a) for synthesizing the processed shadow image from
). (3) An image reading means (2) that optically scans the original (1) and reads image information in predetermined pixel units;
) image change point detection means (3) for detecting a change point from an image part (I) to a non-image part (NI) when viewed in a predetermined direction of the image (I) drawn above; and a detected image change point. a shadow image generating means (4) for generating a shadow image of a predetermined pixel width in a predetermined shadow casting direction from NI to the non-image (NI) side; An original image processing means (7) that processes the original image (I), and a processed image obtained by this original image processing means (7) and a shadow image generated by the shadow image generation means (4) are combined. An image processing device characterized by comprising an image synthesizing means (6b). (4) An image reading means (2) that optically scans the original (1) and reads image information in predetermined pixel units;
) image change point detection means (3) for detecting a change point from an image part (I) to a non-image part (NI) when viewed in a predetermined direction of the image (I) drawn above; and a detected image change point. a shadow image generating means (4) for generating a shadow image of a predetermined pixel width in a predetermined shadow casting direction from NI to the non-image (NI) side; Original image processing means (7) for processing the original image (I); Shadow processing means (5) for processing the shadow image generated by the shadow image generation means (4); Original image processing means (7) An image processing device characterized by comprising: image synthesis means (6c) for synthesizing the processed image from the image processing means and the processed shadow image from the shadow image processing means (5). (5) The image change point detection means (3) is a main scanning direction image change point detection means for detecting a change point from an image portion (I) to a non-image portion (NI) in each scanning line as seen in the scanning direction. , sub-scanning direction image change point detection means for detecting a change point from an image part (I) to a non-image part (NI) in the moving direction of each scanning line, and the shadow image generation means (4) mainly comprises: main scanning direction shadow image generation means for generating a shadow image of a predetermined pixel width in the scanning direction from the change point detected by the scanning direction image change point detection means; and a change detected by the sub scanning direction image change point detection means. 5. The image shadow line extraction device or image processing device according to claim 1, further comprising a sub-scanning direction shadow image generation means for generating a shadow image of a predetermined pixel width from a point in the moving direction of the scanning line. . (6) The main-scanning direction shadow image generation means and the sub-scanning direction shadow image generation means include a shadow image generation shift means for shifting the shadow image of each pixel to be generated from the detected change point by one pixel in the scanning direction for each scanning line. 6. The image shadow extraction device or image processing device according to claim 5, further comprising: an image shadow extraction device or an image processing device. (7) The image change point detection means in the main scanning direction includes a first image change point detection means for detecting, as a change point, a pixel on the image part side that changes from the image part to the non-image part; 7. The image shadow line extraction device or image processing device according to claim 6, further comprising second image change point detection means for detecting a changing non-image portion side pixel as a change point. (8) The shadow image generation means (4) is characterized in that it includes a shadow image generation prohibition means for prohibiting the generation of a shadow image of the original image portion (I) when the shadow image to be generated overlaps with the original image portion (I). An image shadow extraction device or image processing device according to any one of claims 1 to 4. (9) The image shadow line extraction device or image processing device according to any one of claims 1 to 4, wherein the shadow image generation means (4) has a shadow width setting means capable of variably setting the pixel width of the shadow image. Device. (10) The image reading means (2) has a function of reading multi-tone density information as image information, and sets the multi-tone density information read by the image reading means (2) to a predetermined reference value. It also includes binary image information converting means for converting the image portion (I) and non-image portion (NI) into binary image information in which the image portion (I) and the non-image portion (NI) are distinguished based on the image change point detecting means (3). Binary image information is obtained from the value image information converting means, and the shadow image generating means (4) is characterized in that it includes a density converting means for converting the shadow image obtained from the binary image information into multi-gradation density information. The image shadow line extraction device according to claim 1. (11) The image reading means (2) has a function of reading multi-tone density information as image information, and sets the multi-tone density information read by the image reading means (2) to a predetermined reference value. The image changing point detecting means (3) or the image changing point detecting means (3) is provided with binary image information converting means for converting into binary image information that distinguishes the image part (I) and the non-image part (NI) based on the image part (I) and the non-image part (NI). ) and the original image processing means (7), the target image information is binary image information from the binary image information conversion means, and the subsequent shadow image generation means (4), shadow image processing means (5), and image synthesis means Each of the means (6a, 6b, 6c) processes binary image information, and converts the binary image composite image obtained by the image synthesis means (6a, 6b, 6c) into multi-gradation density information. Claim 2, further comprising a composite image density conversion means for converting the density of the composite image.
Alternatively, the image processing apparatus according to claim 3 or 4. (12) Claim 10 or 11, wherein the density converting means or the composite image density converting means comprises density setting means capable of variably setting multi-gradation density information to be converted.
The image shadow extraction device or image processing device described above.