JPH0343733U - - Google Patents

Info

Publication number
JPH0343733U
JPH0343733U JP1989104690U JP10469089U JPH0343733U JP H0343733 U JPH0343733 U JP H0343733U JP 1989104690 U JP1989104690 U JP 1989104690U JP 10469089 U JP10469089 U JP 10469089U JP H0343733 U JPH0343733 U JP H0343733U
Authority
JP
Japan
Prior art keywords
semiconductor element
metal substrate
bonding pad
electrode
mounting structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989104690U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989104690U priority Critical patent/JPH0343733U/ja
Publication of JPH0343733U publication Critical patent/JPH0343733U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案による半導体素子の実装構造の
一実施例を示す断面図である。第２図は従来の半
導体素子の実装構造の一例を示す断面図である。 １１……半導体素子、１２……金属基板、１３
……金属基材、１５……導電パターン、１５ａ…
…電極端子、１６……金属細線。 FIG. 1 is a sectional view showing an embodiment of a semiconductor device mounting structure according to the present invention. FIG. 2 is a cross-sectional view showing an example of a conventional semiconductor element mounting structure. 11...Semiconductor element, 12...Metal substrate, 13
...Metal base material, 15...Conductive pattern, 15a...
...Electrode terminal, 16...Metal thin wire.

補正 平２．５．２９ 図面の簡単な説明を次のように補正する。 明細書第７頁末行の「１６……金属細線」の後
に、『１４……絶縁層、１７……導電性接着剤』
を追加する。Amendment May 29, 1992 The brief description of the drawing is amended as follows. At the end of page 7 of the specification, after "16...metal thin wire", "14...insulating layer, 17...conductive adhesive"
Add.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 金属基板の金属基材を露出させて設けたボンデ
イングパツドと、該ボンデイングパツド上にダイ
ボンデイングされた半導体素子と、上記金属基板
上に形成された所定の回路パターンでなる電極と
を具備しており、該電極と半導体素子とがワイヤ
ボンデイングまたはタブにより電気的に接続され
ていることを特徴とする半導体素子の実装構造。 A bonding pad provided with a metal base material of a metal substrate exposed, a semiconductor element die-bonded on the bonding pad, and an electrode formed on the metal substrate in a predetermined circuit pattern. 1. A mounting structure for a semiconductor element, wherein the electrode and the semiconductor element are electrically connected by wire bonding or a tab.
JP1989104690U 1989-09-06 1989-09-06 Pending JPH0343733U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989104690U JPH0343733U (en) 1989-09-06 1989-09-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989104690U JPH0343733U (en) 1989-09-06 1989-09-06

Publications (1)

Publication Number Publication Date
JPH0343733U true JPH0343733U (en) 1991-04-24

Family

ID=31653477

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989104690U Pending JPH0343733U (en) 1989-09-06 1989-09-06

Country Status (1)

Country Link
JP (1) JPH0343733U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01168045A (en) * 1987-12-23 1989-07-03 Tokuyama Soda Co Ltd Hermetically sealed circuit device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01168045A (en) * 1987-12-23 1989-07-03 Tokuyama Soda Co Ltd Hermetically sealed circuit device

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