JPH0344671U - - Google Patents
Info
- Publication number
- JPH0344671U JPH0344671U JP10477989U JP10477989U JPH0344671U JP H0344671 U JPH0344671 U JP H0344671U JP 10477989 U JP10477989 U JP 10477989U JP 10477989 U JP10477989 U JP 10477989U JP H0344671 U JPH0344671 U JP H0344671U
- Authority
- JP
- Japan
- Prior art keywords
- input data
- memory
- section
- input
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000006870 function Effects 0.000 claims 1
- 238000012544 monitoring process Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Debugging And Monitoring (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Description
第１図は本考案に係るロジツクアナライザのト
リガ回路の原理構成図、第２図は本考案の一実施
例を示す構成図、第３図は演算回路の詳細を示す
構成図、第４図は動作フローを示す図である。
１……入力部、２……メモリ制御回路、３……
メモリ、１０……演算回路部、１１……コンパレ
ータ、１２……タイミングコントローラ、１３…
…演算回路、２１……初期値レジスタ、２２……
加算データレジスタ、２３……加算器、２４……
比較データレジスタ。
Fig. 1 is a principle block diagram of the trigger circuit of a logic analyzer according to the present invention, Fig. 2 is a block diagram showing an embodiment of the present invention, Fig. 3 is a block diagram showing details of the arithmetic circuit, and Fig. 4 is a diagram showing an operation flow. 1...Input section, 2...Memory control circuit, 3...
Memory, 10... Arithmetic circuit section, 11... Comparator, 12... Timing controller, 13...
...Arithmetic circuit, 21...Initial value register, 22...
Addition data register, 23... Adder, 24...
Comparison data register.
Claims (1)
力部と、 この入力部より出力されるデータを記憶するメ
モリと、 前記入力部からの入力データを監視するための
データ変化規則に従つて入力データが変化するか
どうかを監視する演算回路部と、 前記入力部からの入力データを前記メモリに記
憶させると共に、前記演算回路部において入力デ
ータが所定の変化規則に従つて変化しなかつたこ
とを検出したときには、その時点から所定数だけ
入力データを前記メモリに記憶させ、それ以降は
記憶を中止させる機能を有するメモリ制御回路を
具備し、入力データが所定の変化規則に従つて変
化しなかつた場合のタイミングをトリガ条件とし
て入力データを前記メモリに記憶するようにした
ことを特徴とするロジツクアナライザのトリガ回
路。[Claims for Utility Model Registration] An input section for converting input data into digital values of 0 and 1, a memory for storing data output from the input section, and a memory for monitoring input data from the input section. an arithmetic circuit section that monitors whether input data changes according to a data change rule; and an arithmetic circuit section that stores input data from the input section in the memory, and that input data in the arithmetic circuit section that monitors whether input data changes according to a predetermined change rule. A memory control circuit is provided which has a function to store a predetermined number of input data in the memory from that point on when it is detected that the input data has not changed, and to stop storing the input data thereafter. A trigger circuit for a logic analyzer, characterized in that input data is stored in the memory using a timing when the input data does not change according to the trigger condition as a trigger condition.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10477989U JPH0344671U (en) | 1989-09-06 | 1989-09-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10477989U JPH0344671U (en) | 1989-09-06 | 1989-09-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0344671U true JPH0344671U (en) | 1991-04-25 |
Family
ID=31653561
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10477989U Pending JPH0344671U (en) | 1989-09-06 | 1989-09-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0344671U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61281342A (en) * | 1985-06-07 | 1986-12-11 | Hitachi Ltd | Program runaway prevention device |
-
1989
- 1989-09-06 JP JP10477989U patent/JPH0344671U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61281342A (en) * | 1985-06-07 | 1986-12-11 | Hitachi Ltd | Program runaway prevention device |
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