JPH0346883A - video image processing equipment - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video image processing device used in an X-ray image processing display device or the like.

[Prior Art] Conventionally, in this type of video image processing device, as shown in FIG. converter 24
After converting the signal into an analog signal again, the processed image is displayed on the display monitor 25.

[Problem to be solved by the invention] Conventional image processing devices sequentially convert one analog video signal one dot at a time using one AD converter, so in applications that require high speed, it is necessary to reduce the number of bits of AD conversion. Methods include using a high-speed one or using a very expensive AD converter. However, in recent years, with the advent of high-definition televisions such as high-definition, the conversion rate of video signals has rapidly become faster, so the development of AD converters with large quantization bit numbers and high conversion rates has not been able to keep up. This is the current situation.

The present invention was devised to eliminate the drawbacks of the prior art as described above, and to achieve a high conversion rate without the need for an expensive AD converter and to eliminate artifacts (such as vertical stripes). It is an object of the present invention to provide a video image processing device that does not generate.

[Means for Solving the Problems] In order to achieve the above object, the video image processing device of the present invention time-division multiplexes a plurality of inexpensive AD converters with a large number of quantization bits and a relatively slow conversion rate. Analog video signals are converted to digital signals by operating them in parallel using a clock.

In addition, when multiple AD converters have different characteristics, artifacts (such as vertical stripes) are noticeable, but by switching the clocks given to multiple AD converters for each frame of the video signal, artifacts can be eliminated. In practice, it is kept out of sight.

[Operation] In the video image processing device configured as described above, an analog video signal is alternately AD-converted by a plurality of AD converters, and outputted as continuous image data by a parallel-serial converter.

[Example] An example will be described with reference to the drawings. In FIG. 1, an analog video signal from a television camera is input in parallel to two AD converters 1.2, and these two AD converters 1.
The D converter 1.2 performs digital conversion using conversion clocks (ADCICK, ADC2-CK) having mutually different phases from the clock generator 3 synchronized with the video signal. Then, the outputs of the two AD converters 1.2 are input to the digital processing circuit by the parallel-serial converter 4 as one continuous image data. It is also possible to directly input the outputs of the two AD converters to a digital processing circuit to perform parallel processing. Furthermore, A
The number of D converters is not limited to two, but can also be three or more.

By the way, if there is a difference in the characteristics of the two AD converters, artifacts (such as vertical stripes) will occur, making the processing screen difficult to see. To solve this problem, in the embodiment shown in FIG. 2, the switching circuit 15 is driven for each frame of the video signal to switch between two converted clocks generated by the clock generator 13 and having a phase difference. The timing at this time is as shown in FIGS. 3(a) and 3(b). Now, let's focus on one frame with progressive scan (sequential scanning), consider this to be an even frame, and consider that the next frame is an odd frame, and the next frame is alternately repeated with an even frame.

At this time, in even frames, AD
Starting from converter 1, the conversion clocks (ADC1-CK, AD
C2-CK) are given, and these data are output as one continuous image data by parallel-to-serial conversion.

Also, in odd-numbered frames, the conversion clocks given to AD converters 1 and 2 are switched as shown in FIG. 3(b), so that in even-numbered frames No. be done.

As a result, artifacts due to differences in characteristics of AD converters are practically invisible, and since processes such as integration and recursive are actually performed in the subsequent processing circuit, correction of differences in characteristics of AD converters can be almost completely performed. It can be done.

[Effect of the Invention 1] Since the present invention is configured as described above, it is possible to convert a video analog signal to a digital signal at a conversion rate twice as high as the maximum conversion rate of each AD converter. Further, by using three or more AD converters, a higher conversion rate can be achieved.

Furthermore, generation of artifacts can be prevented by replacing the conversion clocks of the plurality of AD converters for each frame of the video signal.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a video image processing device according to the present invention, FIG. 2 is a block diagram showing another embodiment of the present invention, and FIG. 3 is a waveform diagram showing the operation of the embodiment of FIG. FIG. 4 is a block diagram showing a conventional video image processing device. 1.2.11.12...AD converter, 3.
13... Clock generator, 4.14...
...Parallel-serial converter, 15...Switching circuit, 21...Video camera, 22...
...AD converter, 23...Digital processing circuit, 24...DA converter, 25...
...Display monitor Go 10 Figure 2

Claims (2)

[Claims] (1) A video image processing device that digitizes and processes an analog video signal using an AD converter, which includes a plurality of AD converters, a clock generator that generates multiple clock signals having a phase difference, and a plurality of A
A video image processing device characterized in that a D converter is driven in a time-division manner using multiple clock signals, and the outputs of a plurality of AD converters are processed. (2) The video image processing device according to claim 1, wherein the clock supplied to the AD converter is periodically changed for each frame of the video signal.