JPH0346936B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a relay drive circuit for a detector used as an output circuit for a security detector or the like.

[Background technology]

FIG. 1 is a circuit diagram of a conventional relay drive circuit for a detector. In the figure, reference numeral 1 denotes an output circuit section, which inputs the detection output of a security detector or the like, and outputs an H level during an abnormality detection operation, and maintains the output at an L level during a warning operation. Relay Ry
is connected between the power supply line Vcc and the output end of the output circuit section 1. A diode D for absorbing back electromotive force is connected in parallel to both ends of the relay Ry.
The normally open contact NO and common contact C of relay Ry are connected to output terminals T ₁ and T ₂ . FIGS. 2a to 2c are explanatory diagrams of the operation of the circuit of FIG. 1. Figure 2a is the power supply voltage Vcc, Figure 2b is the output A of the output circuit section 1, Figure 2c is
indicate the on/off state between the output terminals T ₁ and T ₂ , respectively. As shown in FIG. 5B, during the warning operation, the output A of the output circuit section 1 is always maintained at the L level, and the relay Ry is maintained in the excited state.
Therefore, during warning operation, the normally open contact of relay Ry is NO.
and common contact C are closed, and output terminals T ₁ and T ₂
The time is on. On the other hand, when a security detector or the like operates and its abnormality detection output is input to the output circuit section 1, the output circuit section 1, which has a built-in timer IC, outputs an H level as shown in Figure 2b. This occurs only for a certain period of time, and as a result, the normally open contact NO and the common contact C of relay Ry are opened.
The output terminals T ₁ and T ₂ are turned off. Output terminal T ₁ ,
An abnormality notification device such as a warning buzzer is connected between _T2 , and when the output terminals _T1 and _T2 are turned off, the abnormality notification device is activated. However, in such conventional examples,
In order to output a pulse with a predetermined time duration to drive the relay Ry, it is necessary to incorporate a timer IC into the output circuit section 1, which inevitably increases the cost.

[Purpose of the invention]

The present invention was made to solve the above-mentioned problems, and provides a detection relay that can obtain pulses of a predetermined duration for driving the relay without using a special timer IC or the like. The purpose of this invention is to provide a drive circuit.

[Disclosure of the invention]

The configuration of the present invention will be described above with reference to the illustrated embodiments. FIG. 3 shows a circuit diagram of one embodiment of the present invention. In the figure, _I1 is an input terminal to which the detection output of a security detector or the like is input.
A differentiating circuit 3 consisting of a capacitor C ₁ and a resistor R ₁ is connected to the input terminal I ₁ . The output of this differentiating circuit 3 is connected via a diode D ₁ to a voltage dividing circuit made up of resistors R ₂ and R ₃ . The power supply voltage Vcc is divided by a voltage dividing circuit including resistors _R2 and _R3 , and the divided voltage output is applied to the negative input terminal of the comparator _P1 . In addition, a resistor R ₄ and a diode D ₃ are connected to the positive input terminal of the comparator P ₁ .
The voltage divided by the series circuit with D ₄ is applied to the resistor.
Applied via _R5 . The resistor _R6 is a positive feedback resistor, and forms the latch circuit 4 by positively feeding back a part of the output voltage of the comparator _P1 to the positive input terminal of the comparator _P1 . The positive input terminal of the comparator _P1 is connected to the midpoint of a voltage dividing circuit made up of a resistor _R10 and a resistor _R11 via a diode _D5 , thereby forming a reset circuit 5. The divided voltage output of the voltage dividing circuit made up of the resistor R ₁₀ and the resistor R ₁₁ is applied as a reference voltage to the gate of PUT2. The cathode of PUT2 is grounded, and the charging voltage of capacitor _C2 is applied to the anode of PUT2 via resistor _R8 . Capacitor C ₂ is connected through variable resistor R ₇ ,
It is designed to be charged by the output voltage of comparator _P1 . The output terminal of comparator _P1 is
It is connected to the power supply line Vcc through a series circuit of resistor R ₉ , diodes D ₇ and D ₆ , and resistor R ₁₂ . When the output voltage of comparator P ₁ is at H level, no current flows through diodes D ₆ and D ₇ and no voltage drop occurs in resistor R ₁₂ , but when the output voltage of comparator P ₁ is at L level, ,
Current flows through diodes D ₆ and D ₇ and the resistance
A voltage drop occurs across _R12 . Therefore, in this case, transistor Tr ₁ is turned on, current flows through diode D ₈ , relay Ry, and capacitor C ₃ , and the contacts of relay Ry are reversed. relay
Ry is a single-winding latching type relay, and the switching direction of the contacts is reversed depending on the direction of current flow.
The contacts are adapted to be held stably in each switching position. The current flowing through relay Ry stops when capacitor _C3 is fully charged. Next, when transistor Trz ₁ turns off, the charge in capacitor C ₃ is discharged through the emitter, base, and resistor R ₁₃ of transistor Tr ₂ , and transistor Tr ₂
turns on, the charge in capacitor _C3 is rapidly discharged through relay Ry and transistor _Tr2 , and the contacts of relay Ry return to their original state. Note that while transistor Tr ₁ is on, the diode
Since the base and emitter of the transistor Tr ₂ is reverse biased by the forward voltage of D ₈ , the transistor Tr ₂ is not turned on.

4a to 4f are explanatory diagrams of the operation of the embodiment of FIG. 3. Figure a shows changes in the power supply voltage Vcc.
In addition, figure b shows the divided voltage output at point a in the diagram of the voltage dividing circuit consisting of resistor R ₂ and resistor R ₃ .
When there is no signal input from the input terminal _I1 , the voltage changes by dividing the power supply voltage Vcc. Further, c in the figure shows the divided voltage output at point b in the figure of the voltage dividing circuit consisting of resistor R ₄ and diodes D ₃ and D ₄ . As shown in the figure, the divided voltage output at point b increases rapidly until it reaches the forward drop voltage of the diodes D ₃ and D ₄ , and then remains at a constant level. On the other hand, the voltage rise of the divided voltage output at point a is gradual, but the final voltage reached is higher than the divided voltage output at point b. Therefore, the output of the comparator _P1 is at H level at first, and becomes L level when the divided voltage output at point a becomes higher than the divided voltage output at point b. While the output of comparator P ₁ is at H level, transistor Tr ₁ is off, but the comparator
When the output of P ₁ becomes L level, the transistor Tr ₁
is turned on, and its collector potential becomes H level as shown in FIG. 4e. At the moment when transistor Tr ₁ turns on, diode D ₈ , relay Ry,
Current flows through capacitor _C3 , switching contact r. When capacitor _C3 is fully charged,
The current flowing through relay Ry automatically stops, but
Relay Ry is a latching type relay, so
There is no need to run a holding current like in the conventional case,
During the warning operation, no unnecessary current consumption flows.

FIG. 4d shows the voltage level at input terminal _I1 . As shown in the figure, the voltage level of the input terminal _I1 increases as the divided voltage output at point a increases. At the timing shown at _t1 in Figure 4d, when an L level signal is input to the input terminal _I1 , a falling pulse is inputted via the differentiating circuit 3 consisting of a capacitor _C1 and a resistor _R1 . , the partial pressure output at point a in FIG. 3 is lower than the partial pressure output at point b, as shown in FIG. 4b. Therefore, the output of comparator _P1 becomes H level,
Transistor Tr ₁ is turned off. Transistor Tr ₁
is turned off, the charge on capacitor _C3 is transferred to the relay
Ry, and is discharged through transistor Tr ₂ ,
This is to reverse the contact point r. transistor
The off-time of Tr ₁ is set by a timer circuit including PUT 2, capacitor C ₂ , and variable resistor R ₇ , and at time t ₂ after the predetermined off-time has elapsed, transistor Tr ₁ is turned off. It is set to return to the on state.

FIGS. 5a to 5g are waveform diagrams for explaining the operation of the timer circuit including PUT2, capacitor _C2 , and variable resistor _R7 . First, Figure 5a shows the change in input voltage, and Figure 5b shows the change in the input voltage.
It shows the voltage change at the connection point between C ₁ and resistor R ₁ .
As shown in the above figures, the input pulse voltage consisting of a falling pulse in the form of a rectangular wave is applied to the capacitor C ₁
A voltage waveform is differentiated by a differentiating circuit 3 consisting of a resistor R ₁ and a diode D _{1 .}
is input to the negative input terminal of comparator _P1 via. Figure 5c shows this comparator P ₁
It shows the voltage waveform applied to the negative input terminal of . As the voltage waveform applied to the negative input terminal of comparator P ₁ becomes L level in this way, the output voltage of comparator P ₁ becomes H level as shown in Figure 5e, and the positive feedback The voltage level at the positive input terminal of the comparator _P1 becomes high as shown in FIG. 5d through the resistor _R6 , and eventually the output of the comparator _P1 is latched at the H level. Thus the comparator
When the output of P ₁ becomes H level, capacitor C ₂ is gradually charged via variable resistor R ₇ as shown in FIG. 5f. When the charging voltage of capacitor C ₂ reaches the reference voltage V _L obtained by voltage dividing resistor R ₁₀ and resistor R ₁₁ , conduction occurs between the anode and cathode of PUT 2, and the charging voltage of capacitor C ₂ reaches the fifth voltage.
It decreases steeply as shown in Figure f. Also PUT2
While it is on, its gate potential is as shown in Figure 5g.
As shown in the figure, it becomes L level, so the comparator
The voltage at the positive input terminal of _P1 becomes L level via diode _D5 as shown in FIG. 5d. At this time, the voltage applied to the negative input terminal of comparator _P1 has returned to the original high voltage as shown in Figure 5c, so the output voltage of comparator _P1 is as shown in Figure 5e. The signal returns to the L level. Therefore, the comparator
At the output terminal of P ₁ there is a capacitor C ₂ and a variable resistor R ₇
An output pulse of a predetermined width determined by the time constant of is obtained. When changing the pulse width of this output pulse, it is sufficient to change the resistance value of the variable resistor _R7 .

[Effects of the Invention] The present invention is configured as described above, and the pulse signal from the detector is input, the differential circuit generated when the input signal changes, and the differential output from the differential circuit are input. a latch circuit that inverts the output and holds that state until it is reset;
A capacitor that is charged via a variable resistor by the inverted output of the latch circuit, a thyristor that conducts when the voltage of the capacitor reaches a predetermined voltage and discharges the charge in the capacitor, and a latch that is activated when the thyristor conducts. Since it has a reset circuit that releases the holding operation of the circuit and a relay that is driven by the output of the latch circuit, it requires a special timer.
It is possible to obtain a pulse of a predetermined time width for driving a relay without using an IC, and it has the effect of being able to be constructed at a relatively low cost, and the capacitor that determines the pulse width is connected via a variable resistor. Since it is charged, the pulse width can be freely set by changing the resistance value of the variable resistor. Furthermore, by passing the input signal from the detector through a differentiating circuit, changes in the input signal can be reliably detected, and the occurrence of a change in the input signal is memorized by a latch circuit, and the time limit ends. Since the latch circuit is later reset by the reset circuit, there is an advantage that even if the output of a detector such as a security detector is unstable, the time limit does not change and accurate one-shot operation is performed. In addition, the combined invention not only has the effect of being able to obtain a pulse of a predetermined duration for driving a relay without using a special timer IC, as in the case of the specific invention, but also: a series circuit of a one-winding latching type relay and a relay driving capacitor, a first transistor that is driven on and off by the output of the latching circuit and applies a DC power supply voltage to the series circuit when on; a diode connected in series in the forward direction between the series circuit;
Connected between both ends of the series circuit, when the first transistor is on, it is reverse biased and turned off by the forward voltage drop of the diode, and when the first transistor is off, it is forward biased and turned on, and the relay driving capacitor and a second transistor that discharges the charged charge, so when the first transistor is on, current flows in a specific direction through the single-winding latching type relay only until the relay driving capacitor is charged. , when the first transistor is off, current flows in the opposite direction to the single-winding latching type relay until the relay driving capacitor is discharged, and the contacts are switched; Since no current flows through the relay, there is no unnecessary current consumption, which also has the effect of reducing current consumption.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of the conventional example, FIG. 2 is an explanatory diagram of the same operation as above, FIG. 3 is a circuit diagram of an embodiment of the present invention, and FIGS. 4 and 5 are explanatory diagrams of the same operation. Ry is a relay, Tr ₁ , Tr ₂ are transistors, C ₁ ,
C ₂ and C ₃ are capacitors, R ₇ is a variable resistor, 2 is
PUT, 3 is a differential circuit, 4 is a latch circuit, and 5 is a reset circuit.

Claims (1)

[Scope of Claims] 1. A differentiating circuit that receives a pulse signal from a detector and generates an output when the input signal changes; and a differential output from the differentiating circuit that receives as input, and the output is inverted and reset when the signal is input. a latch circuit that maintains the state until
A thyristor that conducts when the capacitor voltage reaches a predetermined voltage to discharge the charge in the capacitor, a reset circuit that releases the holding operation of the latch circuit when the thyristor conducts, and a relay that is driven by the output of the latch circuit. A relay drive circuit for a detector, comprising: 2 A differentiating circuit that takes the pulse signal from the detector as input and generates an output when the input signal changes, and the differential output from the differentiator circuit takes the input as input, and the output is inverted when the signal is input and maintains that state until it is reset. a latch circuit, a capacitor charged via a resistor by the inverted output of the latch circuit, and a thyristor that becomes conductive to discharge the charge in the capacitor when the voltage of the capacitor reaches a predetermined voltage.
a reset circuit that releases the holding operation of the latching circuit when the thyristor is conductive; a series circuit of a single-winding latching type relay and a relay driving capacitor;
The first circuit is driven on and off by the output of the latch circuit, and applies a DC power supply voltage to the series circuit when turned on.
a diode connected in series in the forward direction between the first transistor and the series circuit, and a diode connected between both ends of the series circuit, and when the first transistor is turned on, the diode has a forward voltage drop of the diode. and a second transistor that is reverse biased and turned off, and forward biased and turned on when the first transistor is off, discharging the charge of the relay driving capacitor. Relay drive circuit.