JPH0347607B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to comparator circuits.

The input voltage range in which a comparator composed of a differential amplifier operates is as follows: If the positive side of the applied voltage power supply is V _CC and the negative side is V _EE , then if the input section of the comparator is composed of a PNP transistor. , (V _EE +0.2) _V ~ (V _CC
−0.8) _V , and if the input section is composed of NPN transistors (V _EE +0.8) _V ~ (V _CC −
0.2) It was about _V. Therefore, when designing an actual circuit, you can choose whether to use a PNP transistor or an NPN transistor depending on whether you want it to operate on the V _EE side or the V _CC side, depending on the application. It was configured.

If accuracy is required only on either the V _EE side or the V _CC side, by selecting the transistor type and designing the circuit as described above,
A comparator circuit is obtained which can achieve the intended purpose.

For example, the control circuit for an electronic shutter for a camera cannot handle a wide range of incident light levels, from dim conditions with very little incident light to bright conditions with sufficient light intensity, even if measures such as logarithmic compression are applied. It is necessary to form electrical signals, and circuits with a wide dynamic range are required.

However, in a comparator that uses a transistor that exhibits conductivity type of either PNP or NPN transistor in the input section, the voltage on either the V _EE side or the V _CC side of the power supply voltage is sufficiently satisfied. Even if it were possible to operate with the highest possible accuracy, if the voltage approached the other voltage, the operation would be hindered, posing a practical problem.

The present invention has been made in view of the problems of the conventional circuits described above, and it is an object of the present invention to provide a comparator circuit that can operate over a wide input voltage range by taking advantage of the respective characteristics of PNP transistors and NPN transistors. Next, the present invention will be explained in detail with reference to Examples.

The figure is an electrical circuit diagram showing one embodiment, where the positive side V _CC ,
A power supply voltage for negative side V _EE is applied, an input signal to be compared is applied between the non-inverting input terminal and the inverting terminal, and the comparison result is derived from the output terminal.

The non-inverting terminal and the inverting terminal are connected to a first differential amplifier 1 having an NPN transistor in its input section and a second differential amplifier 2 having a PNP transistor in its input section, respectively, so that a given input A signal is commonly supplied to first and second differential amplifiers 1 and 2.

First, the first differential amplifier 1 is provided with an NPN transistor Q ₁ whose base is provided with a non-inverting input, and an NPN transistor Q ₃ whose base is provided with an inverting input, and the transistor Q ₁ is provided with a PNP transistor Q _{2 .}
However, a PNP transistor _Q4 is connected to the transistor _Q3 . The transistor Q ₂ and the PNP transistor Q ₅ constitute a current mirror circuit, and the transistor Q ₅ changes the direction of the collector current of the transistor Q ₁ due to the non-inverting input. The emitters of both the NPN transistors Q ₁ and Q ₃ are commonly connected to the collector of the NPN transistor Q ₆ . Transistor Q ₆
A current mirror circuit is formed with the NPN transistor _Q7 , and the base collector of the transistor _Q7 is connected to the positive power supply _VCC via the resistor _R1 .

PNP transistor Q ₂ of the first differential amplifier 1
The output current derived from the output current is passed through a transistor _Q5 to be in phase, and then passed through a second differential amplifier 2, which will be described later.
Similarly, the PNP of the first differential amplifier 1
The output current derived into transistor _Q4 is PNP
After passing through the transistor _Q13 , it is added to the other side of the second differential amplifier 2.

Next, the second differential amplifier 2 has a non-inverting input that is PNP.
At the base of transistor _Q11 , an inverting input is provided at the base of PNP transistor _Q9 . The collector of the above transistor Q ₉ is the above transistor
It is connected to the collector of _Q5 , the collector and base of NPN transistor _Q8 , and further connected to the base of NPN transistor _Q12 . The collector of the transistor Q ₁₁ is connected to the collector of the transistor Q ₁₃ , and the collector of the transistor Q ₁₂ and the NPN transistor
Connected to the base of Q ₁₅ . The emitters of the PNP transistor Q ₉ and the PNP transistor Q ₁₁ are connected in common and connected to the positive power supply V _CC via the PNP transistor 10 . transistor
Q ₁₀ is a PNP transistor Q ₁₄ is an NPN transistor
_Q16 constitutes a current mirror circuit, the collector of the transistor _Q14 is connected to the collector of the transistor _Q15 , and the output is taken out from this connection point. Note that the collector of the transistor _Q16 is connected to the negative power supply _VEE via a bias resistor _R2 .

The operation of the comparator circuit having the above configuration will be explained.

First, the input voltage is closer to the negative power supply V _EE (V _EE +0.2).
_V ~ (V _EE +0.8) At around _V , the NPN transistor Q ₁
and Q ₃ are in the off state, and transistors Q ₈ , Q ₉ ,
It operates as a PNP transistor input type comparator consisting only of Q ₁₀ , Q ₁₁ , Q ₁₂ , Q ₁₄ , Q ₁₅ and Q ₁₆ and resistor R ₂ and forms an output signal corresponding to the input signal.

On the other hand, the input voltage is closer to the positive power supply V _CC (V _CC −0.8)
In the range of about _V ~ (V _CC -0.2) _V , PNP transistors Q ₉ and Q ₁₁ are in the off state, and at this time transistors Q ₁ , Q ₂ , Q ₃ , Q ₄ , Q ₅ , Q ₆ , Q ₇ , _Q8 ,
It operates as an NPN transistor input comparator consisting only of Q ₁₂ , Q ₁₃ , Q ₁₄ , Q ₁₅ and Q ₁₆ and resistors R ₁ and R ₂ .

Furthermore, if the input voltage falls within the above range (V _EE +
0.8) _V to (V _CC -0.8) _V , the direction of the output current of the first differential amplifier 1 is changed by the current mirror circuit, and the output current of the second differential amplifier 2 is derived from the transistor. Q ₈ and transistor Q ₁₂ are added to the collector currents, and the in-phase output currents of the differential amplifiers are added together, and the transistor
An output signal is taken from the collector of transistor Q ₁₅ by activating the output section consisting of Q ₁₀ , Q ₁₄ , Q ₁₅ and Q ₁₆ .

At this time, the transistor of the second differential amplifier 2
For Q ₉ , transistor Q ₅ is
Transistor Q ₁₃ serves as a load for Q ₁₁ .
The collector current values of the transistor Q ₅ and the transistor Q ₁₃ are controlled by the current values of the transistor Q ₂ and the transistor Q ₄ , respectively.
The outputs of opposite phases act as active loads.

As mentioned above, the circuit of the embodiment has (V _EE +0.2) _V ~
(V _CC −0.2) Forms a comparison output signal over a range of _V.

The above embodiment has been described using a circuit that adds both output currents of the first differential amplifier 1 to the second differential amplifier, respectively, but only one output current is appropriately processed by a current mirror circuit and the second differential A circuit can be configured by adding the differential amplifier to an amplifier, or a circuit can be configured by adding the output currents of the first and second differential amplifiers to each other.

The circuit of the above embodiment can operate as an operational amplifier capable of signal processing over a wide range of input voltages by, for example, inserting a capacitor between the collector and base of the transistor _Q15 at the output end for phase compensation. I can do it.

As described above, according to the present invention, it is possible to obtain a comparator circuit that can operate over a wide range by taking advantage of the operating characteristics of the PNP transistor differential amplifier and the NPN transistor differential amplifier, and in particular, it is possible to obtain a comparator circuit that can operate in a wide range, such as in a camera, etc. A large dynamic range can be obtained for the circuit used as a power source, and excellent effects can be achieved.

[Brief explanation of drawings]

The figure is a circuit diagram showing an embodiment according to the present invention. 1: NPN transistor differential amplifier, 2: PNP
Transistor differential amplifier, Q ₁ Q ₃ Q ₆ Q ₇ Q ₈ Q ₁₂ Q ₁₅ :
NPN transistor,
Q ₂ Q ₄ Q ₅ Q ₉ Q ₁₀ Q ₁₁ Q ₁₃ Q ₁₄ Q ₁₆ : PNP transistor.

Claims (1)

[Claims] 1 A first differential amplifier configured with a PNP transistor whose non-inverting terminal and an inverting terminal are supplied with a common input signal, a second differential amplifier configured with an NPN transistor, and the first and second differential amplifiers. 1. A comparator circuit comprising: a current synthesis output circuit that synthesizes output currents from amplifiers and outputs an output signal representing a comparison result of the input signals.