JPH0350186A - Intrinsic gettering method - Google Patents

Intrinsic gettering method

Info

Publication number
JPH0350186A
JPH0350186A JP18260189A JP18260189A JPH0350186A JP H0350186 A JPH0350186 A JP H0350186A JP 18260189 A JP18260189 A JP 18260189A JP 18260189 A JP18260189 A JP 18260189A JP H0350186 A JPH0350186 A JP H0350186A
Authority
JP
Japan
Prior art keywords
oxygen
epitaxial growth
wafer
heat treatment
intrinsic gettering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18260189A
Other languages
Japanese (ja)
Inventor
Jun Maeda
潤 前田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JFE Steel Corp
Original Assignee
Kawasaki Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kawasaki Steel Corp filed Critical Kawasaki Steel Corp
Priority to JP18260189A priority Critical patent/JPH0350186A/en
Publication of JPH0350186A publication Critical patent/JPH0350186A/en
Pending legal-status Critical Current

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  • Crystals, And After-Treatments Of Crystals (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)

Abstract

PURPOSE:To suppress the slip of a substrate wafer and the occurrence of lamination defects due to an intrinsic gettering method by heating the wafer to a specified temp. to form oxygen depositing nuclei before epitaxial growth. CONSTITUTION:When epitaxial growth is carried out on a substrate wafer by an intrinsic gettering method, the wafer is heat-treated at 750-900 deg.C to form oxygen depositing nuclei before epitaxial growth. Even in the case where oxygen is diffused from the wafer to an epitaxial layer during heat treatment at the time of epitaxial growth, oxygen depositing nuclei are not formed in the epitaxial layer, oxygen does not deposit in the epitaxial layer even in the succeeding device processing stage and the slip of the wafer and the occurrence of lamination defects are suppressed.

Description

【発明の詳細な説明】 〔産業上の利用分野] 本発明は、エピタキシャルウェハのイントリンジック・
ゲッタリング方法に関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention is directed to the intrinsic
Regarding gettering methods.

〔従来の技術〕[Conventional technology]

イントリンジック・ゲッタリングはシリコン基板内に溶
解している酸素を部分的に析出させ、その周囲に発生す
るひずみ場によって表面近傍に存在する重金属汚染を吸
収してしまう方法である。
Intrinsic gettering is a method in which oxygen dissolved in a silicon substrate is partially precipitated, and heavy metal contamination present near the surface is absorbed by the strain field generated around the precipitate.

従来エピタキシャルウェハのイントリンジック・ゲッタ
リング処理は第2図に工程図を示すように、エピタキシ
ャル成長の後にデニューデッド・ゾーン形成熱処理(約
1100℃で約2時間)及び酸素析出核形成熱処理(約
800℃で約10時間)を行っていた。
Conventional intrinsic gettering treatment for epitaxial wafers, as shown in the process diagram in Figure 2, involves epitaxial growth followed by denuded zone formation heat treatment (approximately 1100°C for approximately 2 hours) and oxygen precipitation nucleation heat treatment (approximately 2 hours). (at 800°C for about 10 hours).

第3図はこのような酸素析出核形成処理時間と格子間酸
素減少量Δoi (ppm)との関係を示すものである
。酸素減少量ΔOi (ppm)はASTMF121−
79に示されているFTIR(赤外吸収量)による測定
値である。
FIG. 3 shows the relationship between the oxygen precipitation nucleation treatment time and the interstitial oxygen reduction amount Δoi (ppm). The amount of oxygen reduction ΔOi (ppm) is determined by ASTM F121-
This is a measurement value by FTIR (infrared absorption) shown in No. 79.

以上のように、従来の方法ではエピタキシャル成長後に
イントリンジック・ゲッタリングのために約12時間も
の熱処理を行っており、これにより、エピタキシャルウ
ェハにスリップや積層欠陥が多く発生していた。
As described above, in the conventional method, heat treatment is performed for about 12 hours for intrinsic gettering after epitaxial growth, and as a result, many slips and stacking faults occur in the epitaxial wafer.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

エピタキシャル層はその中に含まれる酸素濃度が1xl
o15/cm3程度と小さい、しかし従来エピタキシャ
ル成長工程の後に長時間の熱処理を行うため、このとき
サブストレートウェハから酸素が拡散によって浸入し欠
陥が生ずる。このようなサブストレートウェハからの酸
素拡散がなげれば酸素の析出が生じることはない。
The epitaxial layer has an oxygen concentration of 1xl.
Although the size is small, on the order of 015/cm3, since a long time heat treatment is conventionally performed after the epitaxial growth process, oxygen infiltrates from the substrate wafer by diffusion and causes defects. If such oxygen diffusion from the substrate wafer is suppressed, oxygen precipitation will not occur.

本発明はエピタキシャルウェハにスリップや積層欠陥を
生ずるような熱処理を行わない方法を提供することを目
的とする。
An object of the present invention is to provide a method that does not perform heat treatment on epitaxial wafers that would cause slips or stacking faults.

〔課題を解決するための手段] 本発明は、デニューデッド・ゾーン形成のための110
0℃付近での熱処理に代り、エピタキシャル成長の前に
750〜900℃での熱処理を行い、酸素析出核を形成
することを特徴とするイントリンジック・ゲッタリング
方法である。
[Means for Solving the Problems] The present invention provides 110 points for forming a denuded zone.
This is an intrinsic gettering method characterized by performing heat treatment at 750 to 900°C before epitaxial growth to form oxygen precipitation nuclei instead of heat treatment at around 0°C.

〔作用1 本発明はデニューデッド・ゾーン形成熱処理を省略する
と共に、酸素析出核形成処理をエピタキシャル成長前に
実施することにより構成される。
[Operation 1] The present invention is constructed by omitting the denuded zone formation heat treatment and performing the oxygen precipitation nucleation treatment before epitaxial growth.

第1図はこれを示すものである。エピタキシャル成長前
に予め酸素析出核形成熱処理を行っておけば、エピタキ
シャル成長時の熱処理中にエピタキシャル層にサブスト
レートウェハから酸素の拡散があっても、エピタキシャ
ル層内には酸素析出核が形成されることはなく、後のデ
バイス工程においてもエピタキシャル層内には酸素の析
出は生じることはない。
FIG. 1 shows this. If oxygen precipitate nucleation heat treatment is performed before epitaxial growth, even if oxygen diffuses into the epitaxial layer from the substrate wafer during the heat treatment during epitaxial growth, oxygen precipitate nuclei will not be formed in the epitaxial layer. Therefore, no oxygen is precipitated in the epitaxial layer even in the subsequent device process.

本発明では酸素析出核形成はエピタキシャル成長工程の
前に予め行い、エピタキシャル成長工程の後のデニュー
デッド・ゾーン形成熱処理を省略する。第4図は本発明
のエピタキシャル成長工程前の酸素析出核形成熱処理に
よるΔO1を示すもので、第4図に示すように約4時間
でその効果が現われる。また、第5図に示すように本発
明の酸素析出核形成熱処理は750〜900℃で効果が
大きく、750℃未満900℃を越える区域では効果が
少ないので、この温度範囲に限定する。
In the present invention, oxygen precipitation nuclei are formed in advance before the epitaxial growth process, and the denuded zone formation heat treatment after the epitaxial growth process is omitted. FIG. 4 shows ΔO1 due to the oxygen precipitation nucleation heat treatment before the epitaxial growth process of the present invention, and as shown in FIG. 4, the effect appears in about 4 hours. Further, as shown in FIG. 5, the oxygen precipitation nucleation heat treatment of the present invention is most effective at temperatures of 750 to 900°C, and is less effective in the region below 750°C and above 900°C, so it is limited to this temperature range.

〔実施例1 本発明を実施した例を第1図に示す、これによって熱処
理の時間がエピタキシャル成長を含めて5時間に短縮さ
れる。第2図は従来の高品質のデバイスを得るための従
来の工程である。熱処理時間は12時間に及ぶ。
[Example 1] An example in which the present invention was implemented is shown in FIG. 1. As a result, the heat treatment time including epitaxial growth was shortened to 5 hours. FIG. 2 is a conventional process for obtaining conventional high quality devices. The heat treatment time was 12 hours.

実施例と従来法による比較例の製品の欠陥を第1表に示
した。第1表に見られるように、スリップと積層欠陥は
従来例よりも減少している。
Table 1 shows defects in the products of Examples and Comparative Examples made by the conventional method. As seen in Table 1, slip and stacking faults are reduced compared to the conventional example.

第  1  表 E発明の効果j 本発明は全体の熱処理時間が短縮することによりイント
リンジック・ゲッタリングを施したエピタキシャルウェ
ハのスリップと積層欠陥を減少させる効果を奏する。
Table 1 E Effects of the Invention j The present invention has the effect of reducing slip and stacking faults in epitaxial wafers subjected to intrinsic gettering by shortening the overall heat treatment time.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例の工程図、第2図は従来の工程
図、第3図は従来の酸素核形成熱処理のグラフ、第4図
は実施例の酸素核形成熱処理のグラフ、第5図は酸素核
形成熱処理温度の適正範囲を示すグラフである。 1・・−サブストレートウェハ 2・・・酸素析出核形成熱処理 3・・・エピタキシャル成長 4・・・デバイス工程 11・・・従来のデニューデッド・ゾーン形成熱処理
Fig. 1 is a process diagram of an embodiment of the present invention, Fig. 2 is a conventional process diagram, Fig. 3 is a graph of conventional oxygen nucleation heat treatment, Fig. 4 is a graph of oxygen nucleation heat treatment of the embodiment, FIG. 5 is a graph showing the appropriate range of oxygen nucleation heat treatment temperature. 1...-Substrate wafer 2... Oxygen precipitation nucleation heat treatment 3... Epitaxial growth 4... Device process 11... Conventional denuded zone formation heat treatment

Claims (1)

【特許請求の範囲】[Claims] 1、エピタキシャル成長の前に750〜900℃での熱
処理を行い、酸素析出核を形成することを特徴とするイ
ントリンジック・ゲッタリング方法。
1. An intrinsic gettering method characterized by performing heat treatment at 750 to 900° C. before epitaxial growth to form oxygen precipitation nuclei.
JP18260189A 1989-07-17 1989-07-17 Intrinsic gettering method Pending JPH0350186A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18260189A JPH0350186A (en) 1989-07-17 1989-07-17 Intrinsic gettering method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18260189A JPH0350186A (en) 1989-07-17 1989-07-17 Intrinsic gettering method

Publications (1)

Publication Number Publication Date
JPH0350186A true JPH0350186A (en) 1991-03-04

Family

ID=16121141

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18260189A Pending JPH0350186A (en) 1989-07-17 1989-07-17 Intrinsic gettering method

Country Status (1)

Country Link
JP (1) JPH0350186A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10229093A (en) * 1997-02-17 1998-08-25 Sumitomo Sitix Corp Method for manufacturing silicon epitaxial wafer
JP2002076006A (en) * 2000-08-31 2002-03-15 Mitsubishi Materials Silicon Corp Method of manufacturing epitaxial wafer and epitaxial wafer manufactured by the method
US6641888B2 (en) 1999-03-26 2003-11-04 Sumitomo Mitsubishi Silicon Corporation Silicon single crystal, silicon wafer, and epitaxial wafer.
US6878451B2 (en) 1999-07-28 2005-04-12 Sumitomo Mitsubishi Silicon Corporation Silicon single crystal, silicon wafer, and epitaxial wafer
EP0954018A4 (en) * 1996-12-03 2006-07-19 Sumitomo Mitsubishi Silicon PROCESS FOR PRODUCING A SILICON SEMICONDUCTOR EPITAXY WAFER AND A SEMICONDUCTOR DEVICE
JP2006332689A (en) * 2006-07-10 2006-12-07 Sumco Corp Method of manufacturing silicon epitaxial wafer

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0954018A4 (en) * 1996-12-03 2006-07-19 Sumitomo Mitsubishi Silicon PROCESS FOR PRODUCING A SILICON SEMICONDUCTOR EPITAXY WAFER AND A SEMICONDUCTOR DEVICE
JPH10229093A (en) * 1997-02-17 1998-08-25 Sumitomo Sitix Corp Method for manufacturing silicon epitaxial wafer
US6641888B2 (en) 1999-03-26 2003-11-04 Sumitomo Mitsubishi Silicon Corporation Silicon single crystal, silicon wafer, and epitaxial wafer.
US6878451B2 (en) 1999-07-28 2005-04-12 Sumitomo Mitsubishi Silicon Corporation Silicon single crystal, silicon wafer, and epitaxial wafer
JP2002076006A (en) * 2000-08-31 2002-03-15 Mitsubishi Materials Silicon Corp Method of manufacturing epitaxial wafer and epitaxial wafer manufactured by the method
JP2006332689A (en) * 2006-07-10 2006-12-07 Sumco Corp Method of manufacturing silicon epitaxial wafer

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