JPH0353672A - Signal discriminator - Google Patents
Signal discriminatorInfo
- Publication number
- JPH0353672A JPH0353672A JP1187533A JP18753389A JPH0353672A JP H0353672 A JPH0353672 A JP H0353672A JP 1187533 A JP1187533 A JP 1187533A JP 18753389 A JP18753389 A JP 18753389A JP H0353672 A JPH0353672 A JP H0353672A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- synchronization
- sawtooth wave
- wave signal
- synchronization signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Synchronizing For Television (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は,同期的に入力する同期信号において、同期信
号に含まれてくる雑音による誤動作を抑圧するために、
同期信号の周期性を利用して信号と雑音を判別し、同期
信号だけを検出しようとする信号判別器に関する。Detailed Description of the Invention (Industrial Field of Application) The present invention provides a method for suppressing malfunctions caused by noise contained in a synchronizing signal that is input synchronously.
The present invention relates to a signal discriminator that uses the periodicity of a synchronization signal to distinguish between a signal and noise and detects only a synchronization signal.
(従来の技術)
第4図は従来の信号判別回路を示すものである.iJ4
図において、1は同期信号入力端子、7,8は互いに極
性の異なる検出出力、9.10はエミッタ結合したトラ
ンジスタ、11は電流源、l3は直流バイアスであり、
同期入力に対する比較電圧vlがバイアスされている。(Prior Art) Figure 4 shows a conventional signal discrimination circuit. iJ4
In the figure, 1 is a synchronization signal input terminal, 7 and 8 are detection outputs with mutually different polarities, 9 and 10 are emitter-coupled transistors, 11 is a current source, and l3 is a DC bias.
The comparison voltage vl for the synchronization input is biased.
このように構成された回路において、同期信号入力端子
1より入力された同期信号は、直流バイアス13の電圧
V1をしきい値として検出されるものであった。In the circuit configured as described above, the synchronization signal inputted from the synchronization signal input terminal 1 is detected using the voltage V1 of the DC bias 13 as a threshold value.
(発明が解決しようとする課題)
しかしながら,上記従来の構成では、同期信号に含まれ
てくる雑音も同様に検出してしまうため、この雑音によ
る誤動作が発生するという問題があった・
本発明はこのような従来の問題を解決するものであり、
同期信号に含まれる雑音による誤動作を抑圧した信号判
別器を提供することを目的とするものである。(Problem to be Solved by the Invention) However, in the conventional configuration described above, noise included in the synchronization signal is also detected, so there is a problem in that malfunctions occur due to this noise. It solves such conventional problems,
It is an object of the present invention to provide a signal discriminator that suppresses malfunctions caused by noise contained in synchronization signals.
(課題を解決するための手段)
本発明は上記目的を達或するために、鋸歯状波信号を使
って同期信号と雑音の検出レベルを変えることで信号の
判別を行うようにしたものである.(作 用)
したがって,本発明によれば、周期的に入力する同期信
号に対して検出出力が得られ、周期性のない雑音は検出
されないことになる.
(実施例)
第1図は本発明の一実施例における信号判別器のブロッ
ク構或を示すものである.第1図において,1は同期信
号入力端子,2は電圧比較器、3は判別出力,4は鋸歯
状波信号、5はトリガー信号、6は鋸歯状波信号発生器
である.
次に上記実施例の動作について説明する.同期信号入力
端子1から入力された同期信号は、鋸歯状波信号発生器
6より得られる鋸歯状波信号4と電圧比較器2で電圧比
較を行い、判別された判別出力3を出力する.トリガー
信号5は鋸歯状波信号を同期信号入力と同期させるため
のものである.第2図は本発明の一実施例における信号
判別器の電圧比較器の具体的回路を示すものである.第
2図において、1,7,8,9,10,11は第4図の
従来例と同じである.12は鋸歯状波信号である.次に
第2図の動作について説明する.同期信号入力端子1よ
り入力された同期信号は鋸歯状波信号12と電圧比較さ
れる.この時、鋸歯状波信号12は前記同期信号と同期
がとれている.
第3図は電圧比較器の特性を示すものであり、第3図(
a)は本発明の実施例における同期信号入力の鋸歯状波
信号によるバイアス(Vl)との関係を示し、第3図(
b)は実施例の電圧比較器の判別出力を示している.ま
た、第3図(c)は従来例における同期信号入力と直流
バイアス(Vl)との関係を示し、第3図(d)は従来
例における判別出力を示している.第3図から明らかな
ように,従来例では雑音も判別出力として出力されるが
,本実施例では雑音は判別出力として出力されない.(
発明の効果)
本発明は上記実施例から明らかなように、同期信号に同
期した鋸歯状波信号によって電圧比較器の検出レベルが
変わるため、同期信号は検出されるが雑音は検出しない
という信号判別が行われる.従って、雑音による誤動作
が抑圧できるという効果を有する.(Means for Solving the Problems) In order to achieve the above object, the present invention uses a sawtooth wave signal to discriminate between signals by changing the detection levels of a synchronization signal and noise. .. (Function) Therefore, according to the present invention, a detection output is obtained for a periodically input synchronization signal, and non-periodic noise is not detected. (Embodiment) FIG. 1 shows the block structure of a signal discriminator in an embodiment of the present invention. In FIG. 1, 1 is a synchronizing signal input terminal, 2 is a voltage comparator, 3 is a discrimination output, 4 is a sawtooth wave signal, 5 is a trigger signal, and 6 is a sawtooth signal generator. Next, the operation of the above embodiment will be explained. A synchronizing signal inputted from a synchronizing signal input terminal 1 is subjected to a voltage comparison with a sawtooth wave signal 4 obtained from a sawtooth wave signal generator 6 by a voltage comparator 2, and a determined discrimination output 3 is output. Trigger signal 5 is for synchronizing the sawtooth wave signal with the sync signal input. FIG. 2 shows a specific circuit of a voltage comparator of a signal discriminator in an embodiment of the present invention. In FIG. 2, 1, 7, 8, 9, 10, and 11 are the same as in the conventional example shown in FIG. 12 is a sawtooth wave signal. Next, the operation shown in Figure 2 will be explained. The synchronization signal input from the synchronization signal input terminal 1 is compared in voltage with the sawtooth wave signal 12. At this time, the sawtooth wave signal 12 is synchronized with the synchronization signal. Figure 3 shows the characteristics of the voltage comparator, and Figure 3 (
a) shows the relationship between the synchronization signal input and the bias (Vl) due to the sawtooth wave signal in the embodiment of the present invention, and FIG.
b) shows the discrimination output of the voltage comparator of the example. Further, FIG. 3(c) shows the relationship between the synchronizing signal input and the DC bias (Vl) in the conventional example, and FIG. 3(d) shows the discrimination output in the conventional example. As is clear from Fig. 3, in the conventional example, noise is also output as a discrimination output, but in this embodiment, noise is not output as a discrimination output. (
Effects of the Invention) As is clear from the above embodiments, the detection level of the voltage comparator changes depending on the sawtooth wave signal synchronized with the synchronization signal, so the present invention is capable of signal discrimination in which the synchronization signal is detected but noise is not detected. will be held. Therefore, it has the effect of suppressing malfunctions caused by noise.
第1図は本発明の一実施例における信号判別器の概要ブ
ロック図,第2図は本発明の一実施例の電圧比較器の回
路図、第3図は電圧比較器の同期信号入力と判別出力の
関係を示す特性図,第4図は従来の電圧比較器の回路図
である.Fig. 1 is a schematic block diagram of a signal discriminator according to an embodiment of the present invention, Fig. 2 is a circuit diagram of a voltage comparator according to an embodiment of the present invention, and Fig. 3 is a synchronization signal input and discriminator of the voltage comparator. A characteristic diagram showing the relationship between outputs, Figure 4 is a circuit diagram of a conventional voltage comparator.
Claims (1)
信号の周期と等しいかもしくは長い周期で電圧を増減さ
せる鋸歯状波信号をもうひとつの入力とする電圧比較器
と、前記同期信号により前記電圧比較器から得る同期検
出出力に同期させて前記鋸歯状波信号を発生する鋸歯状
波信号発生器から成り、前記同期信号に含まれる雑音に
よる誤動作を抑圧し安定した同期検出出力が得られるこ
とを特徴とする信号判別器。A voltage comparator which has one input as a periodic signal that is periodically inputted and has another input as a sawtooth wave signal that increases or decreases the voltage with a period equal to or longer than the period of the synchronization signal; It is comprised of a sawtooth wave signal generator that generates the sawtooth wave signal in synchronization with the synchronization detection output obtained from the comparator, and is capable of suppressing malfunctions due to noise contained in the synchronization signal and obtaining a stable synchronization detection output. Characteristic signal discriminator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1187533A JPH0353672A (en) | 1989-07-21 | 1989-07-21 | Signal discriminator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1187533A JPH0353672A (en) | 1989-07-21 | 1989-07-21 | Signal discriminator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0353672A true JPH0353672A (en) | 1991-03-07 |
Family
ID=16207754
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1187533A Pending JPH0353672A (en) | 1989-07-21 | 1989-07-21 | Signal discriminator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0353672A (en) |
-
1989
- 1989-07-21 JP JP1187533A patent/JPH0353672A/en active Pending
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