JPH0354465B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a field effect transistor, and particularly to a field effect transistor suitable for operating at ultrahigh speed.

[Prior art]

Conventional field effect transistors, a typical example of which is a MOS transistor, operate on the principle of increasing or decreasing the carrier concentration in an active region called a channel using a field effect (usually supplied by a gate voltage). This is based on changing the conductance between the source and drain. One of the operating limits when trying to operate this field effect transistor at high speed is the time (transit time) τ required for a carrier to pass through the channel. For example, if we take a SiMOS transistor with a channel length of 1 μm,
Since the saturation velocity of electrons in Si is 2 × 10 ⁷ cm/sec, the transit time τ in the channel is τ = (channel length) / (saturation velocity) = 1 × 10 ^-4 (cm) / 2 × 10 ⁷ (cm/sec) = 5 psec, and it is impossible for the operating speed of a MOS transistor to exceed this, considering its operating principle.

On the other hand, with the aim of increasing mobility and shortening travel time, operation at low temperatures has been actively proposed, but since the saturation speed does not change much with temperature, it is impossible to shorten travel time any further. That is almost impossible.

[Purpose of the invention]

Therefore, in order to dramatically improve the operating speed of field effect transistors, it is necessary to develop field effect transistors based on operating principles completely different from conventional ones. It is about providing.

[Summary of the invention]

To achieve the above objective, the present invention uses bismuth (Bi) with the correct holes and electrons in the same layer.
An electric field is applied to a thin layer with semimetallic properties formed near the interface of a semimetallic thin layer typified by, etc., or a suitable combination of semiconducting thin layers, through an insulator or semiconductor heterojunction. The operating principle is to change the conductance of a thin layer with semimetallic properties.

Hereinafter, a thin layer having semimetal characteristics formed near the interface by combining thin layers of a semimetal and a semiconductor, which is the basis of the present invention, will be explained.

In the electronic structure of metalloids such as bismuth (Bi), the lowest energy level of the conduction band is located lower than the top of the valence band, so even without doping with impurities, conduction electrons It is a substance in which both electrons and holes coexist, and it exhibits metallic electrical conductivity characteristics. However, the concentration of conduction electrons and holes is about 1×10 ¹³ cm ⁻³ , which is much lower than that of metals, which has a concentration of conduction electrons of about 10 ²² cm ⁻³ .

Furthermore, to explain in detail the case of bismuth, electrical conductivity is determined mostly by conduction electrons with small effective mass and high mobility, but holes with charges of different signs are almost determined by conduction electrons and conduction electrons. Because they exist at the same concentration, they may exhibit unique phenomena that cannot be seen in metals or semiconductors, where only carriers with the same sign exist. For example, an electric field is applied in a certain direction within the plane of a bismuth single crystal thin piece (referred to as the X direction), a current is caused to flow, and a magnetic field is applied in a direction perpendicular to this thin piece (referred to as the Z direction). In such cases, it is well known that in semiconductors or metals that have only either conduction electrons or holes, a voltage called a Hall voltage is generated in a direction (Y direction) perpendicular to both the current and the magnetic field.
However, in the case of semimetals, the Lorentz force generated by the current and magnetic field acts on electrons and holes in the same direction, so both are bent to the same side, causing negatively charged electrons and positively charged electrons to bend toward the same side. Holes with , cancel each other out and do not generate a hole voltage. Such a phenomenon is only seen in metalloids.

The basic principle of the present invention is to change the conductance of this thin layer by applying an electric field to the thin layer of the semimetal in the thickness direction to change the concentration of electrons and holes in the thin layer. This is the operating principle.

Next, a thin layer having metalloid properties that is formed at the interface by overlapping different types of semiconductor thin layers will be described.

An example of a thin layer with such properties is L.
L. Chang et al. have reported on the heterointerface between InAs and GaSb (Appl. Phys. Lett. 35 ,
939 (1979)). In other words, at the InAs-GaSb interface formed by molecular beam epitaxy, etc., due to the relative relationship between the work function and electron bombardment energy structure of these two materials, as will be explained later in Figure 3, there is a Conduction electrons come to exist in close proximity to holes on the GaSb side. in this way,
A state in which two types of carriers, holes and electrons, exist in close proximity is defined as a state having semimetallic properties.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in detail with reference to Examples.

Example 1 The configuration and operating principle of this example will be explained using FIG. 1.

Bi is epitaxially grown on the n-type Si substrate 11 of 0.1Ω・cm by the molecular beam epitaxy method, and the thickness is
A Bi thin layer 12 of 80 nm is obtained. This Bi thin layer is a semimetallic layer with both electrons and holes of 2×10 ¹³ cm ⁻³ . The mobility of electrons at extremely low temperatures (4.2〓) has a large value reaching approximately 8 × 10 ⁵ cm ² /V sec, and the mobility of holes is more than an order of magnitude smaller than this, so at extremely low temperatures Both holes and electrons exist, but electrical conductivity is determined only by the concentration of electrons.

A 50 nm thick Al ₂ O ₃ film is formed on this Bi thin layer 12 by electron beam evaporation. Next, by photolithography, only the Al ₂ O ₃ film 13 at the gate portion is left and the other Al ₂ O ₃ is removed. Next, gold was deposited to a thickness of 1000 nm on the entire surface using the same electron beam evaporation method, and unnecessary portions were removed using photoetching to form the gate electrode 14, source electrode 15, and drain electrode 1.
form 6.

Next, the operating principle of the above element will be explained.

Assume that the gate electrode 14 is biased by +V _G volts with respect to the substrate 11. now
The capacitance formed by sandwiching the insulating film 13 between the Bi thin layer 12 and the gate electrode 14 is
shall be. For precision, it is necessary to self-consistently solve the problem from the substrate 11 through the Bi thin layer 12 and insulating film 13 to the gate electrode 14, but in general, Q=
Negative charges given by CV are induced on the side of the Bi thin layer 12 closer to the insulating film 13, and the same amount of positive charges are induced on the side of the substrate 11. This is Bi layer 1
This is achieved by increasing the electron concentration on the side of the substrate 2 closer to the insulating film 13 and increasing the hole concentration on the substrate 11 side. As mentioned earlier, in 4.2〓
Since the electrical conductivity of Bi is determined only by electrons, this means that the conductance between the source and drain has increased. In addition, unlike in the case of MOS transistors, the charge movement at this time is Bi
Since this can be achieved only by polarization of electrons and holes within the thin layer, it occurs within a very short time (<1 ps) on the order of the dielectric relaxation time of Bi.

FIG. 2 shows the static operating characteristics of the field effect device of this example. As can be seen from the figure, this device is basically centered on normally-on triode operation. Further, the drain voltage and current characteristics can be appropriately selected depending on the geometric structural parameters on the plane of the element.

In addition, in this example, a Si substrate was used to use Bi grown by molecular beam epitaxy, but
An insulating substrate such as sapphire is preferable. In addition, in this example, an epitaxially grown Bi single crystal thin layer was used, but considering its operating principle,
Of course, similar operations can be performed with other thin metalloid layers. The semimetal thin layer may also be polycrystalline.

Next, before showing the specific structure in Example 2 and below, we will explain that when an interface or superlattice structure of different types of semiconductors is used, a layer in which electrical conduction is performed by electrons and a layer in which electrical conduction is performed by holes are spatially separated. We show that it can be created very close to .

FIG. 3 is an energy diagram near a heterojunction between n-type GaSb and p-type InAs. Due to the relationship between the work functions and band gaps of GaSb and InAs, as schematically shown in Figure 3, electrons accumulate in the inverted triangular potential well shown at 31, and the triangular potential well shown at 32 Holes accumulate at the top of the well, and these are moving in the direction perpendicular to the plane of the paper as free electrons and free holes. That is, in the in-plane direction along the interface, there exists a thin layer having semimetallic properties in which free electrons and free holes coexist.

Furthermore, Figure 4 is a schematic diagram of the electronic energy structure of the superlattice of GaAa and InAs, which was first reported by LLChang et al. (IBM). According to Chang et. At this point, a semimetallic situation is realized. In this case, the electrons 41 are almost localized in the InAs layer, and the holes 42 are almost localized in the GaSb layer.

Embodiment 2 and subsequent embodiments will be described below, in place of Embodiment 1.
The semiconductor superlattice shown in the figure uses a semiconductor with semimetallic properties within a certain range.

Example 2 This embodiment will be explained using FIG. 5.

On a semi-insulating GaAs substrate 51, a layer is used to match the lattice constant using molecular beam epitaxy.
A buffer layer 52 consisting of Ga _1-X InxSb _1-Y As _Y
A layer of 1.5 μm thick containing sulfur (S) at a concentration of 5×10 ¹⁸ cm ⁻³ was formed on top of this to a thickness of 2 μm.
A GaSb layer 53 is formed, and furthermore, an InAs layer 54 with a thickness of 1 μm is continuously formed thereon by molecular beam epitaxy. After that, a layer with a thickness of 100 nm is applied on top of it.
An insulator layer 55 is formed. The subsequent gate electrode 56, source electrode 57, and drain electrode 58 are formed in the same manner as in Example 1 to produce a field effect transistor. When the static operating characteristics of this device were measured, characteristics similar to those in FIG. 3 of Example 1 were obtained.

Although an insulating layer is used below the gate electrode 56 here, this may be replaced with a semiconductor layer having a wider bandgap than InAs to form a heterojunction.

Example 3 As in Example 2, a buffer layer 62 with a thickness of 2 μm was formed on a semi-insulating GaAs substrate 61 using the molecular beam epitaxy method as shown in FIG. Superlattice layer 63 of the described structure
was continuously grown, and then by electron beam evaporation,
An insulator layer 64 is deposited thereon to a thickness of 150 nm. The subsequent formation of the field effect transistor is the same as in Example 1. 65 is a gate electrode, 66 is a source electrode, and 67 is a drain electrode. When the static operating characteristics of the field effect transistor thus prepared were measured, characteristics similar to those shown in FIG. 2 were obtained.

Further, a semiconductor layer formed by molecular beam epitaxy may be added between the insulating layer 64 and the gate electrode 65.

〔Effect of the invention〕

As is clear from the above detailed description, the field effect transistor of the present invention is a novel one based on an operating principle completely different from conventional ones, and can dramatically improve the operating speed.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a field effect transistor according to a first embodiment of the present invention, FIG. 2 is a diagram showing static operating characteristics of a field effect transistor according to a first embodiment, and FIG.
The figure is a schematic diagram of the electronic structure near the GaAs-InAs interface.
FIG. 4 is a schematic diagram of the electronic structure of a GaAs-InAs superlattice, and FIGS. 5 and 6 are configuration diagrams of other embodiments of the present invention, respectively. 11...Si substrate, 12...Bi thin layer, 13...
Al ₂ O ₃ thin layer, 14... Gate electrode, 15... Source electrode, 16... Drain electrode, 31... Free electron, 32... Free hole, 41... Free electron, 42
...Free hole, 51 ...Semi-insulating GaAs substrate, 5
2...Ga _1-X In _X Sb _1-Y As _Y buffer layer, 53...
GaSb layer, 54... InAs layer, 55... insulator layer,
56...gate electrode, 57...source electrode, 58
...Drain electrode, 61...Semi-insulating GaAs substrate, 62...Ga _1-X In _X Sb _1-Y As _Y buffer layer, 6
3...GaSb-InAs superlattice layer, 64...Insulator layer, 65...Gate electrode, 66...Source electrode,
67...Drain electrode.

Claims (1)

[Scope of Claims] 1. A substrate, an active layer formed on the substrate and made of a semimetal or a semiconductor member having semimetallic properties, and an insulating layer formed in a predetermined region on the active layer; A field effect transistor comprising: a gate electrode formed on the insulating layer; and source and drain electrodes sandwiching the gate electrode and formed on the active layer. 2. The field effect transistor according to claim 1, further comprising a buffer layer between the substrate and the active layer. 3. The field effect transistor according to claim 1 or 2, wherein the semimetal is bismuth. 4 The semiconductor member having semimetallic properties is
3. The field effect transistor according to claim 1, wherein the field effect transistor is a compound semiconductor having a heterojunction in which InAs and GaSb are laminated. 5 The above semiconductor member having semimetallic properties is
3. The field effect transistor according to claim 1, wherein the field effect transistor is a compound semiconductor having a superlattice structure consisting of InAs and GaSb. 6. The field effect transistor according to claim 1, wherein the substrate is an insulating substrate.