JPH0356495B2 - - Google Patents
Info
- Publication number
- JPH0356495B2 JPH0356495B2 JP10921084A JP10921084A JPH0356495B2 JP H0356495 B2 JPH0356495 B2 JP H0356495B2 JP 10921084 A JP10921084 A JP 10921084A JP 10921084 A JP10921084 A JP 10921084A JP H0356495 B2 JPH0356495 B2 JP H0356495B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- switching circuit
- data switching
- line
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/74—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission for increasing reliability, e.g. using redundant or spare channels or apparatus
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Description
〔技術分野〕
本発明は回線切替装置、特にデイジタル無線通
信方式において現用および予備の切替えを高速で
行う回線切替装置に関する。
〔発明の背景〕
デイジタル無線通信方式では、回線保守やフエ
ージング対策として無符号誤りの同期切替えを行
うため、電子回路を用いた高速動作の可能な回線
切替方式が採用されている。この回線切替方式で
は、送信側の予備無線回線の変調器入力に1個の
送信データ切替回路が挿入され、n:1の現用・
予備構成のシステムでは、n個の現用無線回線の
各変調入力のデータ信号線がすべて分岐してこの
送信データ切替回路に接続され、制御信号によつ
て選択接続が行われるよう構成されているため、
送信データ切替回路には多数のデータ信号線と制
御信号線が集中する。近年、直交多値変調方式の
開発が進んでいるが、直交多値変調方式では一つ
の無線回線の変復調に用いられるデータ信号線の
数が多く(例えば、8相PSKでは2値のデータ
信号線が3本、16値QAMでは4本、64値QAM
では6本)、無線回線数nが多い場合(例えば
11GHz帯の無線周波数配置ではn=11まである)
には、従来の方法では送信データ切替回路に出入
りするデータ信号線および制御信号線の数が非常
に多くなり、コネクタのピン数不足や取付け場所
の不足など実装上の困難が発生するという欠点が
ある。
〔発明の目的〕
本発明の目的は、上述の従来方法の欠点を除去
し、直交多値変調方式のデイジタル無線通信方式
に適用できる回線切替装置を提供することであ
る。
〔発明の構成〕
本発明の回線切替装置は、少なくとも一つの予
備無線回線と複数の現用無線回線とから成るデイ
ジタル無線通信方式の現用と予備との切替えを行
う回線切替装置において、複数組の第1の信号線
群の各組をそれぞれ制御信号によつて選択し一組
の第2の信号線群に接続する複数個のデータ切替
回路を備え、これら複数個のデータ切替回路のう
ち第1のデータ切替回路の前記第2の信号線群が
前記予備無線回線の変調装置または復調装置に接
続され、前記第1のデータ切替回路を除く各デー
タ切替回路の前記第2の信号線群がそれぞれ前記
第1のデータ切替回路を含む他のデータ切替回路
の前記第1の信号線群の一組と順次接続され、前
記複数個のデータ切替回路の上記以外の前記第1
の信号線群がそれぞれ前記現用または予備無線回
線の入力または出力のデータ信号線群に接続さ
れ、前記第1の切替回路を除く各データ切替回路
が制御信号によつて選択接続を行つたことを示す
応答信号をこのデータ切替回路の前記第2の信号
線群が接続された前記他のデータ切替回路の制御
信号とすることによつて構成される。
〔従来技術〕
次に図面を参照して本発明を詳細に説明する。
まず、本発明の理解を容易にするため、従来の回
線切替方式について説明する。第1図は予備無線
回線SPとn個の現用無線回線REG1,REG2,
…………REGnから成るn:1構成のデイジタル
無線通信方式に用いられる従来の回線切替方式の
構成例を示すブロツク図である。第1図におい
て、多重化装置(図示せず)から送られてくる各
現用無線回線用のバイポーラ入力信号100は、
分岐回路1で二分されて一方はリレー切替器2に
他方は送信信号処理回路3に送られる。後者は送
信信号処理回路3でバイポーラ・ユニポーラ変
換、速度変換、符号列変換、監視用ビツト及びフ
レーム同期信号の挿入などの必要な符号処理を受
け、それぞれ複線で示すm列(mは8相PSKの
場合には3、16値QAMの場合には4etc.)のベー
スバンド信号101に変換される。このm列のユ
ニポーラ信号に変換されたベースバンド信号は送
信分配回路4を経て各現用無線回線の送信装置5
に加えられ、各無線搬送波を直交多値変調する。
一方、送信分配回路4で分岐された各m列のベー
スバンド信号102は、予備無線回線SPの送信
信号処理回路3′と送信装置5′との間に設けられ
た送信データ切替回路6に接続されている。送信
データ切替回路6は、常時はパイロツト発生回路
7で発生される監視用データ信号を予備無線回線
SPに送出しているが、制御信号103により各
現用無線回線のベースバンド信号102を予備無
線回線に並列に送出するように構成されている。
この構成においては、送信データ切替回路6には
予備無線回線用のベースバンド信号入出力のほ
か、現用各無線回線からのベースバンド信号と制
御信号とが集中し、少なくともm(n+2)本の
ベースバンド信号線とn本の制御信号および応答
信号線を接続する必要がある。従つて、並列ベー
スバンド信号列m及び現用無線回線数nの多い場
合には、所要コネクタ数の増加やコネクタのピン
数増加などからコネクタの取付け場所の確保に無
理が生じ、実装設計が困難になるという欠点があ
る。
受信側においては、各現用無線回線の受信装置
8の復調出力は、フレーム同期回路9で再生され
たタイミング信号(ビツト及びフレーム同期信
号)と共に同期切替回路10を経て受信信号処理
回路11に供給され、ここで送信側と逆の符号処
理を受けてバイポーラ信号104に変換された
後、リレー切替器12を通つて多重化装置(図示
せず)に送られる。一方、予備無線回線用受信装
置8′の復調出力は、フレーム同期回路9′で再生
されたタイミング信号と共に、受信分配回路1
3、受信信号処理回路11′を経てパイロツト検
出回路14に接続され、常時は監視用データ信号
を検出して予備無線回線の状態監視を行うように
構成されている。現用から予備への切替えが行わ
れる場合には、まず送信側で切替えの対象となる
現用無線回線のベースバンド信号が予備無線回線
に並列に送り出される。予備無線回線の復調出力
およびタイミング信号は、受信分配回路13から
分岐され各同期切替回路10に送られ、各同期切
替回路10は現用と予備でそれぞれ復調されたベ
ースバンド信号のタイミング同期をとり、制御信
号105によつて現用から予備に瞬時に切替えら
れ無符号誤りの同期切替えが行われるよう構成さ
れている。制御信号105は受信信号処理回路1
1及び11′によつて一定時間現用と予備のベー
スバンド信号が一致することを確認してから送出
される。この受信側の構成においても、受信分配
回路13は予備無線回線用のベースバンド信号お
よびタイミング信号線のほか、各同期切替回路1
0への信号線106が集中し、送信側と同様な問
題がある(受信分配回路が切替機能を持つ場合も
ある)。なお、リレー切替器2及び12は送信信
号処理回路3、同期切替回路10、受信信号処理
回路11などの障害に対して設けられている。
〔実施例〕
第2図は本発明の一実施例のブロツク図であ
り、5:1の現用・予備構成の送信側回線切替装
置を示す。第2図において、3個の送信データ切
替回路15−1,15−2,15−3はそれぞれ
m列のベースバンド信号入力を伝送する3組の入
力信号線(第1の信号線群)Ai,Bi,Ciの1組
を制御信号で選択し、m列のベースバンド出力信
号線(第2の信号線群)Diに選択接続するデー
タ切替回路であり、送信データ切替回路15−
2,15−3の出力信号線D2及びD3は、それぞ
れ他の送信データ切替回路15−1,15−2の
入力信号線C1及びC2に順次接続されている。予
備無線回線に挿入された第1の送信データ切替回
路15−1の出力信号線D1はSPの変調器入力に、
入力信号線A1はSPの送信信号処理回路3′に、入
力信号線B1はREG1の送信分配スイツチ16−
1の分岐出力G1に接続され、送信データ切替回
路15−2及び15−3の入力信号線A2,B2及
びA3,B3は各現用無線回線の送信分配スイツチ
16−2,16−3,16−4,16−5の分岐
出力G2,G3及びG4,G5にそれぞれ接続されてい
る。いま、現用無線回線REG5を予備無線回線
SPに切替える場合を考える。制御線103−5
に信号が加えられると、送信分配スイツチ16−
5が作動して送信信号処理回路3からのベースバ
ンド信号101−5をG5に分岐すると共に制御
信号107−5を送信データ切替回路15−3に
送出する。送信データ切替回路15−3はこの制
御信号によつて入力B3を選択し、出力D3に接続
すると共に応答信号108−3を送信データ切替
回路15−2に送出する。送信データ切替回路1
5−2は同様にして入力C2を選択し、出力D2に
接続すると共に応答信号108−2を送信データ
切替回路15−1に送り出す。送信データ切替回
路15−1も同様にして入力C1を選択して出力
D1に接続し、応答信号108−1によつてSPの
入力A1を開放し、REG5のベースバンド信号1
01−5がSPのREG5に並列に送出される。他
の現用無線回線を予備に切替える場合についても
同様であつて、制御信号103−iによつて各現
用無線回線REGiの送信信号処理回路3の出力1
01−iがSPに並列に送信される。この回路に
よれば、SPに挿入される送信データ切替回路1
5−1には3組のベースバンド信号入力線A1,
B1,C1とベースバンド信号出力線D1と少数の制
御信号線が接続されるのみであり、現用無線回線
数nが増えても増加せず、前述した従来方式の実
装上の欠点を除去することができる。又、各現用
無線回線には送信分配スイツチ16−iが設けら
れているので、信号が各送信データ切替回路15
−iを縦続に通過しても、リークにより漏話雑音
が相加されS/Nが劣化することはない。
第3図は第2図の制御信号系の一実施例の具体
的なブロツク図であり、各回路および信号には第
2図と同じ記号を用いてある。各制御信号103
−iは正常時は“H”レベルであり、切替えを行
うための制御信号は“L”レベルで与えられる。
各送信分配スイツチの分岐ゲート17は、制御端
子giが”H”レベルのとき入力Eiを出力Fiと分岐
出力Giとに接続し、“L”レベルのときは出力Fi
にのみに接続される。送信データ切替回路15−
iの各選択回路18は対応する制御端子ai,bi,
ciがそれぞれ“H”レベルのときに開放で、“L”
レベルになると対応する入力が出力Diに接続さ
れる。送信データ切替回路15−3のC3はこの
実施例では使用されず、C3の制御入力109に
は常時“H”レベルが印加されている。送信デー
タ切替回路15−1の制御入力110にも“H”
レベルが加えられ、正常時はSPの入力A1を出力
D1に接続しているが、
[Technical Field] The present invention relates to a line switching device, and particularly to a line switching device that performs high-speed switching between active and backup lines in a digital wireless communication system. [Background of the Invention] In digital wireless communication systems, a line switching system that uses electronic circuits and is capable of high-speed operation is employed in order to perform synchronous switching of uncoded errors as a means of line maintenance and countermeasures against fading. In this line switching method, one transmission data switching circuit is inserted into the modulator input of the backup radio line on the transmitting side, and
In the preliminary configuration system, all the data signal lines of each modulation input of the n working radio lines are branched and connected to this transmission data switching circuit, and selective connection is performed by the control signal. ,
A large number of data signal lines and control signal lines are concentrated in the transmission data switching circuit. In recent years, the development of orthogonal multi-level modulation has progressed, but in orthogonal multi-level modulation, the number of data signal lines used for modulation and demodulation of one radio channel is large (for example, in 8-phase PSK, there are only two data signal lines 3 lines for 16-value QAM, 4 lines for 64-value QAM
(6), when the number n of wireless lines is large (for example,
In the 11GHz band radio frequency allocation, there are up to n = 11)
The disadvantage of conventional methods is that the number of data signal lines and control signal lines that go in and out of the transmission data switching circuit is extremely large, resulting in implementation difficulties such as a lack of connector pins and a lack of mounting space. be. [Object of the Invention] An object of the present invention is to eliminate the drawbacks of the above-mentioned conventional methods and to provide a line switching device that can be applied to a digital wireless communication system using orthogonal multilevel modulation. [Structure of the Invention] The line switching device of the present invention is a line switching device that switches between working and standby in a digital wireless communication system consisting of at least one standby radio line and a plurality of working radio lines. A plurality of data switching circuits are provided, each of which selects each set of one signal line group by a control signal and connects to one set of second signal line group; The second signal line group of the data switching circuit is connected to the modulation device or demodulation device of the backup radio channel, and the second signal line group of each data switching circuit except the first data switching circuit is connected to the connected sequentially to one set of the first signal line group of other data switching circuits including the first data switching circuit;
The signal line groups are connected to the input or output data signal line groups of the working or standby wireless line, respectively, and each data switching circuit except the first switching circuit performs selective connection by a control signal. The data switching circuit is constructed by using a response signal shown as a control signal of the other data switching circuit to which the second signal line group of this data switching circuit is connected. [Prior Art] Next, the present invention will be described in detail with reference to the drawings.
First, in order to facilitate understanding of the present invention, a conventional line switching system will be explained. Figure 1 shows the backup radio line SP and n working radio lines REG1, REG2,
. . . is a block diagram showing a configuration example of a conventional line switching system used in a digital wireless communication system with an n:1 configuration consisting of REGn. In FIG. 1, a bipolar input signal 100 for each working radio line sent from a multiplexer (not shown) is as follows:
The signal is divided into two by a branch circuit 1, and one is sent to a relay switch 2 and the other to a transmission signal processing circuit 3. The latter undergoes necessary code processing such as bipolar/unipolar conversion, speed conversion, code string conversion, and insertion of monitoring bits and frame synchronization signals in the transmission signal processing circuit 3, and is then processed in m columns (m is 8-phase PSK), each indicated by a double line. In the case of QAM, it is converted to a baseband signal 101 of 3, 4, etc. in the case of 16-value QAM. The baseband signal converted into m columns of unipolar signals passes through the transmission distribution circuit 4 to the transmitting device 5 of each working wireless line.
is added to perform orthogonal multilevel modulation on each radio carrier.
On the other hand, each m-column baseband signal 102 branched by the transmission distribution circuit 4 is connected to a transmission data switching circuit 6 provided between the transmission signal processing circuit 3' and the transmission device 5' of the backup radio line SP. has been done. The transmission data switching circuit 6 normally switches the monitoring data signal generated by the pilot generation circuit 7 to the backup radio line.
However, the baseband signal 102 of each working wireless line is sent to the backup wireless line in parallel using a control signal 103.
In this configuration, in addition to the baseband signal input/output for the backup radio line, the transmission data switching circuit 6 receives baseband signals and control signals from each working radio line, and at least m(n+2) baseband signals are concentrated on the transmission data switching circuit 6. It is necessary to connect the band signal line to n control signal and response signal lines. Therefore, when the number of parallel baseband signal trains m and the number of active wireless lines n are large, it becomes difficult to secure a mounting location for the connectors due to the increase in the number of required connectors and the increase in the number of connector pins, making implementation design difficult. It has the disadvantage of becoming. On the receiving side, the demodulated output of the receiving device 8 of each working radio line is supplied to the received signal processing circuit 11 via the synchronization switching circuit 10 together with the timing signal (bit and frame synchronization signal) regenerated by the frame synchronization circuit 9. Here, the signal is subjected to the reverse code processing as on the transmitting side and converted into a bipolar signal 104, and then sent through the relay switch 12 to a multiplexer (not shown). On the other hand, the demodulated output of the backup radio line receiving device 8' is sent to the reception distribution circuit 1 along with the timing signal regenerated by the frame synchronization circuit 9'.
3. It is connected to the pilot detection circuit 14 via the received signal processing circuit 11', and is configured to normally detect the monitoring data signal and monitor the status of the backup radio line. When switching from active to standby, first the baseband signal of the active radio line to be switched is sent out in parallel to the standby radio line on the transmitting side. The demodulated output and timing signal of the backup radio channel are branched from the reception distribution circuit 13 and sent to each synchronization switching circuit 10, and each synchronization switching circuit 10 synchronizes the timing of the demodulated baseband signals of the working and backup, respectively. The control signal 105 is configured to instantly switch from active to standby, and to perform synchronous switching for unsigned errors. The control signal 105 is sent to the received signal processing circuit 1
1 and 11' confirm that the current and backup baseband signals match for a certain period of time before being transmitted. In this configuration on the receiving side, the reception distribution circuit 13 also handles the baseband signal and timing signal line for the backup radio line, as well as each synchronization switching circuit 1.
The signal lines 106 to 0 are concentrated, and there is a problem similar to that on the transmitting side (the receiving distribution circuit may have a switching function). Note that the relay switching devices 2 and 12 are provided for failures in the transmission signal processing circuit 3, the synchronous switching circuit 10, the reception signal processing circuit 11, and the like. [Embodiment] FIG. 2 is a block diagram of an embodiment of the present invention, showing a transmitting side line switching device with a 5:1 working/standby configuration. In FIG. 2, three transmission data switching circuits 15-1, 15-2, and 15-3 each have three sets of input signal lines (first signal line group) Ai that transmit m columns of baseband signal inputs. , Bi, and Ci by a control signal and selectively connects them to the m-column baseband output signal line (second signal line group) Di, and the transmission data switching circuit 15-
The output signal lines D 2 and D 3 of the transmission data switching circuits 2 and 15-3 are sequentially connected to the input signal lines C 1 and C 2 of the other transmission data switching circuits 15-1 and 15-2, respectively. The output signal line D1 of the first transmission data switching circuit 15-1 inserted into the backup wireless line is connected to the modulator input of the SP.
The input signal line A 1 is connected to the SP transmission signal processing circuit 3', and the input signal line B 1 is connected to the REG 1 transmission distribution switch 16-.
The input signal lines A 2 , B 2 and A 3 , B 3 of the transmission data switching circuits 15-2 and 15-3 are connected to the branch output G 1 of the transmission data switching circuit 15-2 and 15-3, and the input signal lines A 2 , B 2 and A 3 , B 3 of the transmission data switching circuits 15-2 and 15-3 are connected to the transmission distribution switch 16-2, 16 of each working wireless line. -3, 16-4, 16-5 branch outputs G 2 , G 3 and G 4 , G 5 respectively. Currently, the working wireless line REG5 is being used as a backup wireless line.
Consider the case of switching to SP. Control line 103-5
When a signal is applied to the transmit distribution switch 16-
5 operates to branch the baseband signal 101-5 from the transmission signal processing circuit 3 to G5 and send out the control signal 107-5 to the transmission data switching circuit 15-3. Transmission data switching circuit 15-3 selects input B 3 based on this control signal, connects it to output D 3 , and sends response signal 108-3 to transmission data switching circuit 15-2. Transmission data switching circuit 1
5-2 similarly selects the input C2 , connects it to the output D2 , and sends out the response signal 108-2 to the transmission data switching circuit 15-1. Similarly, the transmission data switching circuit 15-1 selects input C 1 and outputs it.
Connect to D 1 , open input A 1 of SP by response signal 108-1, and connect baseband signal 1 of REG 5.
01-5 are sent in parallel to REG5 of SP. The same applies to the case where other working radio lines are switched to backup, and the output 1 of the transmission signal processing circuit 3 of each working radio line REGi is controlled by the control signal 103-i.
01-i is sent in parallel to the SP. According to this circuit, the transmission data switching circuit 1 inserted into the SP
5-1 has three sets of baseband signal input lines A 1 ,
B 1 , C 1 , baseband signal output line D 1 , and a small number of control signal lines are only connected, and the number does not increase even if the number of active wireless lines n increases. Can be removed. Furthermore, since each working wireless line is provided with a transmission distribution switch 16-i, the signal is transmitted to each transmission data switching circuit 15-i.
-i in cascade, the S/N ratio will not deteriorate due to addition of crosstalk noise due to leakage. FIG. 3 is a concrete block diagram of one embodiment of the control signal system of FIG. 2, and the same symbols as in FIG. 2 are used for each circuit and signal. Each control signal 103
-i is at "H" level under normal conditions, and a control signal for switching is given at "L" level.
The branch gate 17 of each transmission distribution switch connects the input Ei to the output Fi and the branch output Gi when the control terminal gi is at the "H" level, and connects the input Ei to the output Fi and the branch output Gi when the control terminal gi is at the "L" level.
connected only to Transmission data switching circuit 15-
Each selection circuit 18 of i has a corresponding control terminal ai, bi,
Open when ci is at “H” level, “L”
When the level is reached, the corresponding input is connected to the output Di. C3 of the transmission data switching circuit 15-3 is not used in this embodiment, and the "H" level is always applied to the control input 109 of C3 . The control input 110 of the transmission data switching circuit 15-1 is also “H”
level is added and outputs SP input A 1 when normal
Although connected to D 1 ,
【表】
107−1,108−2のいずれかが“L”レベ
ルとなるとa1が“H”レベルとなつて予備回線入
力を切離すようになつている。第1表は各現用無
線回線REGiを予備無線回線SPに並列送信するた
めの各制御信号103−iの状態と、このとき
“L”レベルとなる各送信データ切替回路15−
iの選択回路18の制御端子、および“H”レベ
ルとなる分岐ゲート17の制御端子を示したもの
である。
第4図は第2図に対応する受信側回線切替装置
の一実施例のブロツク図であり、3個の受信デー
タ切替回路19−1,19−2,19−3はそれ
ぞれm列のベースバンド信号とタイミング信号と
を伝送する入力信号線(第2の信号線群)Di′を
制御信号によつて3組の出力信号線(第1の信号
線群)Ai′,Bi′,Ci′に選択接続するデータ切替
回路であつて、受信データ切替回路19−3,1
9−2の入力信号線D3′,D2′はそれぞれ受信デー
タ切替回路19−2,19−1の出力信号線C2′,
C1′に順次接続されている。予備無線回線に挿入
された第1の受信データ切替回路19−1の入力
信号線D1′はフレーム同期回路9′を介し復調器出
力に接続され、出力信号線A1′は受信信号処理回
路11′に、B1′はREG1の同期切替回路10−
1にそれぞれ接続されている。受信データ切替回
路19−2,19−3の出力信号線A2′,B2′及び
A3′,B3′はそれぞれ各現用無線回線の同期切替回
路10−2,10−3及び10−4,10−5に
接続されている。第2図の場合と同様REG5を
SPに切替える場合について説明する。前述した
ように、送信側からREG5のベースバンド信号
が分岐されてSPに並列に送信されてくる。SPの
フレーム同期回路9′で同期が確立されると、制
御信号111−5が受信データ切替回路19−3
に加えられ、入力信号線D3′と出力信号線B3′が接
続されると共に応答信号112−3が受信データ
切替回路19−2に送られる。これによつて受信
データ切替回路19−2は出力信号線C2′を入力
信号線D2′に接続し応答信号112−2を受信デ
ータ切替回路19−1に送出する。受信データ切
替回路19−1は出力信号線C1′を選択して入力
信号線D1′と接続し、応答信号112−1を送出
する。これでSPの出力はREG5の同期切替回路
10−5に接続され、REG5のベースバンド信
号がREG5とSPを経てそれぞれの受信信号処理
回路11と11′に並列に送り込まれ、同期切替
えの準備が整う。次いで、第1図の従来方式にお
けると同様、受信信号処理回路11,11′で一
定期間両者のデータ比較を行つて送信並列が行わ
れていることを確認し、制御信号105−5によ
つて同期切替回路10−5を作動させ、ベースバ
ンド信号の経路をSP経由に切替えて無符号誤り
の同期切替えが完了する。この構成によれば、第
1の受信データ切替回路19−1にはA1′,B1′,
C1′,D1′の4組の入出力信号線と少数の制御信号
線のみを接続すればよく、第1図の従来方法の欠
点が除去される。
第5図は第4図の受信データ切替回路の制御信
号系の一実施例の具体的なブロツク図であり、第
3図に示した送信データ切替回路の場合とほぼ同
様であるが、選択回路20は第3図の選択回路1
8と信号の伝送方向が逆になつている。第3図と
同様選択回路20は制御信号の“L”レベルによ
つて対応する出力を入力と接続するように構成さ
れ、受信データ切替回路19−3の使用していな
い出力信号線C3′の制御入力113には“H”レ
ベルの電圧が加えられている。又、受信データ切
替回路19−1の制御信号端子a1′には“L”レ
ベルの電圧が加えられた出力信号線A1′には常時
出力が送出されている。第2表は第1表と同様な
各制御信号の状態および選択回路20の“L”レ
ベルとなる制御端子を示したものである。[Table] When either 107-1 or 108-2 goes to "L" level, a1 goes to "H" level and the protection line input is disconnected. Table 1 shows the state of each control signal 103-i for parallel transmission from each working radio line REGi to the backup radio line SP, and each transmission data switching circuit 15-i which becomes "L" level at this time.
The control terminal of the selection circuit 18 of i and the control terminal of the branch gate 17 that goes to "H" level are shown. FIG. 4 is a block diagram of an embodiment of the receiving side line switching device corresponding to FIG. The input signal line (second signal line group) Di′ that transmits signals and timing signals is connected to three sets of output signal lines (first signal line group) Ai′, Bi′, and Ci′ by control signals. A data switching circuit for selective connection, which is a receiving data switching circuit 19-3, 1.
The input signal lines D 3 ′ and D 2 ′ of 9-2 are the output signal lines C 2 ′ and 19-1 of the received data switching circuits 19-2 and 19-1, respectively.
connected sequentially to C 1 ′. The input signal line D1 ' of the first received data switching circuit 19-1 inserted into the backup radio line is connected to the demodulator output via the frame synchronization circuit 9', and the output signal line A1 ' is connected to the received signal processing circuit. 11', B 1 ' is the synchronous switching circuit 10- of REG1.
1, respectively. Output signal lines A 2 ′, B 2 ′ and
A 3 ′ and B 3 ′ are connected to synchronous switching circuits 10-2, 10-3 and 10-4, 10-5 of each working radio line, respectively. As in the case of Figure 2, use REG5.
The case of switching to SP will be explained. As described above, the baseband signal of REG5 is branched from the transmitting side and transmitted in parallel to the SP. When synchronization is established in the frame synchronization circuit 9' of the SP, the control signal 111-5 is sent to the reception data switching circuit 19-3.
, the input signal line D 3 ' and the output signal line B 3 ' are connected, and a response signal 112-3 is sent to the received data switching circuit 19-2. As a result, the received data switching circuit 19-2 connects the output signal line C 2 ′ to the input signal line D 2 ′ and sends the response signal 112-2 to the received data switching circuit 19-1. The received data switching circuit 19-1 selects the output signal line C 1 ', connects it to the input signal line D 1 ', and sends out the response signal 112-1. The output of SP is now connected to the synchronous switching circuit 10-5 of REG5, and the baseband signal of REG5 is sent in parallel to the respective received signal processing circuits 11 and 11' via REG5 and SP, preparing for synchronous switching. It's all set. Next, as in the conventional method shown in FIG. 1, the received signal processing circuits 11 and 11' compare the data for a certain period of time to confirm that parallel transmission is being performed, and then control signal 105-5 is used to confirm that parallel transmission is being performed. The synchronous switching circuit 10-5 is activated and the path of the baseband signal is switched to via the SP, thereby completing the synchronous switching for uncoded errors. According to this configuration, the first received data switching circuit 19-1 has A 1 ′, B 1 ′,
It is only necessary to connect four sets of input/output signal lines C 1 ', D 1 ' and a small number of control signal lines, and the drawbacks of the conventional method shown in FIG. 1 are eliminated. FIG. 5 is a concrete block diagram of an embodiment of the control signal system of the reception data switching circuit shown in FIG. 4, which is almost the same as the transmission data switching circuit shown in FIG. 20 is the selection circuit 1 in FIG.
8 and the signal transmission direction is reversed. Similar to FIG. 3, the selection circuit 20 is configured to connect the corresponding output to the input depending on the "L" level of the control signal, and connects the unused output signal line C 3 ' of the reception data switching circuit 19-3 to the input. An "H" level voltage is applied to the control input 113 of. Further, an output is always sent to the output signal line A 1 ' to which an "L" level voltage is applied to the control signal terminal a 1 ' of the reception data switching circuit 19-1. Table 2 shows the states of each control signal and the control terminals of the selection circuit 20 that are at the "L" level, similar to Table 1.
以上詳細に説明したように、本発明の回線切替
装置によれば、選択数の少ない複数のデータ切替
回路を順次縦続に接続し、各データ切替回路の応
答信号によつて順次制御することにより、ベース
バンド信号線および制御信号線の集中を排除でき
実装設計が容易となる効果がある。
As described in detail above, according to the line switching device of the present invention, a plurality of data switching circuits with a small number of selections are sequentially connected in cascade, and are sequentially controlled by the response signal of each data switching circuit. This has the effect of eliminating the concentration of baseband signal lines and control signal lines and facilitating implementation design.
第1図は従来のデイジタル無線通信方式におけ
る回線切替方式のブロツク図、第2図は送信側に
おける本発明の一実施例のブロツク図、第3図は
第2図の制御信号系の一実施例のブロツク図、第
4図は受信側における本発明の一実施例のブロツ
ク図、第5図は第4図の制御信号系の一実施例の
ブロツク図、第6図は受信側における本発明の他
の実施例のブロツク図である。
1……分岐回路、2,12……リレー切替器、
3,3′……送信信号処理回路、4……送信分配
回路、5,5′……送信装置、6,15−i……
送信データ切替回路、7……パイロツト発生回
路、8,8′……受信装置、9,9′……フレーム
同期回路、10,10−i……同期切替回路、1
1,11′……受信信号処理回路、13,21…
…受信分配回路、14……パイロツト検出回路、
16−i……送信分配スイツチ、17……分岐ゲ
ート、18,20……選択回路、19−i……受
信データ切替回路。
Fig. 1 is a block diagram of a line switching system in a conventional digital wireless communication system, Fig. 2 is a block diagram of an embodiment of the present invention on the transmitting side, and Fig. 3 is an embodiment of the control signal system of Fig. 2. 4 is a block diagram of an embodiment of the present invention on the receiving side, FIG. 5 is a block diagram of an embodiment of the control signal system of FIG. 4, and FIG. 6 is a block diagram of an embodiment of the present invention on the receiving side. FIG. 3 is a block diagram of another embodiment. 1... Branch circuit, 2, 12... Relay switch,
3, 3'... Transmission signal processing circuit, 4... Transmission distribution circuit, 5, 5'... Transmission device, 6, 15-i...
Transmission data switching circuit, 7... Pilot generation circuit, 8, 8'... Receiving device, 9, 9'... Frame synchronization circuit, 10, 10-i... Synchronization switching circuit, 1
1, 11'... Reception signal processing circuit, 13, 21...
...reception distribution circuit, 14...pilot detection circuit,
16-i... Transmission distribution switch, 17... Branch gate, 18, 20... Selection circuit, 19-i... Reception data switching circuit.
Claims (1)
無線回路とから成るデイジタル無線通信方式の現
用と予備との切替えを行う回線切替装置におい
て、複数組の第1の信号線群の各組をそれぞれ制
御信号によつて選択し一組の第2の信号線群に接
続する複数個のデータ切替回路を備え、これら複
数個のデータ切替回路のうち第1のデータ切替回
路の前記第2の信号線群が前記予備無線回線の変
調装置または復調装置に接続され、前記第1のデ
ータ切替回路を除く各データ切替回路の前記第2
の信号線群がそれぞれ前記第1のデータ切替回路
を含む他のデータ切替回路の前記第1の信号線群
の一組と順次接続され、前記複数個のデータ切替
回路の上記以外の前記第1の信号線群がそれぞれ
前記現用または予備無線回線の入力または出力の
データ信号線群に接続され、前記第1の切替回路
を除く各データ切替回路が制御信号によつて選択
接続を行つたことを示す応答信号をこのデータ切
替回路の前記第2の信号線群が接続された前記他
のデータ切替回路の制御信号とするよう構成され
たことを特徴とする回線切替装置。1. In a line switching device that switches between active and standby in a digital wireless communication system that includes at least one standby radio line and a plurality of working radio circuits, each set of the plurality of first signal line groups is connected to a control signal. a plurality of data switching circuits selected by a group of second signal lines and connected to a set of second signal line groups; The second data switching circuit of each data switching circuit other than the first data switching circuit is connected to the modulation device or demodulation device of the backup radio channel.
are sequentially connected to one set of the first signal line groups of other data switching circuits including the first data switching circuit, and each of the first signal line groups of the plurality of data switching circuits other than the above The signal line groups are connected to the input or output data signal line groups of the working or standby wireless line, respectively, and each data switching circuit except the first switching circuit performs selective connection by a control signal. A line switching device characterized in that the line switching device is configured to use a response signal shown as a control signal for the other data switching circuit to which the second signal line group of the data switching circuit is connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10921084A JPS60251738A (en) | 1984-05-29 | 1984-05-29 | Line switching device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10921084A JPS60251738A (en) | 1984-05-29 | 1984-05-29 | Line switching device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60251738A JPS60251738A (en) | 1985-12-12 |
| JPH0356495B2 true JPH0356495B2 (en) | 1991-08-28 |
Family
ID=14504388
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10921084A Granted JPS60251738A (en) | 1984-05-29 | 1984-05-29 | Line switching device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60251738A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62176233A (en) * | 1986-01-29 | 1987-08-03 | Toshiba Corp | High speed digital communication system changeover system |
-
1984
- 1984-05-29 JP JP10921084A patent/JPS60251738A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60251738A (en) | 1985-12-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US3937882A (en) | Full-duplex communication system on a two wire line | |
| US4538264A (en) | Self-repairing ring communications network | |
| US4967406A (en) | Subsignal transmitting system | |
| JPS6377235A (en) | Switching system for digital communication system | |
| CN101291160A (en) | Microwave optical fiber link backup system and its backup method | |
| JPS60251738A (en) | Line switching device | |
| JPS63252047A (en) | Digital radio transmission system | |
| JP2637796B2 (en) | Line switching method | |
| JPH0620193B2 (en) | Line monitoring method | |
| US1594727A (en) | Multiplex telegraph system | |
| JPS6294032A (en) | Delay correction system | |
| JPH047619B2 (en) | ||
| KR950000335B1 (en) | Hitless switching circuit of miicrowave radio system | |
| JP2674569B2 (en) | Space diversity receiver circuit | |
| SU403117A1 (en) | THE DEVICE OF COMMUTATION OF THE KNOT OF AUTOMATIC COMMUTATION OF THE SYSTEM OF THE FAR COMMUNICATION | |
| JP2616695B2 (en) | Line switching device | |
| JPS58191560A (en) | Connecting system of common line signal in digital exchange | |
| JPS616934A (en) | Supervisory system of standby system | |
| JPS611123A (en) | Transmission changeover circuit | |
| KR19990060525A (en) | Synchronous Clock Extraction Device for Wireless Data Service System | |
| JPS61144942A (en) | Line switching system in loop data transmission line | |
| JPH0666761B2 (en) | Line switching method | |
| JPH0117625B2 (en) | ||
| JPS62164348A (en) | Relay coupling device | |
| JPH0250661B2 (en) |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |