JPH0357077Y2 - - Google Patents
Info
- Publication number
- JPH0357077Y2 JPH0357077Y2 JP1982057159U JP5715982U JPH0357077Y2 JP H0357077 Y2 JPH0357077 Y2 JP H0357077Y2 JP 1982057159 U JP1982057159 U JP 1982057159U JP 5715982 U JP5715982 U JP 5715982U JP H0357077 Y2 JPH0357077 Y2 JP H0357077Y2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- circuit
- power supply
- capacitor
- memory circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Power Sources (AREA)
- Stand-By Power Supply Arrangements (AREA)
Description
【考案の詳細な説明】
技術分野
この考案は電源装置に関し、特に記憶回路のた
めのいわゆるバツクアツプ用電源を含む電源装置
に関する。DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a power supply device, and more particularly to a power supply device including a so-called backup power supply for a memory circuit.
背景技術
記憶回路を有する回路システムにおいて、停電
等に起因して装置への交流電源が一時的に断とな
ると、当該記憶回路の内容が消失する場合が生ず
る。従つて、記憶回路専用のいわゆるバツクアツ
プ電源が必要となる。第1図はかかるバツクアツ
プ電源機能を有する極めて簡単な回路構成を示す
図である。BACKGROUND ART In a circuit system having a memory circuit, when AC power to the device is temporarily cut off due to a power outage or the like, the contents of the memory circuit may be lost. Therefore, a so-called backup power supply dedicated to the memory circuit is required. FIG. 1 is a diagram showing an extremely simple circuit configuration having such a backup power supply function.
図において、交流入力電源は整流器1において
整流され、平滑コンデンサ2により平滑化され
る。この平滑出力は安定化回路3において一定の
直流レベルを有する電圧とされ、一方向性ダイオ
ード4を経て記憶回路5の動作電源となる。この
動作電源電圧により充電されるコンデンサ(蓄電
素子)6が設けられており、電源の一時断時にお
いてバツクアツプ電源として動作するものであ
る。尚、記憶回路5の内容を表示する表示回路7
が設けられており、安定化回路3による直流電圧
がこの表示回路7の動作電源となつている、8は
信号線を示している。ダイオード4により、記憶
回路のバツクアツプ電源6から表示回路7への電
源供給を防止するようにしている。 In the figure, an AC input power source is rectified by a rectifier 1 and smoothed by a smoothing capacitor 2. This smoothed output is made into a voltage having a constant DC level in the stabilizing circuit 3, and becomes an operating power source for the memory circuit 5 through the unidirectional diode 4. A capacitor (storage element) 6 is provided which is charged by this operating power supply voltage, and operates as a backup power supply when the power supply is temporarily interrupted. Furthermore, a display circuit 7 for displaying the contents of the memory circuit 5
is provided, and the DC voltage from the stabilizing circuit 3 serves as the operating power source for the display circuit 7. Reference numeral 8 indicates a signal line. The diode 4 prevents power from being supplied to the display circuit 7 from the backup power supply 6 of the storage circuit.
バツクアツプ電源の容量増大を図るには、コン
デンサ7の容量増大を図る方法や電源回路の平滑
コンデンサ2の容量増大を図る方法などが考えら
れるが、コンデンサの容量を増せばそれだけ装置
の大型化及び高価格化を招来する。 In order to increase the capacity of the backup power supply, methods such as increasing the capacity of the capacitor 7 or smoothing capacitor 2 in the power supply circuit can be considered, but the larger the capacitor capacity, the larger the device becomes. This will lead to priceization.
また、ダイオード4を用いてバツクアツプ電源
6と表示回路7とを分離してはいるが、電源の一
時断の場合に電源回路2,3の回路時定数によつ
て表示器7がオフとなるまでの間は、バツクアツ
プ電源6の電力消費をもたらす。よつて、できる
限りバツクアツプ電源6の容量を大とすることが
望まれるが、この容量増大は上述した欠点が伴う
ものである。 In addition, although the backup power supply 6 and the display circuit 7 are separated using the diode 4, when the power supply is temporarily cut off, the circuit time constant of the power supply circuits 2 and 3 prevents the display 7 from being turned off. During this time, the backup power supply 6 consumes power. Therefore, it is desirable to increase the capacity of the backup power supply 6 as much as possible, but this increase in capacity is accompanied by the above-mentioned drawbacks.
考案の概要
本考案の目的は、コンデンサの容量増大を必要
とすることなく記憶回路のバツクアツプ電源の容
量増大を可能とした電源装置を提供することであ
る。Summary of the invention An object of the invention is to provide a power supply device that allows the capacity of a backup power supply for a storage circuit to be increased without requiring an increase in the capacity of a capacitor.
本考案による電源装置においては、記憶回路以
外の回路システムのための電圧源における整流平
滑の電圧をバツクアツプ電源用コンデンサに印加
重畳して、実質的にバツクアツプ電源容量を増大
する構成となつている。 In the power supply device according to the present invention, the rectified and smoothed voltage in the voltage source for the circuit system other than the memory circuit is applied to the backup power supply capacitor and is applied to the backup power supply capacitor to substantially increase the backup power supply capacity.
実施例 以下に本考案につき図面を用いて説明する。Example The present invention will be explained below using the drawings.
第2図は本考案の一実施例の回路図であり、第
1図と同等部分は同一符号により示されており、
その説明は省略する。記憶回路5や表示回路7の
他に別の回路システム(図示せず)が一般に存在
するから、この他の回路システムのための電源が
設けられているのが普通である。この電源は、図
示する如く、交流入力電源を整流する整流器9
と、平滑コンデンサ10と、電圧安定化回路11
とを有している。この電源電圧は、記憶回路5の
ための電源電圧よりも一般に高く設定されている
こから、平滑コンデンサ10の端子をスイツチン
グ用PNPトランジスタ16を介してバツクアツ
プ電源用コンデンサ6の端子へ接続し、電源断時
にスイツチングトランジスタ16をオンして制御
してコンデンサ10と6とを並列として両コンデ
ンサの充電電荷を加算重畳するようにしている。
このとき、コンデンサ6はより高い充電電圧を有
する平滑コンデンサ10と並列接続されたことと
等価となり、これら並列接続コンデンサの充電電
荷は第1図の場合に比して増大するから、増大し
た電荷により記憶回路5への電圧供給がなされる
ことになる。トランジスタ16のオンオフ制御は
制御回路14によつてなされ、制御回路14は停
電等による電源断を検出したとき瞬時にトランジ
スタ16のベースを接地電位とし、通常動作時に
は高レベルの電圧をトランジスタ16のベースへ
付与してこれをオフに制御する。 FIG. 2 is a circuit diagram of an embodiment of the present invention, and parts equivalent to those in FIG. 1 are designated by the same symbols.
The explanation will be omitted. Since there is generally another circuit system (not shown) in addition to the memory circuit 5 and display circuit 7, a power supply for this other circuit system is usually provided. This power source is connected to a rectifier 9 that rectifies the AC input power source as shown in the figure.
, smoothing capacitor 10, and voltage stabilizing circuit 11
It has Since this power supply voltage is generally set higher than the power supply voltage for the memory circuit 5, the terminal of the smoothing capacitor 10 is connected to the terminal of the backup power supply capacitor 6 via the switching PNP transistor 16, and the power supply voltage is set higher than that for the memory circuit 5. When the power is off, the switching transistor 16 is turned on and controlled, and the capacitors 10 and 6 are connected in parallel to add and superimpose the charges of both capacitors.
At this time, it is equivalent to connecting the capacitor 6 in parallel with the smoothing capacitor 10 having a higher charging voltage, and since the charging charges of these parallel-connected capacitors increase compared to the case of FIG. 1, the increased charges Voltage will be supplied to the memory circuit 5. The on/off control of the transistor 16 is performed by the control circuit 14. When the control circuit 14 detects a power outage due to a power outage or the like, the control circuit 14 instantly sets the base of the transistor 16 to the ground potential, and during normal operation, applies a high level voltage to the base of the transistor 16. to control this off.
尚、上記各実施例において表示回路7が付加さ
れている場合について述べたが、本考案は当該表
示回路が無い場合にも適用可能であり、また表示
回路の動作電源として記憶回路以外の回路システ
ムの電源回路から供給する如き方式の場合にも適
用され得るものである。要は、バツクアツプ用電
源のコンデンサ又は記憶回路のための供給電源の
平滑コンデンサに他の電源の平滑出力を加算する
ようにすることに特徴があるものである。 In each of the above embodiments, the case where the display circuit 7 is added has been described, but the present invention can also be applied to a case where the display circuit is not provided, and the present invention can also be applied to a circuit system other than the memory circuit as the operating power source of the display circuit. The present invention can also be applied to a system in which the power is supplied from a power supply circuit. The key point is that the smoothed output of another power source is added to the capacitor of the backup power source or the smoothing capacitor of the power supply for the storage circuit.
考案の効果
このように、本考案によれば、記憶回路のバツ
クアツプ電源の容量を何等コンデンサの容量を増
大することなく大とすることができるので、小型
で低価格の電源装置が可能となる。Effects of the Invention As described above, according to the present invention, the capacity of the backup power supply of the memory circuit can be increased without any increase in the capacitance of the capacitor, so that a small and low-cost power supply device can be realized.
特に、バツクアツプ状態(例えば、マイコンの
スタンバイ状態)に入るまでは、記憶回路の消費
電流が大きく、電流遮断直後には一時的に電圧降
下が大きくなることから、本考案のように、電圧
安定化回路11に入力される充分に高い電圧を利
用し、電源遮断直後の電圧降下を防ぐようにする
ことにより、完全にバツクアツプ状態に入るまで
の電圧降下を抑制できるため、バツクアツプ時間
を長くできるのである。 In particular, the current consumption of the memory circuit is large until it enters the backup state (for example, the standby state of a microcomputer), and the voltage drop temporarily becomes large immediately after the current is cut off. By using a sufficiently high voltage input to the circuit 11 to prevent a voltage drop immediately after the power is turned off, it is possible to suppress the voltage drop before entering the complete backup state, thereby increasing the backup time. .
第1図は従来の電源回路の概略ブロツク図、第
2図は本考案の実施例の回路ブロツク図である。
主要部分の符号の説明、2,10……平滑コン
デンサ、5……記憶回路、6……バツクアツプ電
源用コンデンサ。
FIG. 1 is a schematic block diagram of a conventional power supply circuit, and FIG. 2 is a circuit block diagram of an embodiment of the present invention. Explanation of symbols of main parts, 2, 10...Smoothing capacitor, 5...Memory circuit, 6...Backup power supply capacitor.
Claims (1)
と、交流入力電圧を整流する第1、第2整流部
と、前記第1、第2整流部の各出力電力を平滑す
る第1、第2平滑コンデンサと、前記第1平滑コ
ンデンサの出力電圧を受けて前記回路システムへ
動作電圧を供給する第1電圧源と、前記第2平滑
コンデンサの出力電圧を受けて前記記憶回路へ前
記第1平滑コンデンサの出力電圧より低い動作電
圧を供給する第2電圧源と、前記第2電圧源によ
り充電され前記記憶回路のバツクアツプ用電源と
なるバツクアツプコンデンサと、前記交流入力電
圧の断時に前記第1平滑コンデンサの出力電圧を
前記バツクアツプコンデンサに印加重畳する一方
向性スイツチング回路とを備えたことを特徴とす
る電源装置。 a memory circuit, a circuit system other than the memory circuit, first and second rectifiers that rectify the AC input voltage, and first and second smoothing capacitors that smooth the respective output powers of the first and second rectifiers. a first voltage source that receives the output voltage of the first smoothing capacitor and supplies an operating voltage to the circuit system; and a first voltage source that receives the output voltage of the second smoothing capacitor and supplies the output of the first smoothing capacitor to the memory circuit. a second voltage source that supplies an operating voltage lower than the operating voltage; a backup capacitor that is charged by the second voltage source and serves as a backup power source for the memory circuit; and an output of the first smoothing capacitor when the AC input voltage is interrupted. A power supply device comprising: a unidirectional switching circuit that applies and superimposes a voltage to the backup capacitor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5715982U JPS58159030U (en) | 1982-04-20 | 1982-04-20 | power supply |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5715982U JPS58159030U (en) | 1982-04-20 | 1982-04-20 | power supply |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58159030U JPS58159030U (en) | 1983-10-24 |
| JPH0357077Y2 true JPH0357077Y2 (en) | 1991-12-25 |
Family
ID=30067637
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5715982U Granted JPS58159030U (en) | 1982-04-20 | 1982-04-20 | power supply |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58159030U (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| IT1215279B (en) * | 1985-06-10 | 1990-01-31 | Ates Componenti Elettron | ELECTRONIC INTELLIGENT POWER DEVICE WITH MONOLITHIC INTEGRATED CIRCUIT. |
| JPH0333170Y2 (en) * | 1986-04-11 | 1991-07-15 | ||
| JP6175257B2 (en) * | 2013-03-22 | 2017-08-02 | 能美防災株式会社 | Fire detector |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50116303U (en) * | 1973-10-23 | 1975-09-22 | Tokyo Shibaura Electric Co | Power supply circuit for CMOS storage device |
| JPS5734743A (en) * | 1980-08-04 | 1982-02-25 | Mitsubishi Electric Corp | Power interruption compensating device |
-
1982
- 1982-04-20 JP JP5715982U patent/JPS58159030U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58159030U (en) | 1983-10-24 |
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