JPH0357436B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a method for driving sound signal generation and sound generation in an alarm clock that emits sounds. BACKGROUND ART Conventionally, as a sound generating device for a watch, a striking sound generating device using a bar bell or a hemispherical bell, and an electronic sound generating device using a pulse voltage to drive a sounding body have been used. As a result of the development of electronic technology in recent years, it has become possible to realize an analog signal generator in a small volume by using a digital data storage element using a semiconductor IC and a digital/analog converter, and it is now possible to synthesize audio data using an ultra-compact computer. It has also become possible. However, there is a constraint that the watch must be extremely compact, and the sound generating device must operate stably at low voltage and consume low power. The present invention improves conventional sound generating devices to provide a sound generating device that operates stably at low voltage and reduces power consumption in the circuit. DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to the drawings, FIG. 1 is a block diagram of a conventional sound generating device. The control circuit 1 compares the data input from the input device 2 with the output of the clock circuit 3 in advance.
The ability to search the data in ROM 5 according to the procedure recorded in ROM 4 and transfer it to the speech synthesis circuit 6;
It has a function of turning on and off the power to the ROM 5, voice synthesis circuit 6, D/A converter 7, high-frequency cutoff filter 8, and power amplifier 9. The speech synthesis circuit 6 has a function of generating digital speech data based on the input data from the control circuit 1, for example.
PARCORDER method, LPC (linear predictive coding), cepstral method, etc. have been put into practical use.
The D/A converter 7 has a function of converting digital audio data generated by the audio synthesis circuit 6 into an analog signal. The analog sound signal generated by the D/A converter 7 is sent to a power amplifier 9 after noise components due to sampling included in the high frequency band are removed by a high frequency cutoff filter 8 . 10
is a sounding body that emits sound driven by the power amplifier 9 into the air or water. Figure 2 shows the principle of a conventionally used current addition D/A converter using a load resistor.The details of the operating principle can be found in, for example, the Electronic Communication Handbook (edited by the Institute of Electronics and Communication Engineers, published in 1972). Figure 2 is quoted from the same document. In the circuit shown in FIG. 2, the electronic switch group 21 switches the terminals of the ladder resistor group 22 to either the reference voltage source 23 or the ground potential 24 according to the data input to the digital signal input terminal group 20. A current proportional to the digital input flows through the resistor 25, and a voltage proportional to the digital input is generated at the output terminal. The magnitude of each resistance in the ladder resistance group 22 must be a value proportional to the weighting of each terminal in the digital signal input terminal group 20. 26 is an operational amplifier. FIG. 3 is an example of a configuration circuit of an electronic switch in the D/A converter shown in FIG. 33 and 34 to the saturation region, the terminal of the ladder resistor 35 is switched between the potential of the reference voltage source 32 and the ground potential 36. The accuracy of a current adding type D/A converter using a load resistor and an electronic switch is determined by the relative error in the ladder resistance value and the relative difference in the saturation voltage of the transistor in the electronic switch. These elements can operate well when the power supply voltage is relatively high, 10 volts or more, but like a clock, the operating voltage margin of semiconductor elements is small when operating at a low voltage of 1.3 to 3 volts. , the influence of variations in saturation voltage of transistors on accuracy becomes relatively large. Furthermore, at low voltages, the linearity of the operational amplifier 26 deteriorates, making it difficult to manufacture a D/A converter that operates accurately and stably at low power supply voltages. FIG. 4 is a circuit example of the power amplifier shown in FIG. 1, which is a conventionally used class B amplifier.
Although class B amplifiers have better circuit efficiency than class A amplifiers, on the other hand, they generate crossover distortion because the transistors are operated close to the cutoff point. When the power supply voltage is low, the base of the transistor
As a result, the non-linear region in the collector current characteristics when changing the collector voltage increases relative to the power supply voltage and the maximum output voltage of the amplifier.
Not only does the distortion characteristic of the amplifier deteriorate significantly, but also disadvantages occur, such as the fact that signals with very small amplitudes are not transmitted. In order to overcome this drawback, conventional methods have been used to shift the operating point of the transistor to a linear region by flowing a bias current, but this results in an increase in current consumption, and This results in a significant loss of the high efficiency that is the advantage of FIG. 4 shows an example of the circuit of a conventionally used class B amplifier, in which 40 is a preamplification transistor, 41 and 42 are diodes and variable resistors for bias adjustment, and 43 and 44 are The output transistor 45 is a sounding body. FIG. 5 is an explanatory diagram of crossover distortion using a sine wave output as an example, where 50 is an undistorted sine wave, 5
1 and 52 indicate outputs having crossover distortion. FIG. 6 is a block diagram showing an embodiment of the present invention, which includes a control circuit 1, an input device 2, a clock circuit 3,
The operations of the ROMs 4 and 5 and the speech synthesis circuit 6 are the same as those of the conventional speech generator shown in FIG. Reference numeral 11 denotes a pulse width modulation circuit, which generates a pulse train having a constant repetition period and a pulse width proportional to the digital input data, based on the digital audio data inputted from the audio synthesis circuit 6. The pulse train may be of two independent systems, positive and negative, depending on the polarity of the digital data, or may have positive and negative voltage amplitudes. Reference numeral 12 denotes a pulse amplifier, which drives the sounding body 10 with positive and negative pulse voltages based on the output of the pulse width modulation circuit 11.
The drive uses a BTL connection that allows for a large effective value of the output voltage. The present invention converts digital audio data into a pulse width modulated signal by generating pulses whose width is proportional to the digital data value and whose period at the center of the pulse is constant. FIG. 7 corresponds to blocks 11 and 12 in FIG. 6, and is an example of a pulse width modulation circuit according to the present invention. 6-bit digital audio data is input to the right input terminals 60 to 65, and the pulse width modulated audio signal is input to the flip-flop 9 at the lower center.
6 is output from the Q terminal. Digital audio data is defined as a 6-bit binary number as shown in Table 1 below. The most significant bit (MSB) represents the polarity of the output signal, with 1 being positive polarity and 0 being negative polarity. The lower 5 bits represent the magnitude of the signal and are normal positive binary numbers, but negative numbers represent the absolute value of the binary number, and each bit is inverted. It is defined that it is expressed as a sequence of numbers with 0 as the number.

【table】

Claims (1)

[Scope of Claims] 1. In an audio clock equipped with a clock mechanism, a digital storage element, a digital audio generation circuit, and a sounding body as an electro-mechanical converter, the digital audio generation circuit has a pulse width whose center time interval is constant and which generates pulses. An audio clock comprising a pulse width modulation circuit that outputs a pulse train whose width is proportional to digital input data, and a pulse amplifier that amplifies the output pulse train, and that a sounding body is directly driven by the output of the pulse amplifier. 2. In the audio clock according to claim 1, the pulse width modulation circuit includes a latch circuit that stores digital input data having code digits according to a trigger signal, a counting circuit that counts clock signals, and the latch circuit data. a group of gates that compares the part excluding the code digit with the count value of the counting circuit, detects the moment when all the corresponding digits match and the moment when all the corresponding digits differ, and outputs a detection signal; the code digit of the digital input data; and the value of the most significant digit of the counting circuit, and by setting or resetting a flip-flop with the detection signal, the central time interval of the pulse width can be adjusted. An audio clock characterized in that it generates a pulse train whose pulse width is constant and proportional to digital input data. 3. In the audio clock according to claim 1, the pulse amplifier switches the drive voltage direction of the sounding body according to the polarity of the input pulse, and also has a gate that short-circuits the terminals of the sounding body in a state where there is no pulse. A voice clock featuring a transistor.