JPH0360095A - Manufacture of multilayer printed circuit board - Google Patents

Manufacture of multilayer printed circuit board

Info

Publication number
JPH0360095A
JPH0360095A JP19492789A JP19492789A JPH0360095A JP H0360095 A JPH0360095 A JP H0360095A JP 19492789 A JP19492789 A JP 19492789A JP 19492789 A JP19492789 A JP 19492789A JP H0360095 A JPH0360095 A JP H0360095A
Authority
JP
Japan
Prior art keywords
boards
printed wiring
vessel
wiring board
opposed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19492789A
Other languages
Japanese (ja)
Inventor
Osamu Teshigawara
勅使河原 治
Hidenori Takahashi
英紀 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Radio Co Ltd
Original Assignee
Japan Radio Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Radio Co Ltd filed Critical Japan Radio Co Ltd
Priority to JP19492789A priority Critical patent/JPH0360095A/en
Publication of JPH0360095A publication Critical patent/JPH0360095A/en
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To omit through hole forming, patterning process after multilayers are formed, and to eliminate troubles such as smear malfunction, oxidation of inner layer conductors by forming a conductive part at arbitrary opposed positions on the conductors of a printed circuit board, superposing the opposed parts, heating while pressurizing, or heating and ultrasonically vibrating to adhere them, and filling adhesive liquid between the opposed faces by vacuum immersing. CONSTITUTION:Through holes 15, 19, and copper foil layers 13, 14, 17, 18 of patterns required for both both-side printed circuit boards 12, 16 are formed thereon. The boards are held by upper and lower flat stainless steel plates by opposing the bumps, and heated while pressurizing. Then, opposed solder bumps 20 are fusion-adhered while being collapsed by the pressurizing, and the boards 12, 16 are adhered by solder bump fusion-adhering 21. Then, the boards are placed in a vacuum vessel 22, the vessel is evacuated completely, a resin supply port 24 is opened whole holding a vacuum state, and adhesive resin liquid 25 is filled in the vessel 22 until the boards are dipped. Then, when the vessel 22 is returned to the atmospheric pressure, the liquid 25 is filled in the gap of the bump connecting faces and the holes 15.

Description

【発明の詳細な説明】 (産業上の利用分野) 多層プリント配線基板の層間導体接続及び層間接着に係
る製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Field of Application) The present invention relates to a manufacturing method related to interlayer conductor connection and interlayer adhesion of a multilayer printed wiring board.

(従来の技術) 第2図(a)、(b)及び(c)に従来の多層プリント
配線基板の一例として、4層プリント配線基板の製造方
法の断面図を示す。
(Prior Art) FIGS. 2(a), 2(b), and 2(c) show cross-sectional views of a method for manufacturing a four-layer printed wiring board as an example of a conventional multilayer printed wiring board.

同図において1は上部片面プリント配線基板、2は上部
片面プリント基板1上の銅箔層、3は下部片面プリント
配線基板、4は下部片面プリント基板3上の銅箔層、5
は内部両面プリント配線基板、6は内部両面プリント配
線基板5上の上部パターン、7は内部両面プリント配線
基板5上の下部パターン、8は層間接着シート、9は層
間接着層、10はスルーホール下穴、11は層間導通接
続用スルーホールを示す。
In the figure, 1 is the upper single-sided printed wiring board, 2 is the copper foil layer on the upper single-sided printed wiring board 1, 3 is the lower single-sided printed wiring board, 4 is the copper foil layer on the lower single-sided printed wiring board 3, and 5 is the copper foil layer on the lower single-sided printed wiring board 3.
is an internal double-sided printed wiring board, 6 is an upper pattern on the internal double-sided printed wiring board 5, 7 is a lower pattern on the internal double-sided printed wiring board 5, 8 is an interlayer adhesive sheet, 9 is an interlayer adhesive layer, and 10 is the bottom of the through hole. Hole 11 indicates a through hole for interlayer conduction connection.

第2図(a)は接着前の構成を表わしている断面図で、
内部両面プリント配線基板5は銅箔層6゜7の厚さをス
ルーホール信頼性確保のため一般に70timを使い、
通常の両面プリント配線基板と同様に、必要な両面パタ
ーンを形成したものである。この両面プリント配線基板
5の上下をプリプレグと呼ばれる層間接着シート8を挟
んで片面プリント配線基板1,3を重ねる。この段階で
は片面プリント配線基板1,3の銅箔層2,4はパター
ン化されていない。又、銅箔層2.4の厚さは製造から
の制約はなく一般に使われる18〜35μmの厚さで十
分である。こうして重ねられたものの上下を後の加圧・
加熱に耐え得るステンレスなどの平板(図示せず)で挟
み、例えば、エポキシ樹脂系では170°C,30Kg
f 7cm2.90分間の加圧・加熱により硬化させ層
間接着を行う。この後第2図(b)に示すように層間導
通接続のためにスルーホールの下穴10をあける。穴明
は後は第2図(C)に示すように通常の両面プリント配
線基板と同様メツキにより銅を析出させ眉間の導通を得
て層間接続用スルーホール11を完成させる。
Figure 2(a) is a cross-sectional view showing the configuration before bonding.
The internal double-sided printed wiring board 5 has a copper foil layer with a thickness of 6°7, generally using 70tim to ensure through-hole reliability.
Like a normal double-sided printed wiring board, the required double-sided patterns are formed. Single-sided printed wiring boards 1 and 3 are stacked on top and bottom of this double-sided printed wiring board 5 with an interlayer adhesive sheet 8 called prepreg in between. At this stage, the copper foil layers 2 and 4 of the single-sided printed wiring boards 1 and 3 are not patterned. Further, the thickness of the copper foil layer 2.4 is not limited by manufacturing restrictions, and a commonly used thickness of 18 to 35 μm is sufficient. After applying pressure to the top and bottom of the stacked items,
Sandwiched between stainless steel plates (not shown) that can withstand heating, for example, 170°C and 30 kg for epoxy resin.
f 7cm2.Cure by applying pressure and heating for 90 minutes to form interlayer adhesion. Thereafter, as shown in FIG. 2(b), a pilot hole 10 for a through hole is made for interlayer conductive connection. After drilling the holes, as shown in FIG. 2(C), copper is deposited by plating in the same way as for ordinary double-sided printed wiring boards to obtain conduction between the eyebrows and to complete the through-holes 11 for interlayer connection.

さらに上下鋼箔層2,4は、この後パターン化されて、
プリント配線基板が出来上がる。
Furthermore, the upper and lower steel foil layers 2 and 4 are then patterned,
The printed wiring board is completed.

(発明が解決しようとする課題) 従来多層プリント配線基板において、眉間の導体接続を
得る方法としてはスルーホールによる方法が用いられて
いる。しかし、従来方式では、多層化の層間接着を行っ
た後に、眉間の導通接続を取るためのスルーホール形成
を行うため、スルーホール加工でのスメア不良、あるい
はメツキやパターニング処理にともなうウェット処理液
のために、内層へメツキ液等の処理がしみこみ、内層導
体の劣化を早める悪影響がある。さらに、層間に空気層
が残り後工程での加熱時に空気層の膨張で層間はがれが
生じる等の欠点がある。本発明はこうした欠点を解決す
る方法を提供するものである。
(Problems to be Solved by the Invention) Conventionally, in multilayer printed wiring boards, a method using through holes has been used as a method for obtaining conductor connections between the eyebrows. However, in the conventional method, after performing interlayer adhesion for multilayering, through-holes are formed to establish a conductive connection between the eyebrows. As a result, treatments such as plating liquid seep into the inner layer, which has the adverse effect of accelerating deterioration of the inner layer conductor. Furthermore, there are drawbacks such as an air layer remaining between the layers and peeling between the layers due to expansion of the air layer during heating in a post-process. The present invention provides a method to overcome these drawbacks.

(課題を解決するための手段) 本発明ではプリント配線基板の導体上の任意の対向する
箇所に導電部を形成して、この対向面を重ね合せ、加圧
しながら加熱、あるいは加熱と超音波振動を与えて接合
させ、真空含浸により接着液を対向面間に充填させるよ
うにしたものである。
(Means for Solving the Problems) In the present invention, conductive portions are formed at arbitrary opposing locations on the conductor of a printed wiring board, the opposing surfaces are overlapped, and heated while pressurizing, or heated and ultrasonic vibration. The adhesive liquid is filled between the opposing surfaces by vacuum impregnation.

(実施例) 第1図(a)〜(d)に本発明による4層プリント配線
基板の一実施例を断面図で示す。同図において、12は
両面プリント配線基板、13.14は両面プリント配線
基板12上のパターン化された銅箔層、15は両面プリ
ント配線基板12上の両面パターンを導通接続するため
のスルーホール、16は両面プリント配線基板、17.
18は両面プリント配線基板16上のパターン化された
銅箔層、19は両面プリント配線基板上の両面パターン
を導通接続するためのスルーホール、20は半田バンプ
、21は半田バンプ融合、22は真空容器、23は排気
口、24は樹脂供給口、25は接着樹脂液を示す。
(Example) FIGS. 1(a) to 1(d) show cross-sectional views of an example of a four-layer printed wiring board according to the present invention. In the figure, 12 is a double-sided printed wiring board, 13.14 is a patterned copper foil layer on the double-sided printed wiring board 12, 15 is a through hole for electrically connecting the double-sided patterns on the double-sided printed wiring board 12, 16 is a double-sided printed wiring board; 17.
18 is a patterned copper foil layer on the double-sided printed wiring board 16, 19 is a through hole for electrically connecting the double-sided patterns on the double-sided printed wiring board, 20 is a solder bump, 21 is a solder bump fusion, and 22 is a vacuum. 23 is an exhaust port, 24 is a resin supply port, and 25 is an adhesive resin liquid.

第1図(a)において、両面プリント配線基板12.1
6はどちらも必要なスルーホール15゜19や両面パタ
ーンの銅箔N13,14.17゜18を形成した通常の
両面プリント基板である。
In FIG. 1(a), a double-sided printed wiring board 12.1
6 is a normal double-sided printed circuit board on which necessary through holes 15.degree. 19 and double-sided patterned copper foils N13 and 14.17.degree. 18 are formed.

両面パターンの銅箔層13,14.17.18の厚さは
制約がなく、通常用いられている18〜35μmで十分
である。この両面プリント配線基板12.16の対向す
る面の銅箔層14.17上の4通接続箇所に半田バンプ
20を、例えば、クリーム半田の印刷、半田リフローに
より形成する。半田は一般的な共晶半田を用いる。
There are no restrictions on the thickness of the copper foil layers 13, 14, 17, and 18 of the double-sided pattern, and the commonly used thickness of 18 to 35 μm is sufficient. Solder bumps 20 are formed at four connection points on the copper foil layer 14.17 on the opposing side of the double-sided printed wiring board 12.16 by, for example, printing cream solder or solder reflow. General eutectic solder is used for the solder.

こうして得られた基板を第1図(a)に示すようにバン
プ同士向かい合わせて、上下を平らなステンレス板(図
示せず)などで挟み、加圧しながら加熱する。条件は半
田融点を越えた温度2200が必要である。次に第1図
(b)で示すように、この時に対向した半田バンプ20
は加圧のため押しつぶされながら融合し半田バンプ融合
21が得られる。この状態では向い合わせた両面プリン
ト配線基板12.16が半田バンプ融合21で接着され
ている事になる。
The thus obtained substrate is placed with the bumps facing each other as shown in FIG. 1(a), the top and bottom are sandwiched between flat stainless steel plates (not shown), etc., and heated while being pressurized. The conditions require a temperature of 2200°C which exceeds the solder melting point. Next, as shown in FIG. 1(b), the solder bumps 20 facing each other at this time
The solder bumps are fused while being crushed due to pressure, and a solder bump fusion 21 is obtained. In this state, the facing double-sided printed wiring boards 12 and 16 are bonded together by solder bump fusion 21.

次に真空含浸を行なう。第1図(c)はこの様子を示す
もので、真空容器22の中に基板を置き、樹脂供給口2
4を締め排気口23を開けて真空ポンプ(図示せず)で
排気を行なう。排気完了後第1図(d)に示すように真
空状態を保ったまま樹脂供給口24を開けて真空容器2
2内に接着樹脂液25を基板が浸漬するまで充填する。
Next, vacuum impregnation is performed. FIG. 1(c) shows this situation, in which the substrate is placed in the vacuum container 22 and the resin supply port 2
4, open the exhaust port 23, and perform exhaustion using a vacuum pump (not shown). After the evacuation is completed, the resin supply port 24 is opened and the vacuum container 2 is opened while maintaining the vacuum state, as shown in FIG. 1(d).
2 is filled with adhesive resin liquid 25 until the substrate is immersed.

その後真空容器22内を大気圧に戻すと、その時点のバ
ンプ接続面のすき間、スルーホール15内に接着樹脂1
皮25が充填される。バンプ接続面のすき間はプリント
配線基板の銅箔の厚さとバンプの高さによるが、数10
〜100μm程度のため基板を接着樹脂液25内から取
り出してもすき間の接着樹脂は充填されたままである。
After that, when the inside of the vacuum container 22 is returned to atmospheric pressure, the adhesive resin 1
The skin 25 is filled. The gap between the bump connection surfaces depends on the thickness of the copper foil on the printed wiring board and the height of the bump, but it is several tens of thousands.
Since the thickness is approximately 100 μm, even if the substrate is taken out from the adhesive resin liquid 25, the adhesive resin in the gap remains filled.

またスルーホール15内も表面張力により接着樹脂液2
5で満たされている。従って充填後は基板を取り出して
不要部の接着樹脂液25を拭い、接着樹脂液25を硬化
させて層間接着を完了する。
Also, the inside of the through hole 15 is also covered with adhesive resin liquid 2 due to surface tension.
It is filled with 5. Therefore, after filling, the substrate is taken out, unnecessary portions of the adhesive resin liquid 25 are wiped, and the adhesive resin liquid 25 is cured to complete interlayer adhesion.

以上の例はプリント配線基板2枚を張り合わせた例であ
るが、3枚以上の張り合わせでも同様の事が可能である
。すなわち対向する面の半田バンプの形成と半田バンプ
の融合とを全層−度にあるいは一対向面毎に行なうこと
で多層化の基板ができ、以下は第1図(c)、 (d)
の工程を行なうことで得られる。また一対向面毎に接着
樹脂の含浸、硬化を行なうことも可能である。この際、
必要な箇所には樹脂が濡れないようにテーピング等の目
張りも効果がある。
Although the above example is an example in which two printed wiring boards are pasted together, the same thing is possible when three or more boards are pasted together. That is, by forming solder bumps on opposing surfaces and fusing the solder bumps for all layers or for each opposing surface, a multilayered board can be created, as shown in Figures 1(c) and 1(d) below.
It can be obtained by performing the following steps. It is also possible to impregnate and harden the adhesive resin on each opposing surface. On this occasion,
It is also effective to use tape or other methods to prevent the resin from getting wet where necessary.

上記例では半田バンプを加熱で融合させる例を示したが
、同時に超音波を加えることにより加熱温度は低い状態
でも可能である。また半田バンプを導電性ペースト等を
使用しても同様の事は明らかである。
Although the above example shows an example in which solder bumps are fused by heating, it is also possible to fuse the solder bumps at a low heating temperature by simultaneously applying ultrasonic waves. It is also clear that the same problem occurs even if conductive paste or the like is used for the solder bumps.

さらに真空含浸であるが、樹脂の脱泡を兼ねて初めから
真空容器内に接着樹脂を入れて置き、基板が接着樹脂に
含浸しない位置に保持して排気を行なう。排気後、真空
状態の中で基板を接着樹脂内に浸漬し、その後真空容器
内を大気圧に戻す事で同様の樹脂含浸が得られる。ある
いは、真空容器内に接着樹脂を入れ基板を浸漬しておき
、この状態で排気をする方法でも真空含浸は行えること
は明らかである。
Furthermore, regarding vacuum impregnation, an adhesive resin is placed in a vacuum container from the beginning in order to also defoam the resin, and the vacuum container is held at a position where the substrate is not impregnated with the adhesive resin before being evacuated. After evacuation, a similar resin impregnation can be obtained by immersing the substrate in an adhesive resin in a vacuum state, and then returning the inside of the vacuum container to atmospheric pressure. Alternatively, it is clear that vacuum impregnation can be performed by placing an adhesive resin in a vacuum container, immersing the substrate, and then evacuating the container in this state.

(発明の効果) 以上の工程により多層基板が得られるため、従来の多層
基板に見られる多層化後のスルーホール加工やバターニ
ングがないため、スルーホールで問題となるスメアやメ
ツキの為のウェット処理時の内層へのしみこみによる内
層導体の酸化などの悪影響等多層化後のトラブルが解決
される。また、多層PCC間接待時空気を取り込む事が
無いため完成した多層基板の後工程での加熱による内部
気泡の膨張によるはがれ、あるいは未接着部の進行の恐
れが無い構造が得られる。すなわち、信頼性の高い多層
基板が得られる。
(Effects of the invention) Since a multilayer board can be obtained through the above process, there is no through-hole processing or buttering after multilayering, which is seen in conventional multilayer boards, and there is no need for wet smearing or plating, which is a problem with through-holes. This solves problems after multilayering, such as adverse effects such as oxidation of the inner layer conductor due to seepage into the inner layer during processing. Furthermore, since air is not taken in between the multilayer PCCs during standby, a structure is obtained in which there is no risk of peeling off due to expansion of internal air bubbles due to heating in the post-process of the completed multilayer board, or of progression of unbonded parts. That is, a highly reliable multilayer board can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(d)は本発明による4層多層基板の製
造工程の一実施例を示す断面図、第2図(a)〜(c)
は従来技術による4層多層基板の製造工程の一実施例を
示す断面図である。 1.3・・・片面プリント配線基板、2.4.6゜7・
・・銅箔層、5・・・両面プリント配線基板、8・・・
層間接着シート、9・・・層間接着層、10・・・スル
ーホール下穴、11・・・層間、接続用スルーホール、
12.16・・・両面プリント配線基板、13,14.
’17.18・・・銅箔層、15.19・・・スルーホ
ール、2o・・・半田バンプ、21  ・半田バンプ融
合、22・・・真空容器、23・・・排気口、24・・
・樹脂供給口、25・・・接着樹脂液。
FIGS. 1(a) to (d) are cross-sectional views showing one embodiment of the manufacturing process of a four-layer multilayer board according to the present invention, and FIGS. 2(a) to (c)
1 is a sectional view showing an example of a manufacturing process of a four-layer multilayer board according to the prior art. 1.3... Single-sided printed wiring board, 2.4.6°7.
...Copper foil layer, 5...Double-sided printed wiring board, 8...
Interlayer adhesive sheet, 9... Interlayer adhesive layer, 10... Through hole prepared hole, 11... Interlayer, connection through hole,
12.16...Double-sided printed wiring board, 13,14.
'17.18...Copper foil layer, 15.19...Through hole, 2o...Solder bump, 21 ・Solder bump fusion, 22...Vacuum container, 23...Exhaust port, 24...
-Resin supply port, 25...Adhesive resin liquid.

Claims (1)

【特許請求の範囲】[Claims]  プリント配線基板を複数枚重ねた多層基板において、
前記複数のプリント配線基板の導体上の任意の対向する
箇所に半田バンプを形成し、該半田バンプを重ね合せ、
前記複数のプリント配線基板の上下から加圧しながら加
熱あるいは加熱と超音波振動を加え、前記半田バンプを
融合して、前記複数のプリント配線基板を接合せしめる
手段と、該接合せしめた複数のプリント配線基板間に真
空含浸により接着液を充填させたことを特徴とする多層
プリント配線基板の製造方法。
In multilayer boards made by stacking multiple printed wiring boards,
forming solder bumps at arbitrary opposing locations on the conductors of the plurality of printed wiring boards, overlapping the solder bumps,
means for joining the plurality of printed wiring boards by applying heating or heating and ultrasonic vibration while applying pressure from above and below the plurality of printed wiring boards to fuse the solder bumps; and a plurality of printed wiring boards that are joined together. A method for manufacturing a multilayer printed wiring board, characterized in that adhesive liquid is filled between the boards by vacuum impregnation.
JP19492789A 1989-07-27 1989-07-27 Manufacture of multilayer printed circuit board Pending JPH0360095A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19492789A JPH0360095A (en) 1989-07-27 1989-07-27 Manufacture of multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19492789A JPH0360095A (en) 1989-07-27 1989-07-27 Manufacture of multilayer printed circuit board

Publications (1)

Publication Number Publication Date
JPH0360095A true JPH0360095A (en) 1991-03-15

Family

ID=16332661

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19492789A Pending JPH0360095A (en) 1989-07-27 1989-07-27 Manufacture of multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JPH0360095A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0553267U (en) * 1991-12-17 1993-07-13 日本無線株式会社 High density multilayer circuit board
US5354392A (en) * 1992-01-24 1994-10-11 Matsushita Electric Industrial Co., Ltd. Method for connecting a wiring arranged on a sheet with another wiring arranged on another sheet by ultrasonic waves

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS598396A (en) * 1982-07-07 1984-01-17 株式会社日立製作所 multilayer wiring board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS598396A (en) * 1982-07-07 1984-01-17 株式会社日立製作所 multilayer wiring board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0553267U (en) * 1991-12-17 1993-07-13 日本無線株式会社 High density multilayer circuit board
US5354392A (en) * 1992-01-24 1994-10-11 Matsushita Electric Industrial Co., Ltd. Method for connecting a wiring arranged on a sheet with another wiring arranged on another sheet by ultrasonic waves

Similar Documents

Publication Publication Date Title
US6993836B2 (en) Circuit board and method of manufacturing same
US10327340B2 (en) Circuit board, production method of circuit board, and electronic equipment
JP2556897B2 (en) Outer layer material for multilayer printed wiring board and manufacturing method
JP4040389B2 (en) Manufacturing method of semiconductor device
JP3207663B2 (en) Printed wiring board and method of manufacturing the same
KR101205464B1 (en) Method for manufacturing a printed circuit board
JP4378511B2 (en) Electronic component built-in wiring board
KR20190124616A (en) Method of manufacturing the printed circuit board
JPH0360095A (en) Manufacture of multilayer printed circuit board
JP3705370B2 (en) Manufacturing method of multilayer printed wiring board
JPH0360097A (en) Manufacture of multilayer printed circuit board
JPH07249868A (en) Method for manufacturing multilayer substrate
JPH07115268A (en) Printed wiring board and manufacturing method thereof
JPH02178995A (en) Manufacture of multilayer printed board
JP7576201B1 (en) Multilayer board manufacturing method
JP4803918B2 (en) Manufacturing method of multilayer wiring board
JP2014112722A (en) Method for manufacturing wiring board with built-in electronic component
JPH05110254A (en) Manufacture of multilayer printed wiring board
JP2001144445A (en) Manufacturing method of multilayer printed wiring board
JP4978709B2 (en) Electronic component built-in wiring board
JP2004103798A (en) Method for manufacturing two-metal tape and method for manufacturing wiring board
JPH03194998A (en) Manufacture of multilayer circuit board
JP4622939B2 (en) Circuit board manufacturing method
JPH10270851A (en) One-sided circuit board for multilayered printed wiring board, its manufacture, and multilayered printed wiring board
JP4803919B2 (en) Manufacturing method of multilayer wiring board