JPH0360141A - Probe equipment - Google Patents

Probe equipment

Info

Publication number
JPH0360141A
JPH0360141A JP1196278A JP19627889A JPH0360141A JP H0360141 A JPH0360141 A JP H0360141A JP 1196278 A JP1196278 A JP 1196278A JP 19627889 A JP19627889 A JP 19627889A JP H0360141 A JPH0360141 A JP H0360141A
Authority
JP
Japan
Prior art keywords
contact
fpc
probe
wafer
contact protrusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1196278A
Other languages
Japanese (ja)
Other versions
JP2759193B2 (en
Inventor
Shinji Iino
飯野 伸治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP1196278A priority Critical patent/JP2759193B2/en
Publication of JPH0360141A publication Critical patent/JPH0360141A/en
Application granted granted Critical
Publication of JP2759193B2 publication Critical patent/JP2759193B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Measuring Leads Or Probes (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 見呪立且奴 (産業上の利用分野) 本発明は、半導体ウェハに形成したチップを検査するた
めに用いるプローブ装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a probe device used for inspecting chips formed on a semiconductor wafer.

(従来の技術) 従来より半導体製造工程において、半導体ウェハに形成
されたチップを検査測定するため、プローブ針の後端部
をプリント基板の導体パターンに半田付けしてプローブ
カードを構成し、このプローブ針を半導体ウェハに形成
された各チップの電極パッドに接触させて各種の電気特
性をテスタで測定するようにしている。
(Prior Art) Conventionally, in the semiconductor manufacturing process, in order to inspect and measure chips formed on semiconductor wafers, a probe card is constructed by soldering the rear end of a probe needle to a conductive pattern on a printed circuit board. The tester measures various electrical characteristics by bringing a needle into contact with the electrode pads of each chip formed on a semiconductor wafer.

(発明が解決しようとする問題点) しかしながら、上記の従来例によると、最近の半導体集
積回路の高密度化、高集積化に伴って。
(Problems to be Solved by the Invention) However, according to the above-mentioned conventional example, with the recent increase in density and integration of semiconductor integrated circuits.

プローブ針の高密度化が要求され、そのためプローブカ
ードにプローブ針を組み込むのが困難であると共に、プ
ローブ針の位置決めが高精度に行なわれなければならず
、位置決めが悪いと、測定精度の低下に繋がり、高密度
化されたプローブカードの開発が要望されていた。また
、使用中にプローブ針が位置ずれを起こすため、特に、
プローブ針を用いたプローブカードは、高密度化したプ
ローブには不向きであった。
A high density of probe needles is required, which makes it difficult to incorporate the probe needles into the probe card, and the positioning of the probe needles must be performed with high precision.Poor positioning can lead to a decrease in measurement accuracy. There was a demand for the development of a probe card with high connectivity and high density. In addition, since the probe needle may become misaligned during use,
Probe cards using probe needles were not suitable for high-density probes.

本発明は、上記の実情に鑑みて開発したもので、フレキ
シブリプリント基板(以下、F・PCという)の技術に
着目し、このFPCをプローブ装置に応用することによ
り電極パッドの測定接触部をFPC・と一体化すること
により測定接触部の位置決め精度を著しく向上させ、も
って、高密度のプローブ装置に適用することができるこ
とを目的とする。
The present invention was developed in view of the above-mentioned circumstances, and focuses on the technology of flexible printed circuit boards (hereinafter referred to as FPC), and by applying this FPC to a probe device, the measurement contact part of the electrode pad can be changed to FPC. The purpose is to significantly improve the positioning accuracy of the measurement contact part by integrating it with the above, and thereby to be able to apply it to a high-density probe device.

見里生豊裟 (問題点を解決するための手段) 上記の目的を達成するため、本発明は、フレキシブルプ
リント基板を用いてプローブカードを形成する装置にお
いて、フレキシブルプリント基板を湾曲加工を施して接
触突起を形成し、この接触突起の両側縁に切り溝を形成
したものである。
Toyotoshi Misato (Means for Solving the Problems) In order to achieve the above object, the present invention provides an apparatus for forming a probe card using a flexible printed circuit board, in which the flexible printed circuit board is curved. A contact protrusion is formed, and grooves are formed on both side edges of the contact protrusion.

(作 用) 従って、本発明によると、先ず、FPCを通常の製造工
程によりポリイミドフィルム、ポリエステルフィルム等
のフィルムにパターニングし、かつエツチング工程によ
りフィルム上に銅箔等の素材から成る導体パターンを施
し1次いで、FPCにウェハの電極パッドに接触して測
定するための接触測定部を加熱、加圧処理により塑性変
形させて接触突起を一体に形成する。更に、この接触突
起の両側縁に切り溝を形成して接触突起にスプリング性
を付与し、測定位置の高低差を吸収して測定精度を高め
ている。そして、実際にウェハの電極パッドに接触させ
て測定する場合は、FPCの接触突起を電極パッドに接
触させることによってウェハの電気的特性を測定するこ
とが可能となる。
(Function) Therefore, according to the present invention, first, an FPC is patterned into a film such as a polyimide film or a polyester film through a normal manufacturing process, and a conductor pattern made of a material such as copper foil is formed on the film through an etching process. 1. Next, a contact measurement part for contacting and measuring the electrode pad of the wafer on the FPC is plastically deformed by heating and pressure treatment to integrally form a contact protrusion. Furthermore, grooves are formed on both side edges of the contact protrusion to impart spring properties to the contact protrusion, absorbing height differences in the measurement position and improving measurement accuracy. When actually making measurements by contacting the electrode pads of the wafer, it becomes possible to measure the electrical characteristics of the wafer by bringing the contact protrusions of the FPC into contact with the electrode pads.

この場合、FPCの製造技術を基礎に、プローブ装置の
導体パターンや接触突起を形成することができるので、
高密度のウェハプローブに好適である。
In this case, the conductor pattern and contact projections of the probe device can be formed based on FPC manufacturing technology, so
Suitable for high-density wafer probes.

(実施例) 本発明におけるプローブ装置の実施例を第1図乃至第7
図を参照して説明する。
(Example) Examples of the probe device according to the present invention are shown in Figures 1 to 7.
This will be explained with reference to the figures.

プローブ装置における薄膜状のプローブカード1を形成
するには、FPC2を通常の製造工程により製造する。
In order to form the thin film probe card 1 in the probe device, the FPC 2 is manufactured by a normal manufacturing process.

ポリイミドフィルム、ポリエステルフィルム等のフィル
ム3にパターニングし、更にエツチング工程によりフィ
ルム3 (FPC絶縁体ベース)上に銅箔等の素材から
成る導体パターン4を施す0次いで、FPC2にウェハ
の電極パッド(図示せず)に接触して測定するための接
触測定部を加熱、加圧処理により塑性変形させて接触突
起5を形成する。
A film 3 such as a polyimide film or a polyester film is patterned, and a conductor pattern 4 made of a material such as copper foil is formed on the film 3 (FPC insulator base) by an etching process.Next, the electrode pads of the wafer (Fig. A contact measuring portion (not shown) for contacting and measuring is plastically deformed by heating and pressure treatment to form a contact protrusion 5.

本例においては、第7図に示すように、凹状の型枠6に
FPC2を載置し、上方より凸部7を有する加熱部8を
、例えば200℃程度に加熱加圧してFPC2の一部を
第3図乃至第6図に示すように、突状に塑性変形させて
接触突起5を多数形成する。この接触突起5は、ウェハ
の電極パッドに接触して測定するための接触測定部であ
り、接触突起5の長さ方向は70μで、接触突起5同志
の頂部間隔は70μであり、高さは、40μである。更
に、接触突起5の両側縁に切り溝9を形成する。この切
り溝9は長さ100μであり、幅は20μである。
In this example, as shown in FIG. 7, the FPC 2 is placed on a concave formwork 6, and a heating section 8 having a convex portion 7 is heated and pressurized from above to, for example, about 200° C. to form a part of the FPC 2. As shown in FIGS. 3 to 6, a large number of contact protrusions 5 are formed by plastically deforming them into a convex shape. This contact protrusion 5 is a contact measurement part for contacting and measuring the electrode pad of the wafer, and the length direction of the contact protrusion 5 is 70μ, the distance between the tops of the contact protrusions 5 is 70μ, and the height is , 40μ. Furthermore, cut grooves 9 are formed on both side edges of the contact protrusion 5. This kerf 9 has a length of 100μ and a width of 20μ.

従って、接触突起5はFPC2と一体に形成され、しか
も接触突起5同志の間隙は、半導体のフォトリソグラフ
ィ技術を利用できるので、高密度の接触測定部を・高精
度に成形することができる。
Therefore, the contact protrusions 5 are formed integrally with the FPC 2, and the gaps between the contact protrusions 5 can be formed using semiconductor photolithography technology, so that a high-density contact measuring section can be formed with high precision.

この接触突起5の両側縁に切り溝9を形成して接触突起
5にスプリング性を付与し、81!I定針及び被測定パ
ッドの位置の高低差を吸収して測定精度を高めている。
Cut grooves 9 are formed on both side edges of the contact projection 5 to impart spring properties to the contact projection 5, and 81! The measurement accuracy is improved by absorbing the difference in height between the I pointer and the pad to be measured.

このFPC2を接着層10を介してガラス基板11に接
着させており、接触突起5の下面は空洞12として接着
層10を設けていない。
This FPC 2 is bonded to a glass substrate 11 via an adhesive layer 10, and the lower surface of the contact protrusion 5 is formed into a cavity 12 without the adhesive layer 10 provided therein.

次に、上記実施例の作用を説明する。Next, the operation of the above embodiment will be explained.

実際にウェハの電極パッドに接触させて測定する場合は
、プローブカード1を通常の手段によりプローブ装置に
取付け、次いで、テスタ(図示せず)にケーブルを介し
てプローブカードの接触突起5を電極パッドに接触させ
ることによってウェハの電気的特性を測定することが可
能となる。この場合、接触突起5の両側縁に切り溝9を
形成したので、接触突起5は適度の弾性を付与され、電
極パッドに接触したときに見合うような高低差をこの弾
力を有する接触突起5が吸収して測定精度を高めること
ができ、使用に際しては、接触突起5とFPC2とは一
体であるから、従来のようにプローブ針がずれたりする
恐れが全くない、更に、Fpcの製造技術を基礎に、プ
ローブ装置の導体パターンや接触突起を形成することが
できるので、高密度のウェハプローブに極めて好適であ
る。
When measuring by actually contacting the electrode pads of the wafer, the probe card 1 is attached to the probe device by normal means, and then the contact protrusion 5 of the probe card is connected to the electrode pad by a tester (not shown) via a cable. By bringing the wafer into contact with the wafer, it becomes possible to measure the electrical characteristics of the wafer. In this case, since the cut grooves 9 are formed on both sides of the contact protrusion 5, the contact protrusion 5 is given appropriate elasticity, and the contact protrusion 5 having this elasticity is able to adjust the height difference commensurately when it comes into contact with the electrode pad. The contact protrusion 5 and the FPC 2 are integrated, so there is no risk of the probe needle shifting as in the past.Furthermore, it is based on FPC manufacturing technology. In addition, the conductor pattern and contact projections of the probe device can be formed, making it extremely suitable for high-density wafer probes.

見豊生羞果 以上のことから明らかなように、本発明によると次のよ
うな優れた効果がある。
As is clear from the above, the present invention has the following excellent effects.

FPCをプローブ装置に応用することにより電極パッド
の測定接触部をFPCと一体化し、しかも、半導体のフ
ォトリソグラフィ技術を利用することができるので、位
置決め精度を著しく向上させ、もって、高密度のプロー
ブ装置に適用することができる等の効果がある。
By applying FPC to a probe device, the measurement contact part of the electrode pad can be integrated with the FPC, and semiconductor photolithography technology can be used, so positioning accuracy can be significantly improved, and high-density probe devices can be used. It has such effects that it can be applied to

【図面の簡単な説明】[Brief explanation of drawings]

図面は本発明におけるプローブ装置の一実施例を示した
もので、第1図はプローブカードの平面図、第2図は同
上の正面図、第3図は第1図のa部拡大詳細図、第4図
は第3図の側面図、第5図は第3図のA−A線断面図、
第6図は第3図のB−B線断面図、第7図はFPCの接
触部分を加熱加圧処理する工程を示した部分断面図であ
る。 1・・・プローブカード 2・・・FPC3・・・FPC絶縁体ベース4・・・導
体パターン 5・・・接触突起6・・・型枠 7・・・
凸部 8・・・加熱部9・・・切り溝 10・・・接着
層 11・・・ガラス基板 12・・・空洞特 許 出 願 人 東京エレクトロン株式会社 第 図 第2図 第3図 第 図 第 図 第6図 2 第 図
The drawings show an embodiment of the probe device according to the present invention, and FIG. 1 is a plan view of a probe card, FIG. 2 is a front view of the same, and FIG. 3 is an enlarged detailed view of part a of FIG. 1. Fig. 4 is a side view of Fig. 3, Fig. 5 is a sectional view taken along line A-A of Fig. 3,
FIG. 6 is a sectional view taken along the line BB in FIG. 3, and FIG. 7 is a partial sectional view showing a process of heating and pressurizing the contact portion of the FPC. 1... Probe card 2... FPC 3... FPC insulator base 4... Conductor pattern 5... Contact protrusion 6... Formwork 7...
Convex part 8... Heating part 9... Cut groove 10... Adhesive layer 11... Glass substrate 12... Cavity Patent applicant Tokyo Electron Ltd. Figure 2 Figure 3 Figure 3 Figure 6 2 Figure

Claims (1)

【特許請求の範囲】[Claims] (1)フレキシブルプリント基板を用いてプローブカー
ドを形成する装置において、フレキシブルプリント基板
を湾曲加工を施して接触突起を形成し、この接触突起の
両側縁に切り溝を形成したことを特徴とするプローブ装
置。
(1) In an apparatus for forming a probe card using a flexible printed circuit board, a probe characterized in that a contact protrusion is formed by curving the flexible printed circuit board, and grooves are formed on both sides of the contact protrusion. Device.
JP1196278A 1989-07-28 1989-07-28 Probe measurement method Expired - Lifetime JP2759193B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1196278A JP2759193B2 (en) 1989-07-28 1989-07-28 Probe measurement method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1196278A JP2759193B2 (en) 1989-07-28 1989-07-28 Probe measurement method

Publications (2)

Publication Number Publication Date
JPH0360141A true JPH0360141A (en) 1991-03-15
JP2759193B2 JP2759193B2 (en) 1998-05-28

Family

ID=16355146

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1196278A Expired - Lifetime JP2759193B2 (en) 1989-07-28 1989-07-28 Probe measurement method

Country Status (1)

Country Link
JP (1) JP2759193B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2022091930A1 (en) * 2020-10-27 2022-05-05

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63206671A (en) * 1987-02-24 1988-08-25 Tokyo Electron Ltd Inspection apparatus
JPH01128381A (en) * 1987-11-12 1989-05-22 Fujitsu Ltd Examining method for lsi wafer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63206671A (en) * 1987-02-24 1988-08-25 Tokyo Electron Ltd Inspection apparatus
JPH01128381A (en) * 1987-11-12 1989-05-22 Fujitsu Ltd Examining method for lsi wafer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2022091930A1 (en) * 2020-10-27 2022-05-05
WO2022091930A1 (en) * 2020-10-27 2022-05-05 株式会社ヨコオ Flexible substrate and inspection tool
EP4240119A4 (en) * 2020-10-27 2024-10-09 Yokowo Co., Ltd. Flexible substrate and inspection tool

Also Published As

Publication number Publication date
JP2759193B2 (en) 1998-05-28

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