JPH036040A - Semiconductor device - Google Patents

Abstract

PURPOSE:To realize a perfect element isolation by means of a buried SiO2 layer and to suppress a short channel effect by a method wherein the depth of the buried SiO2 layer and the layer thickness of a recrystallized layer are different in positions inside a wafer. CONSTITUTION:A recrystallized layer 13 which has been element-isolated perfectly by a buried SiO2 layer 2 is formed, as an-active layer, on the buried SiO2 layer 2 formed in a single-crystal silicon substrate 1 by SIMOX. A channel region 4, a source region 3 and a drain region 5, to which impurities have been diffused, are formed in the recrystallized layer 13. A layer thickness of the recrystallized layer 13 is 100 to 500Angstrom in the channel region 4 and is 0.1 to 0.2mum in the source region 3 and the drain region 5. A gate electrode 8 is formed on the channel region 4 via a gate oxide film 6. Thereby, a perfect element isolation is achieved by the buried SiO2 layer 2; a junction capacity and an interconnection capacity are reduced; a junction leak from an impurity diffusion layer to the silicon substrate is not caused.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a buried Si2 layer formed by SIMOX.

(Conventional technology) SOI (Silicon On In5ulator)
Transistors with this structure are capable of high-speed operation because (1) it is easy to completely isolate elements using insulators, (2) latch-up does not occur in CHOS, and (3) junction capacitance and wiring capacitance can be reduced. It has the characteristic of being.

Among these SOI structures, SIMOX (Separate
There is a structure called on by implanted oxygen. In this method, a buried Si2 layer is formed by implanting a high dose of oxygen ions into a single crystal silicon substrate with high acceleration energy. A method for forming SIMOX will be explained with reference to FIG.

First, as shown in FIG. 3(a), oxygen ions are applied to the single crystal silicon substrate 31 at a dose of IXIO" to 2X10".
C "2. Inject with acceleration energy of 150 to 200 KeV.

By this ion implantation, a SiOg layer 34 is formed in a region at a certain depth from the surface of the single crystal silicon substrate 31. As shown in FIGS. 3 and 3, a monocrystalline silicon layer 36 exists on this Sin layer 34 via a transition layer consisting of an amorphous silicon layer 35.

Next, when annealing is performed at 1100 to 1400°C,
The SiOx layer 34 transforms into a buried SiO2 layer 32.

At the same time, the amorphous silicon layer 35
Recrystallized N33 with few crystal defects is formed by epitaxial growth from 6 (Fig. 3(C)),
The process of forming the SOI structure using SIMOX is completed.

(Problem to be solved by the invention) However, in the above-mentioned conventional technology, embedded S
Since the iO□ layer was formed at a certain depth from the silicon substrate surface, there was a drawback that in order to form a device on the recrystallized layer, a new SiO2JiJ layer had to be formed for device isolation. Ta. In addition, MO in the recrystallized layer
S When a transistor is formed, since the thickness of the recrystallized layer is constant within the plane of the silicon substrate, it is impossible to prevent the influence of the drain electric field from reaching the channel region, and the short channel effect cannot be sufficiently suppressed. I couldn't do it.

The present invention has been made to solve the above-mentioned problems, and its purpose is to change the depth at which the buried SiO□ layer is formed within the wafer surface so that the buried StO□ layer can completely form the buried SiO□ layer. It is an object of the present invention to provide a semiconductor device that can achieve effective element isolation and suppress short channel effects.

(Means for Solving the Problems) The semiconductor device of the present invention is a semiconductor device having a sor structure having a buried Si layer and a recrystallized layer formed by SIMOX, and the semiconductor device has the following features: The thickness of the recrystallized layer varies depending on the position within the wafer,
This achieves the above objective.

The semiconductor device described above may have an element isolation layer formed by the buried SiO2 layer.

A MOS l-transistor is formed on the recrystallized layer, and the thickness of the recrystallized layer in the channel region of the MO5) transistor is equal to that of the recrystallized layer in the source/drain region. The semiconductor device described above may be thinner than the layer thickness.

As a method for manufacturing the semiconductor device of the present invention, 51M0
In a method for manufacturing a semiconductor device in which a buried 5TOZlW and a recrystallized layer are formed using X, the depth of the implanted oxygen may be changed using a mask pattern provided on the wafer during oxygen ion implantation. good.

When forming a MOS l-transistor on the recrystallized layer, using the mask pattern, the MOS t
- The method for manufacturing a semiconductor device described above may include implanting impurity ions into the source/drain regions of the transistor.

(Example) An example of the present invention will be described below with reference to the drawings.

FIG. 1 shows a MOS which is one embodiment of the semiconductor device of the present invention.
FIG. 2 is a cross-sectional view for explaining a transistor.

Embedded in single crystal silicon substrate 1 by SIMOX 5
iozJ! i2 is formed. This embedded 5iO
A recrystallized layer 13, which is completely isolated by the buried SiO2 layer 2, is formed as an active layer on the first eyebrow 2. In this recrystallized layer 13, a channel region 4, a source region 3 and a drain region 5 into which impurities are diffused are formed. The thickness of the recrystallized layer 13 is 100 to 500 in the channel region 4, and the thickness in the source region 3. In the drain region 5, it is 0.1 μm-0.2 μm. A gate electrode 8 is formed on the channel region 4 via a gate oxide 11!6.

NSG film (thickness: 1000) 9 and B as the glabellar insulating film
PSG film (thickness: 5000) 10 is deposited,
Wiring 12 connects to source region 3 via contact hole 11
and is in contact with the drain region 5.

In a semiconductor device having such a structure.

Since complete element isolation is achieved by the buried 5i02 layer 2, junction capacitance and wiring capacitance are reduced.

There is also no junction leakage from the impurity-enhanced FPi layer to the silicon substrate.

Furthermore, in the MOS l-transistor having such a structure, since the recrystallized layer 13 of the channel region 4 is constricted by the buried SiO2 layer 2, the MOS
The influence of the drain electric field from the drain region 5 to the channel region 4 is suppressed during operation of the l-transistor. Therefore, single channel effects are significantly suppressed.

Next, a method for manufacturing a MOS transistor having the above structure will be described.

First, as shown in FIG. 2(a), a thermal oxide film (200 mm thick) 14. Silicon nitride film (thickness: 200) 15 and TE01 (Tatrae
thylorthosilicate) film (film thickness 23
00 people) 16 is formed with this number III. Next, the TEO5 film 16 and silicon nitride film 15 are etched by PIE (reactive ion etching) using the first photoresist 7a as a mask (see FIG. 2).
b)). After removing the first photoresist 17a, a second photoresist 17b having a pattern as shown in FIG. 2(C) is formed, and a buffered hydrofluoric acid solution (HF:N
The TEO5 film 16 is etched using H,F=1:10). At this time, silicon nitride film 15 is not etched.

This second photoresist 17b is removed to complete the formation of a mask pattern for oxygen ion implantation. next,
Oxygen ions were implanted at a dose of 1.8X101cm-' with an acceleration energy of 200KeV, followed by 1300'C.

By performing annealing for 6 hours, an element isolation buried SiO□ layer 2 is formed. At this time, TEOS film 1
6 and the silicon nitride film 15, the depth at which oxygen ions are implanted changes, and the depth of the buried layer 2 formed changes accordingly, as shown in FIG. 2(d). do. TEO5ll116. In the region where the thick mask consisting of three layers of silicon nitride 115 and thermal oxide film 14 exists, the surface of the buried Si02 layer 2 reaches the surface of the silicon substrate 1, so the buried SiO□ layer 2 covers the element isolation Si02 layer. It will serve as both.

Further, the region where the thin mask consisting of the two layers of the silicon nitride film 15 and the thermal oxide film 14 is present becomes the channel region 4. In this channel region 4, a thin recrystallized layer is formed because the depth of the implanted oxygen is shallower than in a region without a mask due to the presence of a thin mask.

Next, without removing the mask pattern for oxygen ion implantation, arsenic ions were implanted at a dose of 5 x 1015cm-" with an acceleration energy of 80KeV, and then 800"C30
By performing annealing for 30 minutes, impurity diffusion layers are formed in the source region 3 and drain region 5.

In this way, if a mask for oxygen ion implantation is used before forming the gate electrode, the source region 3 and drain region 5
An impurity diffusion layer can be formed in a self-aligned manner. This makes it possible to manufacture a MOS transistor with a channel length that does not depend on the gate length.

Next, after removing all the TEO3 film 16 on the wafer with a buffered hydrofluoric acid solution, all the silicon nitride film 15 was also removed with a hot phosphoric acid solution at 150°C.
), followed by 2 gates I! by the usual method! ! Membrane 6.
By forming a gate electrode 81, an interlayer insulating film, a contact hole 11, and a wiring 12, a MOS transistor having the structure of the present invention is formed (FIG. 1).

In this way, by performing oxygen ion implantation and annealing once, the buried S for forming the SOI structure is
The iO□ layer and the element isolation 5i02 layer can be formed simultaneously. At the same time, the recrystallized layer 13 of the channel region 4
Recrystallization of the source region 3 and drain region 5 [
It is also easy to reduce the thickness below 13.

Further, by performing impurity ion implantation without removing the mask after oxygen ion implantation, source/drain impurity diffusion layers can be formed in a self-aligned manner. Therefore, it becomes possible to set the channel length independent of the gate length, increasing the degree of freedom in design.

(Effects of the Invention) As described above, according to the semiconductor device of the present invention, the embedded Si
Since complete element isolation is achieved by the O□ layer, junction capacitance and wiring capacitance are reduced, and there is no junction leakage from the impurity diffusion layer to the silicon substrate. In a MOS transistor having such a structure, the recrystallized layer 13 of the channel region 4 is made of buried Si.
Because it is constricted by O□ layer 2.

The influence of the drain electric field from the drain region 5 to the channel region can be suppressed during operation of the MOS transistor. Therefore, single channel effects are significantly suppressed.

Figure 1 is a sectional view of an embodiment of the device of the present invention, Figure 2 (a)
- (e) are cross-sectional views for explaining each step of the manufacturing method of the embodiment. Figures 3 (a) - (C) are cross-sectional views for explaining the prior art.

1.31...Silicon substrate, 2.32...Embedded S
iO2 layer.

3... Source region, 4... Channel region, 5...
Drain region, 6... Gate oxide film, 7.14...
Thermal oxide film.

8... Gate electrode, 9... NSG film, 10... B
PSG film, 11... Contact hole, 12... Wiring, 13.33... Crystallized layer 15... Silicon nitride film, 16... TE01 film, 17a, 17b... Resist, 34... ...5in) 4 layers, 35...amorphous silicon layer 36...single crystal silicon layer.

that's all

Claims (1)

[Claims] 1. In a semiconductor device having an SOI structure having a buried SiO_2 layer and a recrystallized layer formed by SIMOX, the depth of the buried SiO_2 layer and the layer thickness of the recrystallized layer are equal to that of the wafer. Semiconductor devices differ depending on their location within the device.