JPH0361390B2 - - Google Patents

Description

[Detailed Description of the Invention] [Table of Contents] Overview Industrial Application Fields Conventional Technology Problems to be Solved by the Invention Means for Solving the Problems Examples Effects of the Invention [Summary] Central Processing Unit CPU In the communication control unit CCU, which operates according to commands specified by input/output instructions for subchannels from the CCU and supports high-level procedures under microprogram control, information frames are When receiving an information field, if an information field larger than the receive buffer area specified by the read command is received, the continuation of the information field is counted by the specific sense command chained from the read command, and the count is The data length of a series of information fields is created by adding the value and the count value obtained by the read command, and the created data length is used to receive an information frame with the P/F bit set to "1". By transferring the signal to the central processing unit CPU as a trigger, it is possible to easily detect and release the busy state in the central processing unit CPU.

[Industrial application field]

The present invention relates to high-level procedures processed in a communication control unit CCU, and particularly relates to high-level procedures processed in a communication control unit CCU.
This invention relates to a high-level procedural control method that can detect a buffer shortage during information field reception in a CCU and report it to the central processing unit CPU.

With the recent spread of online systems, there has been a need for efficient data communication between host computers and terminals.

In general, data communication between a host computer and a terminal through the communication control unit CCU is often performed using a so-called high-level procedure (HDLC procedure), but in the conventional high-level procedure, information received from the terminal is Central processing unit within the field
Since only the number of bytes specified by the command generated by the CPU is transferred to the central processing unit CPU, if the number of bytes of the information field from the terminal is large,
Due to lack of buffer (i.e., busy state), the central processing unit CPU is RNR (RECELVE NOT
READY) frame to suppress the transmission of information frames from the terminal side.

In this system, there is a problem in that the central processing unit CPU sends many RNR frames, resulting in poor service to the terminals, and a data transfer control procedure that improves the service to the terminals has been awaited.

[Conventional technology]

Figure 3 shows the configuration of a general communication control unit CCU, and Figure 4 shows the configuration of the communication control unit CCU.
This figure schematically shows the details of each functional block that makes up the CCU.

Generally, in the communication control unit CCU2, when the line control unit 21 interrupts the microprogram 22, a line control word (hereinafter referred to as LCW) corresponding to each line is stored in the control register 25.
It operates to interrupt after editing and copying the contents of 24.

The microprogram 22 also stores the processed contents of the control register 25 in the LCW corresponding to each line.
The function functions to return the processing to the line control unit 21 after storing the data.

The high-level procedure read command performs the following processing.

(1) When an input/output command is issued from the central processing unit (hereinafter referred to as CPU) 1 to the line control unit 21,
The input/output instruction receiving section is activated and an interrupt code for the microprogram 22 is created.

(2) The microprogram 22 activated by the line control unit 21 classifies the contents of the interrupt using the interrupt classification unit.

(3) In the microprogram unit 22, when the content of the interrupt is input/output command reception, the command classification unit classifies the command.

(4) When the command is a read command, LCW
At the same time, the program sequence (hereinafter referred to as PSQ) of local storage (hereinafter referred to as LS) 23 is set to address field reception wait PSQ1.

(5) In the line control unit 21, the reception mode classification unit constantly searches and classifies the mode of the LCW 24, and if the reception mode is a character processing request, processing corresponding to that mode is performed.

That is, when a cyclic signal CRC value for the received character, for example address A, is generated, "check addition" is performed, and stored in the CRC value storage section of the LCW 24, at the same time, the character assembled in the received character assembly section {i.e., the address A} is created by the interrupt creation unit.

(6) The microprogram 22 classifies the interrupt code as described in (2), and determines, for example, that address A is an assembled character processing interrupt, using the program sequence classification unit of the LS 23.
Search and confirm the PSQ storage area.

In this case, since the PSQ is "1", the address of the control information (command) that has been set in advance by another command (for example, a set command) and the contents of the address field stored in data buffer 0 of the LCW 24. Make a comparison with

If the comparison results in a match, it is recognized as a correct information frame and the PSQ of the LS 23 is set to the control field reception waiting PSQ2.

Also, the byte count of the command (hereinafter,
BC) is stored in the BC storage section of the LS23.

(7) The line control unit 21 uses the control field classification unit to classify the type of received character, convert it into the type and internal code, and send it to the control register 2.
5 is stored in the internal code register.

After that, perform the above "check addition",
At the same time as storing in the CRC value storage section of LCW24,
An interrupt creation section creates an interrupt code that indicates that the character is a character (control field information) assembled by the received character assembly section.

(8) The microprogram 22 classifies the interrupt code in the same way as above, and when it recognizes that it is a character processing interrupt, searches the PSQ response section of the LS 23 using the program sequence classification section, and calculates the current PSQ. Recognize.

At this point, the PSQ is "2", so the control field processing section recognizes the contents of the internal code storage register in the control register 25.

If the recognized content is (a) an information frame with P/F=0, the P/F “0” information frame processing unit will:
PSQ of LS23 waits for information frame to end PSQ
At the same time, set the LCW24 reception mode to information field reception (mode 3).
Set to .

(b) When the information frame is P/F=1, the P/F “1” information frame processing unit:
Waiting for information frame end for PSQ of LS23 PST
4, and at the same time change the reception mode of LCW24 to information field reception (mode 3).
Set to .

When the information frame of P/F "1" is received, the right to transmit the information frame is transferred to the CPU1, and the communication control unit CCU2 waits for a response frame from the CPU1.

(9) When the line control section 21 receives the information field, the transfer processing section transfers the information field to the main storage device MS3 via the data buffer 0 of the control register 25, and at the same time performs the above-mentioned "check addition". Perform processing.

At this time, the contents of the information field are transferred to LS2.
Only the number of bytes corresponding to the BC value stored in 3 was transferred.

In the above transfer process, when it is recognized that a buffer shortage has occurred, that is, the number of bytes in the information field is larger than the value of BC, an interrupt for the buffer shortage occurrence is created in the interrupt creation section,
An interrupt was issued to CPU1 to notify CPU1 of the occurrence of buffer shortage.

[Problem that the invention seeks to solve]

Therefore, in the conventional method, although the CPU 1 was able to recognize the shortage of data buffer, it was unable to recognize the data length related to the shortage, so the necessary data buffer could not be prepared.
There was a problem that data beyond the information field indicated by the above BC became lost data.

That is, since the CPU 1 cannot maintain a busy state for receiving subsequent information fields, there is a problem in that the CPU 1 ends up receiving useless information fields from the terminal 4.

Also, BC in the command string prepared by the CPU1
Since the value of the information field does not match the amount of information field from the terminal 4, there was a problem in which it was difficult to control the CPU 1 from being busy (suppressing reception of subsequent information fields).

In view of the above-mentioned conventional drawbacks, the present invention provides a communication control device.
The CCU2 detects buffer shortage during information field reception, counts the data length of the information field where the buffer shortage has occurred, and then
By reporting to CPU 1, it is easy to detect and release the busy state in CPU 1, and by maintaining the busy state until the buffer for the data length can be obtained, the terminal side can send unnecessary information frames. The purpose is to provide a method to prevent this.

[Means for solving problems]

FIG. 1 is a diagram showing the concept of the present invention, and a
shows an example of a command string generated by CPU1,
b schematically shows the processing relationship between a normal read command and a sense command of the present invention with respect to an information frame.

In b of this figure, F: flag sequence called F pattern for synchronization, A: address field, C: control field, I: information (data) field, FCS: frame check sequence for error detection. are shown respectively.

When the above information frame is received by a command string consisting of a read command and a sense command as shown in figure a, the read command is
When the BC receives an information field with a specified amount of data, that is, part b or more, it counts the data length of the part that is the continuation of the information field using a specific sense command chained from the read command, The data length (+) of the information field is created by adding that count value and the count value of the part read by the above read command, that is, the value of BC. The frame with "1" is used as a trigger to transfer the frame to the CPU 1.

[Effect]

That is, according to the present invention, there is provided a communication control device that operates according to commands instructed by input/output instructions for subchannels from a central processing unit CPU, and supports high-level procedures under microprogram control.
In the CCU, a command string consisting of a read command and a specific sense command allows
When receiving an information frame, if an information field larger than the reception buffer area specified by the read command is received, count the continuation of the information field with the specific sense command chained from the read command, The data length of a series of information fields is created by adding the count value and the count value obtained by the read command, and the created data length is used for the information frame whose P/F bit is "1". With reception as a trigger,
detecting a busy state in the central processing unit CPU by transferring the information to the central processing unit CPU;
Since it is made easy to release, CPU1 is
A data buffer corresponding to the data length transferred from CCU2 can be prepared, and CPU1
This has the effect of making it easier to detect and release the busy state in the terminal, and preventing unnecessary information frames from being sent on the terminal side by maintaining the busy state until the buffer for the data length can be acquired. There is.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.
FIG. 2 is a diagram schematically showing an embodiment of the present invention.
1. Buffer shortage processing section 221, buffer shortage check section 222, LS of microprogram 22
The data length storage area 231 of No. 23 and the data length storage section 241 of LCW 24 are functions necessary to implement the present invention.

First, in processing a read command, operations (1) to (9) described in the conventional method are the same, but when the present invention is implemented, the following operations are added. That is, (10) the microprogram 22 classifies the interrupt code in the same manner as described above, and if it is an interrupt with a buffer shortage, the buffer shortage processing unit 221 stores the occurrence of the buffer shortage, and at the same time stores the above-mentioned BC of the LS 23. The contents of the storage (i.e.
BC) to the data length storage area 231.

Thereafter, the next specific sense command is chained based on the instruction of the chain flag of the read command.

(11) In the operation (9), if no buffer shortage is detected, the PSQ of LS23 is set to "0" and the state waits for the next command.

The chained specific sense commands described above perform the following processing.

(1) When an input/output command is issued from the CPU 1 to the line control unit 21, the input/output command receiving unit is activated,
An interrupt code for the microprogram 22 is created.

(2) The microprogram 22 activated by the line control unit 21 classifies the contents of the interrupt using the interrupt classification unit.

(3) In the microprogram unit 22, when the content of the interrupt is input/output command reception, the command classification unit classifies the command.

The operations (1) to (3) above are operations when an input/output instruction is issued from the CPU 1, but when chained as described above, the microprogram unit 22
is processing the command classification section and moves on to the next step (4).

(4) When the command is a specific sense command,
A buffer shortage check section 222 checks whether a buffer shortage has occurred.

(5) If a buffer shortage has occurred, set the reception mode of the LCW 24 to information field count (mode 4).

The line control unit 21 uses the reception mode classification unit to
The mode of the LCW 24 is constantly searched, and when a character processing request is received, processing according to the mode is performed.

That is, when the line control unit 21 receives the remaining information field transferred by the read command, it performs the above-mentioned "check addition" and adds the LCW2.
At the same time, the data length counter 211 updates the data length of the information field and stores it in the data length storage 24 of the LCW 24.

When the end flag F of the information frame is received, the check adder CRC performs
The contents of the CRC value storage section of the LCW 24 and the FCS sequence of the information frame are checked, the check addition value is checked, and whether it is normal or abnormal is converted into an internal code and stored in the internal code storage section of the control register 25. At the same time as the storage, the reception character assembling section creates an interrupt code that indicates the existence of the assembled character {ie, end flag F} in the interrupt generation section.

(6) The microprogram 22 classifies the interrupt code in the same manner as described above, and when it recognizes that it is a character processing interrupt, the program sequence classification unit classifies the interrupt code as the PSQ of the LS 23.
Search for and recognize the current PSQ.

In this case, the PSQ has been held continuously since the read command, so the PSQ is “3” or
or "4".

(a) When PSQ=3 (that is, when receiving a P/F “0” information frame): Classify the contents of the internal code storage register of the control register 25.

If the classified content is normal, LS23
The contents of the data length storage area 231 (the data length transferred by the read command, that is, the value of BC),
Contents of data length storage section 241 of LCW24 (data length counted by this sense command)
and the data length storage area 23 of LS23.
Restore to 1.

Thereafter, it waits to receive a P/F "1" information frame.

(b) When PSQ=4 (that is, when receiving a P/F “1” information frame): The contents of the internal code storage register of the control register 25 are classified.

If the classified content is normal, LS23
The contents of the data length storage area 231 (the data length transferred by the read command, that is, the value of BC),
Contents of data length storage section 241 of LCW24 (data length counted by this sense command)
and the data length storage area 2 of LS23.
At the same time as re-storing to 31, the following process (7) is performed.

(7) Upon receiving the information frame of P/F “1”,
As mentioned above, P/F "1" is a flag that passes the right to transmit an information frame to the other party, for example, the CPU 1, so the transfer instruction section of the microprogram 22 transfers the contents of the data length storage area 231 of the LS 23 (the relevant information At the same time as requesting the line control unit 21 to transfer the field data length), the LS2
PSQ 3 is set to data length transfer wait PSQ5, and the reception mode of LCW 24 is set to data length transfer wait (mode 5).

(8) The line control unit 21 uses the transfer processing unit to transfer the data length to the main storage device MS3.

(9) Next, the microprogram 22 confirms that the data length has been transferred, ends the operation of the specific sense command, and waits for a response information frame from the CPU 1.

(10) If buffer shortage is not detected in the buffer shortage check in (4), LS2
PSQ of P/F "1" is set to "1", and reception of an information frame of P/F "1" is monitored, and when the information frame is received, the operation of the command is terminated.

In this way, in the present invention, when an information frame is received with a read command and a buffer shortage is detected, it is chained to a specific sense command, and the remaining information field of the information frame is monitored with the sense command, The total data length of the information frame is calculated, and the reception of the P/F "1" information frame is used as a trigger to transmit the data length to the central processing unit CPU.
The feature is that the CPU can perform busy control with high precision.

〔Effect of the invention〕

As described above in detail, the high-level procedure control method of the present invention operates according to commands specified by input/output instructions for subchannels from the central processing unit CPU, and communicates to support high-level procedures using microprogram control. Control device
In the CCU, a command string consisting of a read command and a specific sense command allows
When receiving an information frame, if an information field larger than the reception buffer area specified by the read command is received, count the continuation of the information field with the specific sense command chained from the read command, The count value is added to the count value obtained by the read command to create the data length of a series of information fields, and the created data length is used to receive the information frame with the P/F bit "1". This makes it easy to detect and release the busy state in the central processing unit CPU by using the CPU as a trigger to transfer the busy state to the central processing unit CPU.
A data buffer corresponding to the data length transferred from CPU 2 can be prepared, making it easy to detect and release the busy state in CPU 1, and maintain the busy state until the buffer for the data length can be acquired. This has the effect of suppressing the transmission of useless information frames on the terminal side.

[Brief explanation of drawings]

Fig. 1 is a diagram explaining the concept of the present invention, Fig. 2 is a diagram schematically showing an embodiment of the invention, Fig. 3 is a diagram showing the configuration of a general communication control device CCU, and Fig. The figure is a diagram schematically showing details of each functional block included in the communication control unit CCU of FIG. 3. In the drawing, 1 is a central processing unit CPU, 2 is a communication control unit CCU, 3 is a main storage device MS, 4 is a terminal, 21 is a line control unit, 22 is a microprogram unit or microprogram, 23 is a local storage LS, 24 represents a line control word LCW, and 25 represents a control register.

Claims (1)

[Claims] 1. In the communication control unit CCU2, which operates according to commands instructed by input/output commands for subchannels from the central processing unit CPU1 and supports high-level procedures under microprogram control, according to read commands and sense commands. When an information frame is received using the configured command string, if an information field I larger than the receive buffer area specified by the read command is received, the above is executed by a specific sense command chained from the read command. Means 211 for counting the continuation () of information field I; Means 23 for creating the data length of a series of information fields by adding the count value and the count value obtained by the read command.
1,241, and means for transmitting the created data length to the central processing unit CPU1 using reception of a frame with a poll/final (P/F) bit "1" as a trigger. High-level procedural control method.