JPH0362537A - Electronic component mounting board - Google Patents
Electronic component mounting boardInfo
- Publication number
- JPH0362537A JPH0362537A JP1197440A JP19744089A JPH0362537A JP H0362537 A JPH0362537 A JP H0362537A JP 1197440 A JP1197440 A JP 1197440A JP 19744089 A JP19744089 A JP 19744089A JP H0362537 A JPH0362537 A JP H0362537A
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- component mounting
- conductor
- base material
- conductor circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004020 conductor Substances 0.000 claims abstract description 78
- 239000000463 material Substances 0.000 claims description 34
- 239000000758 substrate Substances 0.000 abstract description 14
- 238000000034 method Methods 0.000 abstract description 10
- 238000010030 laminating Methods 0.000 abstract 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 11
- 239000011889 copper foil Substances 0.000 description 9
- 239000011810 insulating material Substances 0.000 description 8
- 239000004642 Polyimide Substances 0.000 description 7
- 239000000853 adhesive Substances 0.000 description 7
- 230000001070 adhesive effect Effects 0.000 description 7
- 229920001721 polyimide Polymers 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 6
- 238000005530 etching Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 239000011888 foil Substances 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 229910000831 Steel Inorganic materials 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000010959 steel Substances 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 235000012489 doughnuts Nutrition 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、電子部品搭載用基板に関し、特にフェイスダ
ウンボンディング形電子部品（電極形成面を下側にして
導体回路にその電極を接続する半導体素子等の電子部品
）が実装されると共に、当該電子部品を外部に電気的に
接続する電子部品搭載用基板に関する。Detailed Description of the Invention (Industrial Field of Application) The present invention relates to a substrate for mounting electronic components, and particularly to a face-down bonding type electronic component (semiconductor in which the electrode is connected to a conductor circuit with the electrode forming surface facing downward). The present invention relates to an electronic component mounting board on which electronic components such as elements are mounted and electrically connects the electronic components to the outside.
（従来の技術）
近年の電子機器の小型、軽量、薄型化に伴って、これに
内蔵される半導体素子等の電子部品も高密度化されてき
ている。この高密度化された電子部品は必然的にその接
続端子数を増加させることとなるため、このような電子
部品を実装するための電子部品搭載用基板の導体回路も
、より高密度なものが要求されてきている。(Prior Art) As electronic devices have become smaller, lighter, and thinner in recent years, electronic components such as semiconductor elements built into these devices have also become more dense. This high-density electronic component inevitably requires an increase in the number of connection terminals, so the conductor circuit of the electronic component mounting board for mounting such electronic components must also be of higher density. It's been requested.
そこで、昨今では、この要求を満たすものとして、導体
回路の高密度化を図った電子部品搭載用基板が種々案出
されてきている。例えば、第２２図及び第２３図に示す
、実公平１−９１６０号公報に開示されているような「
半導体素子の実装構造」を有する電子部品搭載用基板（
２００）である。Therefore, in recent years, various substrates for mounting electronic components having high density conductor circuits have been devised to meet this requirement. For example, as shown in FIG. 22 and FIG.
Electronic component mounting substrate (with a semiconductor element mounting structure)
200).
この「半導体素子の実装構造」は、 「基板の一主表面
上に形成された導体パターンにフェスダウンボンディン
グ形半導体素子を該素子の電極を介して搭載するものに
おいて、該導体パターンを前記−主表面上にて素子搭載
領域外に導かれる配線導体と、素子搭載領域内にて前記
−主表面から他の主表面に導電性スルーホールを介して
導かれる導電端子とから構成すること」をその構成上の
特徴としている。This ``semiconductor element mounting structure'' refers to ``a structure in which a face-down bonding type semiconductor element is mounted on a conductor pattern formed on one main surface of a substrate via an electrode of the element, in which the conductor pattern is mounted on the main surface of the substrate. "It consists of a wiring conductor that is led outside the element mounting area on the surface, and a conductive terminal that is led from the main surface to the other main surface via a conductive through hole within the element mounting area." This is a structural feature.
すなわち、基材（１０）の両面に導体回路（８０）を形
成して、その導体回路（８０）のうち、半導体素子等の
電子部品（７０）が搭載される面のものを配線導体（８
１）とし、素子（７０）の電極に対応して設けられた導
電端子（８２）を導電性スルーホール（８３）を介して
基材（ｌＯ）の他面に設けられた導体回路（８０）へ引
き出して、導体回路（８０）の高密度化に対応せんとし
たものである。That is, conductor circuits (80) are formed on both sides of the base material (10), and the conductor circuits (80) on the side on which electronic components (70) such as semiconductor elements are mounted are used as wiring conductors (80).
1), a conductive terminal (82) provided corresponding to the electrode of the element (70) is connected to a conductor circuit (80) provided on the other surface of the base material (IO) via a conductive through hole (83). This is intended to accommodate the increasing density of conductor circuits (80).
このように、この種の構造を有する電子部品搭載用基板
（２００）によれば、導体回路（８０）の高密度化の要
求を満足することができる。As described above, the electronic component mounting board (200) having this type of structure can satisfy the demand for higher density conductor circuits (80).
（発明が解決しようとする課題）
一方、前述の如く、電子機器の小型、薄型化を図るため
には、電子部品搭載用基板自体も、小型、薄型化する必
要がある。そのためには、基材（１０）自体の厚みを薄
くするか、または基材（１０）に電子部品（７０）が収
納されるような四部を設け、電子部品（７０）が実装さ
れた際に全体として薄くなるようにすればよいのである
。(Problems to be Solved by the Invention) On the other hand, as described above, in order to make electronic devices smaller and thinner, it is necessary to make the electronic component mounting substrate itself smaller and thinner. To do this, the thickness of the base material (10) itself must be reduced, or four parts may be provided in the base material (10) in which the electronic components (70) are housed, so that when the electronic components (70) are mounted, All it has to do is make it thinner overall.
しかしながら、前述のような導体回路（８０）を基材（
１０）の両面に有する構造の電子部品搭載用基板（２０
０）にあっては、基材（ｌＯ）自体の厚みを薄くした場
合には、電子部品実装時における加熱や収湿等により基
材（ｌＯ）が伸び易くなって好ましくない。However, the conductor circuit (80) as described above is
10) A board for mounting electronic components having a structure on both sides of the board (20)
Regarding 0), if the thickness of the base material (1O) itself is made thin, the base material (1O) tends to stretch due to heating, moisture absorption, etc. during electronic component mounting, which is not preferable.
また、電子部品（７０）が収納されるような凹部を設け
ようとしても、導体回路（８０）が両面に形成されてい
るため、電子部品裏面の接続端子と導体回路（８０）と
を電気的に接続するためには、第２４図に示すような導
体回路（８０）とする必要があり、このような導体回路
（８０）を形成するには、製造上、あるいはコスト的に
言っても困難であるといった問題がある。Furthermore, even if an attempt is made to provide a recess for storing the electronic component (70), since the conductor circuit (80) is formed on both sides, the connection terminal on the back side of the electronic component and the conductor circuit (80) cannot be connected electrically. In order to connect to the circuit, it is necessary to form a conductor circuit (80) as shown in Fig. 24, and forming such a conductor circuit (80) is difficult in terms of manufacturing and cost. There is a problem that.
さらに、この種の電子部品搭載用基板（２００）は、そ
の製造時及び電子部品実装時に、第２５図に示すように
リール・トウ・リール方式で一般に取り扱われる。Further, this type of electronic component mounting board (200) is generally handled in a reel-to-reel manner as shown in FIG. 25 during manufacturing and electronic component mounting.
従って、導体回路（８０）が基材（４０）の両面に形成
されていると、第２６図に示すように、リール（９０）
に巻かれた際に外側（表面）の導体回路（８０）に比べ
、内側（裏面）の導体回路（８０）の方が、基材の厚み
だけ余分に湾曲するため、基材（１０）が厚くなればな
るほど内側（裏面）の導体回路（８０）が基材（１０）
から剥がれ易くなるといった問題もある。Therefore, when the conductive circuit (80) is formed on both sides of the base material (40), as shown in FIG.
When the conductor circuit (80) on the inside (back side) is wound on the outside (front side), the conductor circuit (80) on the inside (back side) is curved more by the thickness of the base material, so the base material (10) The thicker it is, the more the conductor circuit (80) on the inside (back side) becomes the base material (10).
There is also the problem that it becomes easy to peel off.
本発明は、以上のような実情に鑑みてなされたものであ
り、その目的とするところは、導体回路の高密度化と、
電子部品を実装した際の薄型化とを容易に図ることがで
きると共に、リール・トウ・リール方式で取り扱われる
際に導体回路が容易に剥がれない電子部品搭載用基板を
提供することにある。The present invention has been made in view of the above-mentioned circumstances, and its purpose is to increase the density of conductor circuits,
To provide a substrate for mounting electronic components, which can easily be made thinner when electronic components are mounted, and whose conductor circuits are not easily peeled off when handled in a reel-to-reel manner.
（課題を解決するための手段）
以上の課題を解決するために、本発明の採った手段を、
実施例に対応する第１図及び第２図に従って説明すると
、
「フェイスダウンボンディング形電子部品（７０）が実
装される電子部品搭載部（１１）と、当該電子部品（７
０）を外部に電気的に接続する導体回路（２２）（３２
）とを備えた電子部品搭載用基板（１００）において、
電子部品搭載部（１１）を凹状に形成すると共に、導体
回路（２２）（３２）を基材（１０）の片面にのみ多層
に形成し、電子部品搭載部（１１）から各導体回路（２
２）（３２）に至る接続孔（４１）に導電処理を施して
なる導電体（４０）により電子部品（７０）の接続端子
（７１）と各導体回路（２２Ｘ３２）とを電気的に接続
するようにしたことを特徴とする電子部品搭載用基板（
１００）Ｊである
すなわち、本発明に係る電子部品搭載用基板（＋００）
は、フェイスダウンボンディング形電子部品（７０）を
搭載する電子部品搭載部（１１）を凹状に形成し、ここ
に搭載された電子部品（７０）を外部に電気的に接続す
る導体回路（２２）（３２）を基材（１０）の片面にの
み多層に形成して、これらの導体回路（２２）（３２）
と電子部品（７０）の接続端子（７１）とを電子部品搭
載部（１１）から各導体回路（２２）（３２）に至る接
続孔（４１）にメツキ等の導電処理を施してなる導電体
（４０）により電気的に接続したものである。(Means for Solving the Problems) In order to solve the above problems, the means taken by the present invention are as follows.
To explain according to FIG. 1 and FIG. 2 corresponding to the embodiment, "the electronic component mounting part (11) on which the face-down bonding type electronic component (70) is mounted, and the electronic component (70)"
conductor circuits (22) (32
), the electronic component mounting portion (11) is formed in a concave shape, and the conductor circuits (22) (32) are formed in multiple layers only on one side of the base material (10). Then, each conductor circuit (2
2) Electrically connect the connection terminal (71) of the electronic component (70) and each conductor circuit (22 x 32) using a conductor (40) formed by applying conductive treatment to the connection hole (41) leading to (32). A board for mounting electronic components (
100) J, that is, the electronic component mounting board according to the present invention (+00)
The electronic component mounting portion (11) on which the face-down bonding type electronic component (70) is mounted is formed into a concave shape, and the conductor circuit (22) electrically connects the electronic component (70) mounted here to the outside. (32) is formed in multiple layers only on one side of the base material (10) to form these conductor circuits (22) (32).
and the connection terminal (71) of the electronic component (70), and the connection hole (41) extending from the electronic component mounting portion (11) to each conductor circuit (22) (32) is conductive by performing conductive treatment such as plating. (40) electrically connected.
なお、電子部品搭載部（１１）は、第１図の実施例１に
示す如く、基材（１０）にザグリ加工を施して凹状とし
てもよく、第２図の実施例２に示す如く、基材（ｌＯ）
に開口（１２）を設け、この開口（１２）を導体回路層
で覆って、凹状としても良い。また、その深さ及び大き
さについては、特に限定されないが、基材（１０）の材
質、厚み、強度及び電子部品（７ｏ）の厚み等によって
適宜決定されるものである。Note that the electronic component mounting portion (11) may be formed into a concave shape by counterboring the base material (10) as shown in Embodiment 1 of FIG. Material (lO)
An opening (12) may be provided in the opening (12), and this opening (12) may be covered with a conductor circuit layer to form a concave shape. Further, the depth and size thereof are not particularly limited, but are appropriately determined depending on the material, thickness, and strength of the base material (10), the thickness of the electronic component (7o), and the like.
また、各実施例における導体回路（２２）（３２）は、
二層としているが、多層であれば何層であっても良く、
この場合、層数が多ければ多いほど、より高密度な導体
回路（２２）（３２）を形成することができることは言
うまでもない。Further, the conductor circuits (22) (32) in each example are as follows:
Although it is two layers, it can be any number of layers as long as it is multi-layered.
In this case, it goes without saying that the greater the number of layers, the higher the density of the conductor circuits (22) (32) can be formed.
さらに、導電体（４０）にあっては、第１図に示す実施
例１では、基材（１０）及び各導体回路（２２）（３２
）を貫通する接続孔（４１）に、導電性ペーストを埋め
ることによって導電処理を施した柱状の導電体（４０）
とし、第２図に示す実施例２にあっては、各導体回路（
２２）（３２）に当接する接続孔（４１）に、メツキに
よって導電処理を施したブラインドスルーホール（４０
）としているが、その他の手段で構成しても良く、要は
、電子部品（７０）の接続端子（７１）と各導体回路（
２２）（３２）とが電気的に接続されるようになってい
ればよい。そして、このように形成された導電体（４０
）と、電子部品（７０）の接続端子（７１）とは、ハン
ダバンブ（６０）等によって接続される。Furthermore, in the conductor (40), in Example 1 shown in FIG.
) A columnar conductor (40) that has been subjected to conductive treatment by filling a conductive paste into a connecting hole (41) that passes through it.
In Example 2 shown in FIG. 2, each conductor circuit (
22) A blind through hole (40) that has been made conductive by plating on the connection hole (41) that abuts on (32).
), but it may be configured by other means, and in short, the connection terminal (71) of the electronic component (70) and each conductor circuit (
22) and (32) may be electrically connected. Then, the conductor (40
) and the connection terminal (71) of the electronic component (70) are connected by a solder bump (60) or the like.
（発明の作用）
本発明は、上記のような構成により、以下のような作用
がある。(Actions of the Invention) The present invention has the following effects due to the above configuration.
先ず、電子部品搭載部（１１）を凹状に形成して、この
電子部品搭載部（１１）に電子部品（７０）を収納でき
るようにしたことにより、基材（１０）自体の厚みを薄
くすることなく、つまり、基材（１０）の強度を保持し
たまま電子部品（７０）を実装した際の厚みを薄くでき
るのである。First, by forming the electronic component mounting portion (11) into a concave shape so that the electronic component (70) can be stored in the electronic component mounting portion (11), the thickness of the base material (10) itself can be reduced. In other words, the thickness of the electronic component (70) can be reduced while maintaining the strength of the base material (10).
次に、導体回路（２２）（３２）を多層にしたことによ
りパターン設計の自由度が増して導体回路（２２）（３
２）の高密度化を容易に図ることができるのである。Next, by making the conductor circuits (22) (32) multi-layered, the degree of freedom in pattern design increases.
2) high density can be easily achieved.
さらに、これらの導体回路（２２）（３２）を基材（ｌ
Ｏ）の片面にのみ形成したことにより、第２７図に示す
ように、リール・トウ・リール方式により取り扱われて
リール（９０）に巻かれた場合、第２６図に示す従来の
ものに比較して、基材（１０）の厚みによるｔｇｔｔｈ
が少なくなるため、導体回路（２２）（３２）が基材（
１０）から剥がれ難いのである。Furthermore, these conductor circuits (22) (32) are attached to a base material (l
O) is formed only on one side, so that when handled by the reel-to-reel method and wound onto a reel (90) as shown in Fig. 27, compared to the conventional one shown in Fig. 26. tgtth depending on the thickness of the base material (10)
conductor circuits (22) and (32) are connected to the base material (
10) It is difficult to peel off from the surface.
（実施例）
次に、本発明に係る電子部品搭載用基板（１００）の実
施例を図面に従って説明する。(Example) Next, an example of the electronic component mounting board (100) according to the present invention will be described with reference to the drawings.
実４１個」一
実施例１に係る電子部品搭載用基板（１００）を第１図
に示し、以下に、この電子部品搭載用基板（＋００）を
第３図から第１５図に示す製造工程図に基づいて説明す
る。The electronic component mounting board (100) according to Example 1 is shown in FIG. 1, and the manufacturing process diagrams of this electronic component mounting board (+00) are shown in FIGS. 3 to 15 below. The explanation will be based on.
先ず、第３図及び第４図に示すよう−にポリイミド等か
らなるフィルム状の基材（ｌＯ）と、銅箔（２１）とを
接着剤（５０）を介して一体化し、その後、接続孔（４
１）を明ける。First, as shown in FIGS. 3 and 4, a film-like base material (lO) made of polyimide or the like and a copper foil (21) are integrated with an adhesive (50), and then a connecting hole is formed. (4
1).
次に、第５図及び第６図に示すように、銅箔（２１）に
エツチング加工を施すことにより、内層導体回路（２２
）を形成し、その後、内層導体回路（２２）の表面に感
光性ポリイミド等の感光性絶縁材（２３）（以下、感光
性絶縁材という）を塗布し、露光・現像を施すことによ
り、内層（２０）を形成する。Next, as shown in FIGS. 5 and 6, the inner layer conductor circuit (22) is etched by etching the copper foil (21).
), and then a photosensitive insulating material (23) such as photosensitive polyimide (hereinafter referred to as photosensitive insulating material) is applied to the surface of the inner layer conductor circuit (22), and exposed and developed to form an inner layer. (20) is formed.
次いで、第７図及び第８図に示すように、ポリイミド等
からなる絶Ｉｔ ｊ！ （３３）と′ｗ４箔（３１）と
を接着剤（５０）を介して一体化し、その後、接続孔（
４１）を明けて外層（３０）を形成し、この外層（３０
）と第５図及び第６図に形成した内！（２０）とをポリ
イミド等からなる絶縁材（２３）及び接着剤（５０）を
介して一体化する。Next, as shown in FIGS. 7 and 8, it is made of polyimide or the like. (33) and 'w4 foil (31) are integrated via adhesive (50), and then the connection hole (
41) to form an outer layer (30), and this outer layer (30
) and the inside formed in Figures 5 and 6! (20) are integrated via an insulating material (23) made of polyimide or the like and an adhesive (50).
次いで、第９図及び第１０図に示すように、外層（３０
）の銅箔（３１）にエツチング加工を施すことにより、
外層導体回路（３２）を形成する。Next, as shown in FIGS. 9 and 10, an outer layer (30
) by etching the copper foil (31),
An outer layer conductor circuit (32) is formed.
次いで、第１１図及び第１２図に示すように、感光性絶
縁剤（２３）を外層導体回路（３２）の表面に塗布し、
露光・現像を施すことにより外層（３０）を形成し、そ
の後、接続孔（４１）に導電性ペーストを埋め込んで導
電処理を施し柱状の導電体（４０）を形成する。Next, as shown in FIGS. 11 and 12, a photosensitive insulating agent (23) is applied to the surface of the outer layer conductor circuit (32),
An outer layer (30) is formed by exposure and development, and then a conductive paste is filled into the connection hole (41) and conductive treatment is performed to form a columnar conductor (40).
最後に、基材（ｌＯ〉にザグリ加工を施して凹状とし、
基材（１０）及び外層（３０）から露出している導電体
（４０）にバンブ（６０〉を形成することにより、第１
３図から第１５図に示す電子部品搭載用基板（１００）
を得る。Finally, counterbore the base material (lO) to make it concave,
By forming bumps (60) on the conductor (40) exposed from the base material (10) and the outer layer (30), the first
Electronic component mounting board (100) shown in Figures 3 to 15
get.
寛見廻１
実施例２に係る電子部品搭載用基板（１００）を第２図
に示し、以下に、この電子部品搭載用基板（１００）を
第１６図から第２１１１ｆｆｌに示す製造工作図に基づ
いて説明する。Hiromimawari 1 The electronic component mounting board (100) according to Example 2 is shown in FIG. 2, and the electronic component mounting board (100) will be manufactured below based on the manufacturing drawings shown in FIGS. 16 to 2111ffl. explain.
先ず、第１６図に示すように、接続孔（４１）を明けた
ポリイミド等からなるフィルム状の絶縁層（３３）と銅
箔（３１）とを接着剤（５０）を介して一体化し、外ｊ
ｕｌ （３０）を形成する。First, as shown in Fig. 16, a film-like insulating layer (33) made of polyimide or the like with connection holes (41) and a copper foil (31) are integrated with an adhesive (50), and then the outside is exposed. j
Form ul (30).
次に、第１７図に示すように、電子部品（７０）を実装
するための間口（１２）を形成したポリイミド等からな
るフィルム状の基材（１０）と銅箔とを接着剤を介して
一体化し、鋼箔にエツチング加工を施すことによって内
層導体回路（２２）を形成し、その後、内層導体回路（
２２）の表面に感光性ポリイミド等の感光性絶縁材（２
３） （以下、感光性絶縁材という）を塗布して内層（
２０〉を形成する。Next, as shown in FIG. 17, a film-like base material (10) made of polyimide or the like in which a frontage (12) for mounting an electronic component (70) is formed is bonded to a copper foil via an adhesive. The inner layer conductor circuit (22) is formed by integrating and etching the steel foil, and then the inner layer conductor circuit (22) is formed by etching the steel foil.
A photosensitive insulating material such as photosensitive polyimide (22) is coated on the surface of the
3) Coat the inner layer (hereinafter referred to as photosensitive insulating material) (hereinafter referred to as photosensitive insulating material)
20> is formed.
次いで、第１８図に示すように、第１６図の外層（３０
）と第１７図の内層（２０）とを接着剤（５０）を介し
て一体化し、基材（ｌＯ）の開口（１２）に感光性絶縁
材（２３〉を塗布して、電子部品搭載部（１１）を形成
する。Next, as shown in FIG. 18, the outer layer (30
) and the inner layer (20) in FIG. 17 are integrated via an adhesive (50), and a photosensitive insulating material (23) is applied to the opening (12) of the base material (lO) to form the electronic component mounting area. (11) is formed.
次いで、第１９図に示すように、外１’ｊ’ （３０）
の銅箔（３Ｉ）にエツチング加工を施すことにより外層
導体回路（３２）を形成する。Next, as shown in FIG. 19, outside 1'j' (30)
An outer layer conductor circuit (32) is formed by etching the copper foil (3I).
次いで、第２０図に示すように、外Ｍ （３０）の表面
に感光性絶縁剤（２３）を塗布し、その後、開口（１２
）側及び外層（３０）側に露光、現像等を施して接続孔
（４１）を形成する。Next, as shown in FIG. 20, a photosensitive insulating agent (23) is applied to the surface of the outer M (30), and then the opening (12) is
) side and the outer layer (30) side are subjected to exposure, development, etc. to form connection holes (41).
最後に、第２１図に示すように、接続孔（４１）にメツ
キによるブラインドスルーホール（４０）を形成して導
電体（４０）とすると共に、このブラインドスルーホー
ル（４０）の表面にドーナツ状のバンブ（６０）を形成
することにより、実施例２に係る電子部品搭載用基板（
１００）を得る。Finally, as shown in FIG. 21, a blind through hole (40) is formed by plating in the connection hole (41) to form a conductor (40), and the surface of this blind through hole (40) is shaped like a donut. By forming the bumps (60), the electronic component mounting board according to the second embodiment (
100).
（発明の効果）
以上詳述したように、本発明に係る電子部品搭載用基板
は、 「フェイスダウンボンディング形電子部品が実装
される電子部品搭載部と、当該電子部品を外部に電気的
に接続する導体回路とを備えた電子部品搭載用基板にお
いて、電子部品搭載部を凹状に形成すると共に、導体回
路を基材の片面にのみ多層に形成し、電子部品搭載部か
ら各導体回路に至る接続孔に導電処理を施してなる導電
体により電子部品の接続端子と各導体回路とを電気的に
接続するようにしたこと」をその構成上の特徴としてい
る。(Effects of the Invention) As detailed above, the electronic component mounting board according to the present invention has an electronic component mounting portion on which a face-down bonding type electronic component is mounted, and an electronic component that electrically connects the electronic component to the outside. In a substrate for mounting electronic components, the electronic component mounting portion is formed in a concave shape, and the conductor circuits are formed in multiple layers only on one side of the base material, and connections from the electronic component mounting portion to each conductor circuit are formed. Its structural feature is that the connection terminal of the electronic component and each conductor circuit are electrically connected by a conductor formed by subjecting the hole to conductive treatment.
従って、この電子部品搭載用基板によれば、電子部品搭
載部を凹状にし、ここに電子部品を収納できるようにし
たため、基材自体の厚みを薄くすることなく基材の強度
を保持したまま、電子部品を実装した際の厚みを薄くす
ることができる。Therefore, according to this board for mounting electronic components, the electronic component mounting portion is made concave so that electronic components can be stored therein, so that the strength of the base material is maintained without reducing the thickness of the base material itself. The thickness when electronic components are mounted can be reduced.
また、導体回路を多層にしたため、パターン設計の自由
度が増すと共に、導体回路の高密度化を容易に図ること
ができる。Furthermore, since the conductor circuit is multi-layered, the degree of freedom in pattern design increases and it is possible to easily increase the density of the conductor circuit.
さらに、導体回路を基材の片面のみに形成したため、リ
ール・トウ・リール方式で取り扱われる際に、従来のも
のと比較して、導体回路が基材から剥がれ難くなる。Furthermore, since the conductor circuit is formed only on one side of the base material, the conductor circuit is less likely to peel off from the base material when handled in a reel-to-reel method compared to conventional ones.
第１図は本発明に係る電子部品搭載用基板の実施例１を
示す縦断面図、第２図は実施例２に係る電子部品搭載用
基板を示す縦断面図である。
第３図〜第１５図は実施例１に係る電子部品搭載用基板
の製造工程を順を追って説明する図であって、第３図は
基材と銅箔とを一体化し接続孔を明ける工程を示す平面
図、第４図は第３図におけるＡ−Ａ断面図、第５図は内
層を形成する工程を示す平面図、第６図は第５図におけ
るＢ−Ｂ断面図、第７図は内層と外層とを一体化する工
程を示す平面図、第８図は第７図におけるＣ−Ｃ断面図
、第９図は外層導体回路を形成する工程を示す平面図、
第１０図は第９図におけるＤ−Ｄ断面図、第１１図は柱
状の導電体を形成する工程を示す平面図、第１２図は第
１１図におけるＥ−Ｅ断面図、第１３図はバンブを形成
して実施例１に係る電子部品搭載用基板を形成する工程
を示す平面図、第１４図は第１３図におけるＦ−Ｆ断面
図、第１５図は第１３図における底面図である。
第１６図〜第２１図は、実施例２に係る電子部品搭載用
基板の製造工程を順を追っ、て説明する図であって、第
１６図は外層となる基板を形成する工程を示す断面図、
第１７１１ｍは内層を形成する工程を示す断面図、第１
８図は内層と外層とを一体化する工程を示す断面図、第
１９図は外層導体回路を形成する工程を示す断面図、第
２０図は接続孔を形成する工程を示す断面図、第２１図
はブラインドスルーホール及びドーナツ状のバンブを形
成して実施例２に係る電子部品搭載用基板を形成する工
程を示す断面図である。
第２２図は従来の電子部品搭載用基板を示す断面図、第
２３図は第２２図におけるＹ−Ｙからみた底面図、第２
４図は第２２図に示す電子部品搭載用基板に凹状の電子
部品搭載部を形成した場合の断面図である。
第２５図はリール・トウ・リール方式を模式的に示す正
面図、第２６図は従来の電子部品搭載用基板がリールに
巻き付けられた状態を示す部分拡大断面図、第２７図は
本発明に係る電子部品搭載用基板がリールに巻き付けら
れた状態を示す部分拡大断面図である。
符 号 の 説 明
１００・・・電子部品搭載用基板、２００・・・従来の
電子部品搭載用基板、ｌＯ・・・基材、１１・・・電子
部品搭載部、１２・・・開口、２０・・・内層、２１・
・・銅箔、２２・・・内層導体回路、２３・・・（感光
性）絶縁材、３ｏ・・・外層、３１・・・銅箔、３２・
・・外層導体回路、３３・−・絶縁層、４ｏ・・・導電
体（ブラインドスルーホール）、４１・・・接続孔、５
ｏ・・・接着剤、６０・・・バンブ、７０・・・電子部
品、７１・・・接続端子、８０・・・従来の電子部品搭
載用基板の導体回路、８１・・・配線導体、８２・・・
導電端子、８３導電性スルーホール、９０・・・リール
。FIG. 1 is a vertical sectional view showing a first embodiment of an electronic component mounting board according to the present invention, and FIG. 2 is a vertical sectional view showing an electronic component mounting board according to a second embodiment. 3 to 15 are diagrams illustrating step-by-step the manufacturing process of the electronic component mounting board according to Example 1, and FIG. 3 shows the step of integrating the base material and the copper foil and making connection holes. 4 is a sectional view taken along the line A-A in FIG. 3, FIG. 5 is a plan view showing the step of forming the inner layer, FIG. 6 is a sectional view taken along line BB in FIG. 5, and FIG. is a plan view showing the step of integrating the inner layer and the outer layer, FIG. 8 is a cross-sectional view taken along line C-C in FIG. 7, and FIG. 9 is a plan view showing the step of forming the outer layer conductor circuit.
10 is a sectional view taken along line D-D in FIG. 9, FIG. 11 is a plan view showing the process of forming a columnar conductor, FIG. 12 is a sectional view taken along line E-E in FIG. 11, and FIG. 13 is a bump-shaped conductor. FIG. 14 is a sectional view taken along line FF in FIG. 13, and FIG. 15 is a bottom view in FIG. 13. 16 to 21 are diagrams illustrating the manufacturing process of the electronic component mounting board according to Example 2 in order, and FIG. 16 is a cross-sectional view showing the process of forming the board to be the outer layer. figure,
No. 1711m is a cross-sectional view showing the process of forming the inner layer, No. 1
8 is a cross-sectional view showing the process of integrating the inner layer and the outer layer, FIG. 19 is a cross-sectional view showing the process of forming an outer layer conductor circuit, FIG. 20 is a cross-sectional view showing the process of forming connection holes, and FIG. The figure is a sectional view showing a process of forming a blind through hole and a doughnut-shaped bump to form an electronic component mounting board according to the second embodiment. Fig. 22 is a sectional view showing a conventional electronic component mounting board, Fig. 23 is a bottom view seen from Y-Y in Fig. 22,
FIG. 4 is a sectional view of the case where a concave electronic component mounting portion is formed on the electronic component mounting substrate shown in FIG. 22. Fig. 25 is a front view schematically showing the reel-to-reel system, Fig. 26 is a partially enlarged cross-sectional view showing a state in which a conventional electronic component mounting board is wound around a reel, and Fig. 27 is a front view schematically showing the reel-to-reel system. FIG. 2 is a partially enlarged sectional view showing a state in which the electronic component mounting board is wound around a reel. Explanation of symbols 100... Substrate for mounting electronic components, 200... Conventional substrate for mounting electronic components, 1O... Base material, 11... Electronic component mounting portion, 12... Opening, 20 ...inner layer, 21.
... copper foil, 22 ... inner layer conductor circuit, 23 ... (photosensitive) insulating material, 3o ... outer layer, 31 ... copper foil, 32.
...Outer layer conductor circuit, 33...Insulating layer, 4o...Conductor (blind through hole), 41...Connection hole, 5
o...Adhesive, 60...Bump, 70...Electronic component, 71...Connection terminal, 80...Conductor circuit of conventional electronic component mounting board, 81...Wiring conductor, 82 ...
Conductive terminal, 83 conductive through hole, 90... reel.
Claims (1)
電子部品搭載部と、当該電子部品を外部に電気的に接続
する導体回路とを備えた電子部品搭載用基板において、 前記電子部品搭載部を凹状に形成すると共に、前記導体
回路を基材の片面にのみ多層に形成し、前記電子部品搭
載部から前記各導体回路に至る接続孔に導電処理を施し
てなる導電体により前記電子部品の接続端子と前記各導
体回路とを電気的に接続するようにしたことを特徴とす
る電子部品搭載用基板。[Scope of Claims] An electronic component mounting board comprising an electronic component mounting portion on which a face-down bonding type electronic component is mounted, and a conductor circuit that electrically connects the electronic component to the outside, comprising: The electronic component is formed by forming a concave portion, forming the conductor circuit in multiple layers only on one side of the base material, and applying conductive treatment to the connection hole extending from the electronic component mounting portion to each of the conductor circuits. 1. A board for mounting an electronic component, wherein the connection terminal and each of the conductor circuits are electrically connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1197440A JP2787230B2 (en) | 1989-07-29 | 1989-07-29 | Substrate for mounting electronic components |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1197440A JP2787230B2 (en) | 1989-07-29 | 1989-07-29 | Substrate for mounting electronic components |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0362537A true JPH0362537A (en) | 1991-03-18 |
| JP2787230B2 JP2787230B2 (en) | 1998-08-13 |
Family
ID=16374544
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1197440A Expired - Lifetime JP2787230B2 (en) | 1989-07-29 | 1989-07-29 | Substrate for mounting electronic components |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2787230B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08162767A (en) * | 1994-12-08 | 1996-06-21 | Nec Corp | Ball grid array package mounting structure |
| US6005766A (en) * | 1995-05-24 | 1999-12-21 | Nec Corporation | Multi-layered printed circuit board and its manufacturing method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5457958U (en) * | 1977-09-29 | 1979-04-21 | ||
| JPS5999794A (en) * | 1982-11-29 | 1984-06-08 | 株式会社デンソー | Thick film circuit device |
| JPS62265744A (en) * | 1986-05-13 | 1987-11-18 | Mitsubishi Electric Corp | Semiconductor device |
-
1989
- 1989-07-29 JP JP1197440A patent/JP2787230B2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5457958U (en) * | 1977-09-29 | 1979-04-21 | ||
| JPS5999794A (en) * | 1982-11-29 | 1984-06-08 | 株式会社デンソー | Thick film circuit device |
| JPS62265744A (en) * | 1986-05-13 | 1987-11-18 | Mitsubishi Electric Corp | Semiconductor device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08162767A (en) * | 1994-12-08 | 1996-06-21 | Nec Corp | Ball grid array package mounting structure |
| US6005766A (en) * | 1995-05-24 | 1999-12-21 | Nec Corporation | Multi-layered printed circuit board and its manufacturing method |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2787230B2 (en) | 1998-08-13 |
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