JPH0362543A - Marking of defective semiconductor device on semiconductor wafer - Google Patents

Marking of defective semiconductor device on semiconductor wafer

Info

Publication number
JPH0362543A
JPH0362543A JP19757789A JP19757789A JPH0362543A JP H0362543 A JPH0362543 A JP H0362543A JP 19757789 A JP19757789 A JP 19757789A JP 19757789 A JP19757789 A JP 19757789A JP H0362543 A JPH0362543 A JP H0362543A
Authority
JP
Japan
Prior art keywords
marking
semiconductor wafer
pellets
defective
pellet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19757789A
Other languages
Japanese (ja)
Inventor
Masakazu Hirokane
広兼 正和
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Yamaguchi Ltd
Original Assignee
NEC Yamaguchi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Yamaguchi Ltd filed Critical NEC Yamaguchi Ltd
Priority to JP19757789A priority Critical patent/JPH0362543A/en
Publication of JPH0362543A publication Critical patent/JPH0362543A/en
Pending legal-status Critical Current

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To surely mark all defective pellets by automatically recognizing marks put at the time of water measurement and making the pellet coordinates of a semiconductor wafer measuring device coincident with those of a device exclusively used for the marking. CONSTITUTION:All the pellets on a semiconductor wafer 2 taken out from a carrier 1 are measured with a probe 3 of a semiconductor wafer measuring instrument 5 and, at the same time, designated pellets are marked with a marker 4. The mapping data obtained as a measured result of the semiconductor wafer 2 are stored on a storing medium of a device 7 exclusively used for the marking. Then the wafer 2 all the pellets of which have been measured is taken out from the carrier 1 and the device 7 recognized the pellets with marks 8 put at the time of wafer measurement by using a CCD 6 and, after making the pellet coordinates at the measuring time coincident with those at the marking time, marking of the defective pellets is performed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体ウェハーの検査工程において、半導体ウ
ェハー上の不良半導体装置へのマーキング方法に関する
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for marking defective semiconductor devices on a semiconductor wafer in a semiconductor wafer inspection process.

〔従来の技術〕[Conventional technology]

従来、不良半導体装置(以下、不良ペレットと称す)の
マツピングデータを基にマーキング専用装置でマーキン
グする場合に、半導体ウェハー測定時のペレットの座標
とマーキング時のペレットの座標とを一致させる方法と
して、半導体ウェハー上にターゲットとなるパターンが
ある場合は、そのターゲットの認識機能を用いていたが
、ターゲットの無い半導体ウェハーは座標の一致を確実
にする方法が無く、アライメント装置で計算した座標を
そのまま使用していた。
Conventionally, when marking with a dedicated marking device based on mapping data of defective semiconductor devices (hereinafter referred to as defective pellets), a method has been used to match the coordinates of the pellet at the time of semiconductor wafer measurement with the coordinates of the pellet at the time of marking. , if there was a target pattern on the semiconductor wafer, the target recognition function was used, but for semiconductor wafers without a target, there was no way to ensure that the coordinates matched, so the coordinates calculated by the alignment device were used as they were. I was using it.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の不良ペレットへのマーキング方法は、タ
ーゲットパターンの無い半導体ウェハーでは、半導体ウ
ェハー測定装置のペレット座標とマーキング専用装置の
ペレット座標とを確実に一致させることができないとい
う欠点があり、座標がずれて誤ったマーキングが行われ
る可能性があった。
The above-mentioned conventional marking method for defective pellets has the disadvantage that, for semiconductor wafers without a target pattern, the pellet coordinates of the semiconductor wafer measuring device and the pellet coordinates of the marking-only device cannot be matched reliably, and the coordinates are There was a possibility of misalignment and incorrect marking.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、半導体ウェハー上の不良ペレットのマツピン
グデータを記憶媒体にて記憶し、マーキング専用装置に
てマーキングする半導体ウェハー上の不良半導体装置へ
のマーキング方法において、半導体ウェハー測定時に半
導体ウェハー上の指定したペレットにマーキングを施し
、次いでマーキング専用装置で不良ペレットへのマーキ
ングを開始する前に、前記半導体ウェハー測定時にマー
キングしたマークを自動認識することにより半導体ウェ
ハー測定装置でのペレット座標とマーキング専用装置で
のペレット座標とを一致させる半導体ウェハー上の不良
半導体装置へのマーキング方法である。
The present invention provides a method for marking defective semiconductor devices on a semiconductor wafer in which mapping data of defective pellets on a semiconductor wafer is stored in a storage medium and marked with a dedicated marking device. After marking the specified pellet, before starting marking defective pellets using the dedicated marking device, the marks made during the semiconductor wafer measurement are automatically recognized, and the pellet coordinates and the marking device are automatically recognized by the semiconductor wafer measuring device. This is a method of marking defective semiconductor devices on a semiconductor wafer by matching the pellet coordinates with the pellet coordinates.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例を説明するための概略図であ
る。半導体ウェハー測定時には、キャリア1から取り出
された半導体ウェハー2上のペレットを半導体ウェハー
測定装置5のプローブ針3で全数測定すると共に、指定
したペレットをマーカー4でマーキングする。第2図の
平面図に、そのマーキング跡8をつけた半導体ウェハー
2上のペレットを示す。この半導体ウェハー測定結果の
マツピングデータは、マーキング専用装置7の記憶媒体
に記憶される。
FIG. 1 is a schematic diagram for explaining one embodiment of the present invention. At the time of semiconductor wafer measurement, all pellets on the semiconductor wafer 2 taken out from the carrier 1 are measured with the probe needle 3 of the semiconductor wafer measurement device 5, and designated pellets are marked with the marker 4. The pellet on the semiconductor wafer 2 with the marking marks 8 is shown in the plan view of FIG. The mapping data of this semiconductor wafer measurement result is stored in the storage medium of the marking-only device 7.

次いで、ペレットが全数測定された半導体ウェハー2を
キャリア1から取り出し、マーキング専用装置7にてC
CDカメラ6を使用し、半導体ウェハー測定時にマーキ
ング跡8をつけたペレットを認識し、測定時のペレット
座標とマーキング時のペレット座標とを一致させた後に
マーカー4にて不良ペレットのマーキングを開始する。
Next, the semiconductor wafer 2 on which all pellets have been measured is taken out from the carrier 1 and marked with a marking device 7.
The CD camera 6 is used to recognize the pellet with the marking mark 8 during the semiconductor wafer measurement, and after matching the pellet coordinates at the time of measurement with the pellet coordinates at the time of marking, marking of defective pellets is started with the marker 4. .

第3図の平面図は、測定したペレットの指定範囲9内で
、最初に測定した不良ペレットにマーキング跡8をつけ
た半導体ウェハー2を示している。この場合は、半導体
ウェハー測定装置5でマーキング跡8をつけたペレット
を、測定データを基に不良ペレットとするとにより、マ
ーキング専用装置7で不良ペレットを認識する際、良品
ペレットを認識用ペレットとしてマーキングしてしまう
ことがなく、確実に不良ペレットにマーキングすること
ができる。
The plan view of FIG. 3 shows the semiconductor wafer 2 with a marking mark 8 on the first measured defective pellet within the specified range 9 of the measured pellets. In this case, the pellets with marking marks 8 made by the semiconductor wafer measuring device 5 are determined to be defective pellets based on the measurement data, and when the marking device 7 recognizes the defective pellets, the good pellets are marked as recognition pellets. It is possible to reliably mark defective pellets without causing any damage.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明を採用することにより、半導
体ウェハーを測定する装置と、半導体ウェハー内の不良
ペレットにマーキングする装置とを別々に持ったシステ
ムで、半導体ウェハー測定時に指定チップにマーキング
することにより、ターゲットとなるパターンの無いウェ
ハーでも、半導体ウェハー測定装置のペレット座標とマ
ーキング専用装置のペレット座標とを、半導体ウェハー
測定時にマーキングしたペレットを認識することにより
一致させることができるという効果がある。
As explained above, by adopting the present invention, it is possible to mark designated chips when measuring semiconductor wafers using a system that separately has a device for measuring semiconductor wafers and a device for marking defective pellets within semiconductor wafers. This has the effect that even on a wafer without a target pattern, the pellet coordinates of the semiconductor wafer measuring device and the pellet coordinates of the marking-only device can be matched by recognizing the marked pellet during semiconductor wafer measurement.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を説明するための概略図、第
2図及び第3図はそれぞれ本発明の一実施例を説明する
ための半導体ウェハーの平面図である。 1・・・キャリア、2・・・半導体ウェハー 3・・・
プローブ針、4・・・マーカー 5・・・半導体ウェハ
ー測定装置、6・・・CCDカメラ、7・・・マーキン
グ専用装置、8・・・マーキング跡、9・・・指定範囲
FIG. 1 is a schematic diagram for explaining an embodiment of the present invention, and FIGS. 2 and 3 are plan views of a semiconductor wafer, respectively, for explaining an embodiment of the present invention. 1...Carrier, 2...Semiconductor wafer 3...
Probe needle, 4...Marker 5...Semiconductor wafer measuring device, 6...CCD camera, 7...Dedicated marking device, 8...Marking trace, 9...Specified range.

Claims (1)

【特許請求の範囲】[Claims] 半導体ウェハー上の不良ペレットのマッピングデータを
記憶媒体にて記憶し、マーキング専用装置にてマーキン
グする半導体ウェハー上の不良半導体装置へのマーキン
グ方法において、半導体ウェハー測定時に半導体ウェハ
ー上の指定したペレットにマーキングを施し、次いでマ
ーキング専用装置で不良ペレットへのマーキングを開始
する前に、前記半導体ウェハー測定時にマーキングした
マークを自動認識することにより半導体ウェハー測定装
置でのペレット座標とマーキング専用装置でのペレット
座標とを一致させることを特徴とする半導体ウェハー上
の不良半導体装置へのマーキング方法。
In a method for marking defective semiconductor devices on a semiconductor wafer, in which mapping data of defective pellets on a semiconductor wafer is stored in a storage medium and marked with a dedicated marking device, specified pellets on the semiconductor wafer are marked when measuring the semiconductor wafer. Then, before starting marking defective pellets with a dedicated marking device, by automatically recognizing the marks marked during the semiconductor wafer measurement, the pellet coordinates in the semiconductor wafer measuring device and the pellet coordinates in the marking device can be determined. 1. A method for marking defective semiconductor devices on a semiconductor wafer, the method comprising: matching the .
JP19757789A 1989-07-28 1989-07-28 Marking of defective semiconductor device on semiconductor wafer Pending JPH0362543A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19757789A JPH0362543A (en) 1989-07-28 1989-07-28 Marking of defective semiconductor device on semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19757789A JPH0362543A (en) 1989-07-28 1989-07-28 Marking of defective semiconductor device on semiconductor wafer

Publications (1)

Publication Number Publication Date
JPH0362543A true JPH0362543A (en) 1991-03-18

Family

ID=16376811

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19757789A Pending JPH0362543A (en) 1989-07-28 1989-07-28 Marking of defective semiconductor device on semiconductor wafer

Country Status (1)

Country Link
JP (1) JPH0362543A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60103639A (en) * 1983-11-10 1985-06-07 Telmec Co Ltd Wafer chip selecting method
JPS63136542A (en) * 1986-11-27 1988-06-08 Tokyo Electron Ltd Positioning method for semiconductor wafer chip

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60103639A (en) * 1983-11-10 1985-06-07 Telmec Co Ltd Wafer chip selecting method
JPS63136542A (en) * 1986-11-27 1988-06-08 Tokyo Electron Ltd Positioning method for semiconductor wafer chip

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