JPH0362605A - Frequency modulation circuit - Google Patents
Frequency modulation circuitInfo
- Publication number
- JPH0362605A JPH0362605A JP19680789A JP19680789A JPH0362605A JP H0362605 A JPH0362605 A JP H0362605A JP 19680789 A JP19680789 A JP 19680789A JP 19680789 A JP19680789 A JP 19680789A JP H0362605 A JPH0362605 A JP H0362605A
- Authority
- JP
- Japan
- Prior art keywords
- output
- signal
- oscillator
- phase
- frequency modulation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010354 integration Effects 0.000 claims abstract description 5
- 239000013078 crystal Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野]
本発明は、周波数変調回路に関し、特に出力信号の低雑
音化と低価格化に最適な周波数変調回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a frequency modulation circuit, and more particularly to a frequency modulation circuit that is optimal for reducing output signal noise and cost.
[従来の技術] 従来のこの種の周波数変調回路を第2図に示す。[Conventional technology] A conventional frequency modulation circuit of this type is shown in FIG.
第2図において、周波数変調信号は入力端子25に印加
される。この周波数変調回路は、変調信号によって周波
数変調が可能な電圧制御基準発振器19と、位相比較器
12と、ループアンプ14と、電圧制御発振器上5とか
ら位相同期ループを構成している。In FIG. 2, a frequency modulated signal is applied to input terminal 25. In FIG. This frequency modulation circuit constitutes a phase-locked loop from a voltage-controlled reference oscillator 19 whose frequency can be modulated by a modulation signal, a phase comparator 12, a loop amplifier 14, and a voltage-controlled oscillator 5.
この位相同期ループによって、電圧制御発振器15の出
力信号の位相は電圧制御基準発振器19の出力信号の位
相に追従する。従って、電圧制御基準発振器19の出力
信号が周波数変調されると電圧制御発振器15の出力信
号も周波数変調され、結果として出力端子18から周波
数変調出力が得られる。Due to this phase-locked loop, the phase of the output signal of the voltage controlled oscillator 15 follows the phase of the output signal of the voltage controlled reference oscillator 19. Therefore, when the output signal of the voltage controlled reference oscillator 19 is frequency modulated, the output signal of the voltage controlled oscillator 15 is also frequency modulated, and as a result, a frequency modulated output is obtained from the output terminal 18.
[発明が解決しようとする課題]
上述した従来の周波数変調回路は、電圧制御基準発振器
19の出力に周波数変調をかけるため、電圧制御基準発
振器19として一般的に使用される水晶発振器を考えた
場合、変調可能な電圧制御水晶発振器が必要となる。電
圧制御水晶発振器は、通常の水晶発振器に比べて回路が
複雑で高価となり、また、変調をかけるために回路のQ
(先鋭液)が低下して雑音特性が劣化するという問題点
がある。[Problems to be Solved by the Invention] The conventional frequency modulation circuit described above applies frequency modulation to the output of the voltage controlled reference oscillator 19, so when considering a crystal oscillator that is generally used as the voltage controlled reference oscillator 19. , a voltage-controlled crystal oscillator that can be modulated is required. Voltage-controlled crystal oscillators have more complex and expensive circuits than regular crystal oscillators, and the Q of the circuit is higher due to modulation.
There is a problem that the noise characteristics deteriorate due to a decrease in the sharpening liquid.
[課題を解決するための手段]
本発明は、上記の問題点に鑑みてなされたもので、低価
格で雑音特性の良い周波数変調回路を得ることを目的と
し、この目的を達成するために、基準発振器と、基準発
振器の出力と電圧制御発振器の出力の位相を比較する位
相比較器と、周波数変調入力信号を積分する積分回路と
、積分回路の出力と位相比較器の出力を加算する加算器
と、加算器の出力電圧によって周波数制御される電圧制
御発振器とを設けるように構成されている。[Means for Solving the Problems] The present invention has been made in view of the above problems, and aims to obtain a frequency modulation circuit with good noise characteristics at a low cost. A reference oscillator, a phase comparator that compares the phases of the output of the reference oscillator and the output of the voltage controlled oscillator, an integrating circuit that integrates the frequency modulated input signal, and an adder that adds the output of the integrating circuit and the output of the phase comparator. and a voltage controlled oscillator whose frequency is controlled by the output voltage of the adder.
[実施例] 以下、本発明の実施例を図面に基づいて説明する。[Example] Embodiments of the present invention will be described below based on the drawings.
第1図は、本発明による周波数変調回路の一実施例を示
すブロック図である。FIG. 1 is a block diagram showing one embodiment of a frequency modulation circuit according to the present invention.
第1図において、基準発振器1の出力信号と電圧制御発
振器5の出力信号は、位相比較器2で位相比較され、誤
差信号は加算器3に供給される。In FIG. 1, the output signal of a reference oscillator 1 and the output signal of a voltage controlled oscillator 5 are phase-compared by a phase comparator 2, and an error signal is supplied to an adder 3.
周波数変調信号は入力端子7から積分回路6に印加され
、位相変調信号に変換されて加算器3に供給される。The frequency modulation signal is applied from the input terminal 7 to the integrating circuit 6, converted into a phase modulation signal, and supplied to the adder 3.
従って加算器3では、位相比較器2の出力である誤差信
号と積分回路6の出力である位相変調信号とが加算され
る。加算器3の出力信号はループアンプ4で増幅され、
電圧制御発振器5の出力信号の位相が制御される。Therefore, in the adder 3, the error signal that is the output of the phase comparator 2 and the phase modulation signal that is the output of the integrating circuit 6 are added. The output signal of adder 3 is amplified by loop amplifier 4,
The phase of the output signal of voltage controlled oscillator 5 is controlled.
この構成で、電圧制御発振器5に位相同期をかけている
ため、電圧制御発振器5の出力位相は、基準発振器上の
出力位相と、積分回路6で周波数変調信号から位相変調
信号に変換された信号の位相とを加算した位相に追従す
ることになる。With this configuration, since the voltage controlled oscillator 5 is phase synchronized, the output phase of the voltage controlled oscillator 5 is the output phase of the reference oscillator and the signal converted from the frequency modulation signal to the phase modulation signal by the integrating circuit 6. It follows the phase obtained by adding the phase of .
すなわち、電圧制御発振器5の出力信号は基準発振器上
の出力信号によって制御され、かつ周波数変調信号によ
って周波数変調がかけられることになり、結果として出
力端子8から周波数変調出力が得られる。That is, the output signal of the voltage controlled oscillator 5 is controlled by the output signal on the reference oscillator and frequency modulated by the frequency modulation signal, resulting in a frequency modulated output from the output terminal 8.
これにより、設計が困難であり、高価で雑音特性の悪い
電圧制御基準発振器19(第2図)を用いることなく、
周波数変調回路を構成でき、設計が容易であり、低価格
で雑音特性の良い周波数変調回路が得られる。This eliminates the need for the voltage-controlled reference oscillator 19 (FIG. 2), which is difficult to design, expensive, and has poor noise characteristics.
A frequency modulation circuit can be constructed, the design is easy, and a frequency modulation circuit with good noise characteristics can be obtained at a low cost.
[発明の効果コ
以上で説明したように、本発明は、基準発振器と、基準
発振器の出力と電圧制御発振器の出力の位相を比較する
位相比較器と、周波数変調入力信号を積分する積分回路
と、積分回路の出力と位相比較器の出力を加算する加算
器と、加算器の出力電圧によって周波数制御される電圧
制御発振器とを設けるように構成したので、設計が容易
であり、かつ低価格で雑音特性の良い周波数変調回路を
得ることが可能となる。[Effects of the Invention] As explained above, the present invention includes a reference oscillator, a phase comparator that compares the phases of the output of the reference oscillator and the output of the voltage controlled oscillator, and an integrating circuit that integrates a frequency modulated input signal. The design is easy and inexpensive because it is configured to include an adder that adds the output of the integrating circuit and the output of the phase comparator, and a voltage-controlled oscillator whose frequency is controlled by the output voltage of the adder. It becomes possible to obtain a frequency modulation circuit with good noise characteristics.
第1図は、本発明による周波数変調回路の一実施例を示
すブロック図、
第2図は、従来の周波数変調回路を示すブロック図であ
る。
l ・・・・基準発振器
2 ・・・・位相比較器
3 ・・・・加算器
ループアンプ
電圧制御発振器
積分回路
入力端子
出力端子FIG. 1 is a block diagram showing an embodiment of a frequency modulation circuit according to the present invention, and FIG. 2 is a block diagram showing a conventional frequency modulation circuit. l... Reference oscillator 2... Phase comparator 3... Adder loop amplifier voltage controlled oscillator integration circuit input terminal output terminal
Claims (1)
出力の位相を比較する位相比較器と、周波数変調入力信
号を積分する積分回路と、該積分回路の出力と前記位相
比較器の出力を加算する加算器と、該加算器の出力電圧
によって周波数制御される電圧制御発振器とを有する周
波数変調回路。a reference oscillator, a phase comparator that compares the phases of the output of the reference oscillator and the output of the voltage controlled oscillator, an integration circuit that integrates the frequency modulated input signal, and adds the output of the integration circuit and the output of the phase comparator. and a voltage controlled oscillator whose frequency is controlled by the output voltage of the adder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19680789A JPH0362605A (en) | 1989-07-31 | 1989-07-31 | Frequency modulation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19680789A JPH0362605A (en) | 1989-07-31 | 1989-07-31 | Frequency modulation circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0362605A true JPH0362605A (en) | 1991-03-18 |
Family
ID=16363977
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19680789A Pending JPH0362605A (en) | 1989-07-31 | 1989-07-31 | Frequency modulation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0362605A (en) |
-
1989
- 1989-07-31 JP JP19680789A patent/JPH0362605A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS5915123Y2 (en) | Phase lock loop FM detection device | |
| JPH0362605A (en) | Frequency modulation circuit | |
| US7205849B2 (en) | Phase locked loop including an integrator-free loop filter | |
| JP3712141B2 (en) | Phase-locked loop device | |
| JPH0328606Y2 (en) | ||
| JPS59827Y2 (en) | phase synchronized circuit | |
| JP2006186576A (en) | Phase-locked loop frequency synthesizer | |
| JPS63131705A (en) | Synthesizer modulation circuit | |
| JPH0797745B2 (en) | Phase synchronization circuit | |
| JPS62285521A (en) | frequency synthesizer | |
| JPH06303131A (en) | Pll circuit | |
| JPH0272718A (en) | Frequency multiplier circuit | |
| JPS6298806A (en) | fm modulator | |
| JPH0732366B2 (en) | Wireless transmitter | |
| JPH0380607A (en) | Satellite broadcast receiver | |
| JPS585007A (en) | Frequency modulator | |
| JPS6127923B2 (en) | ||
| JPH01124724U (en) | ||
| JPH02128521A (en) | Phase locked loop | |
| JPS6320918A (en) | Phase locked oscillation circuit | |
| JPH02294119A (en) | phase adjustment device | |
| JPS6374206A (en) | Phase modulation system | |
| JPS62274804A (en) | fm modulator | |
| JPH06326518A (en) | Frequency modulating circuit | |
| JPS6168525U (en) |