JPH0362941A - Base material for mounting integrated circuit - Google Patents

Abstract

PURPOSE:To conduct diagnostic tests simply and accurately by providing a terminal part having an area larger than the terminal parts of other conducting wires on the specified conducting wire which is connecting to a self-diagnostic testing circuit provided in an integrated circuit element to be mounted among conducting wires formed on an insulating base body. CONSTITUTION:Seven conductive leads 71' among many conductive leads 71 and 71' formed on an insulating film 70 are elongated downward relatively long. A testing pad part (terminal part having the second size) 71c which is wider than the width of the conductive lead 71' and has a large area is provided at the tip of the lead 71' as a unitary body. A tip part (terminal part having the first size) 71d which has the same width as the lead 71 is terminated at the tip of the conductive lead 71 other than said seven conductive leads 71' under the state wherein the tip part rides on the outer part of an outer lead hole 703. The diagnosis of the internal state of an integrated circuit element can be conducted through the terminal parts 71c having the second size which are provided at the second conducting wires 71' of a mounting base material 7.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a mounting base material used in mounting technology for integrated circuit elements, and in particular, to a mounting base material used for mounting technology for integrated circuit elements, and in particular, for mounting an IC chip having a test circuit for self-diagnosis provided therein. TAB (Tape Autos+a
The present invention is suitable for attaching, for example, a printed circuit board by the ted bonding method to a film carrier used for mounting on a circuit board.

[Conventional technology]

As one of the IC mounting techniques, the above-mentioned TAB method is used. Conventionally, in this TAB method, a film carrier 1 as shown in FIG. 3 has been used (for example,
Japan Semiconductor Year ff1 1988 edition P403-P404
, published by Press Journal). This film carrier 1 includes a long film base 10 made of an insulating material such as polyimide resin, and a large number of conductive leads 11 formed in a predetermined pattern on the upper surface of the base 10.

The base IO has a sprocket hole 101 that serves as a processing reference,
An outer lead hole 10 that defines a device hole 102 for attaching an IC chip (semiconductor integrated circuit element) (not shown) and an outer lead portion 11b of the conductive lead 11
3 is formed. A support ring 104 is formed between the device hole 102 and the outer lead hole 103, and the conductive lead II on the inner side of the support ring 104 is connected to the finger-shaped inner lead portion 11a.
It becomes.

An IC chip has a large number of protruding electrodes (
bumps) are bonded to the inner lead portions 11a to electrically connect them and to hold them on the film carrier 1.

[Problem to be solved by the invention]

In the conventional TAB method described above, the device hole 102
Various electrical tests on the IC chip mounted on the film carrier 1 are performed through the test pad portion 11c (see FIG. 3) of the conductive lead 11 provided on the film carrier 1.

That is, as is well known, the internal state of the IC chip attached to the film carrier 1 must be electrically tested; in this case, conventionally, each conductive lead 11
The test pins of the test machine are sequentially applied to the test pad section 11c of the IC to output a test signal pattern.
Diagnosing the internal state of the chip.

However, when the number of terminals on an IC chip increases to, for example, 150 or more, the size and formation position of the test pad section are severely restricted, especially due to space problems for forming lead patterns. This makes it difficult to accurately apply the test bottle to the minute test pads, and the number of test pads also increases, making test operations extremely troublesome and making test errors more likely. .

On the other hand, recently, IC chips have been developed in which a test structure for self-diagnosis, that is, a test circuit is incorporated into the IC chip itself, thereby simplifying the above-mentioned electrical tests. This IC chip has inside thereof a group of latches connected in a loop to a control logic circuit, and each latch is connected to a circuit to be diagnosed within the chip. By detecting the states of these latch groups, all internal states of the IC chip can be diagnosed. Note that, when diagnosing this internal state, a test signal pattern is input/output only from a specific terminal connected to the control logic circuit.

An object of the present invention is to provide a mounting base material suitable for use when mounting an IC chip provided with a test circuit for self-diagnosis as described above on a board using the TAB method. .

[Means to solve the problem]

As illustrated in FIG. 1, the integrated circuit element mounting substrate 7 of the present invention for achieving the above object has a large number of connection terminals and is provided with a test circuit for self-diagnosis inside. an insulating base 70 for mounting an integrated circuit element; and a base 70 formed on the base 70 into a predetermined shape for connection with the connection terminal of the integrated circuit element; A first conducting wire 71 having a terminal portion 71d of a first size on the side that is not connected; and a terminal portion 71d of the first size of the first conducting wire 71.
The base body 7 has a terminal portion 71C having a second size larger than the base body 7 on one end side, and is connected at the other end side to a connecting terminal connected to the test circuit of the integrated circuit element.
0 and a second conducting wire 71' formed in a predetermined shape.

The insulating base 70 can be made of polyimide resin, glass epoxy resin, BT resin, polyester resin, etc. in the form of a film, for example.

The first conductive wire 71 and the second conductive wire 71' are, for example, conductive wires formed on an insulating material film that is the base 70.
It can be formed by photo-etching a copper foil adhered onto the insulating film into a predetermined pattern. Alternatively, it may be formed by a plating method such as electroless plating or an electrodeposition method. The material of the conductive lead 71 may also be other than copper or silver; for example, Kovar may be used.

[Effect]

Inner lead bonding of an integrated circuit element can be performed on the mounting base material 7 of the present invention using the same procedure as in the prior art. Then, the integrated circuit element supported by the mounting base material 7 may be resin-encapsulated by, for example, a transfer molding method or a potting method in the same manner as in the past.

Diagnosis of the internal state of the integrated circuit element can be performed through the second-sized terminal portion 71c provided on the second conducting wire 71' of the mounting base material 7 at any of the stages described above.

Further, the first conductive wire 71 and the second conductive wire 7 are connected using the terminal portion 71d of the first size and the terminal portion 71c of the second size.
An electrical test may also be performed to check the connection between 1' and the integrated circuit element.

Then, after the integrated circuit element whose internal state has been diagnosed is separated from the mounting base material 7 at the tip of the outer lead portion 71b of each conductive wire 71, 71', a printed circuit board, etc., is mounted on the board. will be implemented.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to FIGS. 1 and 2.

FIG. 1 is a plan view of essential parts of a film carrier for mounting an IC chip according to an embodiment of the present invention. In the figure, a film carrier 7, which is a base material for mounting an integrated circuit element, is made by photo-etching an insulating film 70 made of polyimide resin and a copper foil adhered onto the insulating film 70, as is well known in the art. It has a large number of conductive leads 71, 71' formed in a predetermined pattern.

The insulating material film 70 has a sprocket hole 701, a device hole 702, and an outer lead hole 703 similar to the conventional one.
is formed by punching or the like. A support ring 704 is formed between the device hole 702 and the outer lead hole 703.

Each conductive lead 71.71' is connected to this support ring 7.
An inner lead portion 71a is provided inside the IC chip 04 and is bonded to a large number of protruding electrodes (bumps) formed on the upper surface of the IC chip 8, which will be described later.
04 and an outer lead portion 71b defined by the outer lead hole 703.

In this embodiment, as shown in the figure, an insulating material film 70
Seven conductive leads 71' of the large number of conductive leads 71, 71' formed above extend downward relatively long, and have a line width thicker than the conductive lead 71' at their tips. A large area test pad portion (second size terminal portion) 71c is integrally provided. The conductive leads 71 other than these seven conductive leads 71' are
Tip part with the same line width as those (first size terminal part) 7
1d ends in a state where it hangs over the outer periphery of the outer lead hole 703.

Test pad section 71 provided on conductive lead 71'
c are arranged at approximately equal intervals along one edge of the film carrier 7.

Figure 2 shows the L attached to this film carrier 7.
It shows an IC chip 8 (integrated circuit element) made of an SI chip, and inside the IC chip 8 there is a control logic circuit 81.
is provided. This control logic circuit 81 includes seven conductive leads 71 provided with test pad portions 71c.
A protruding electrode (not shown) is attached to the inner lead portion 71a of '.
In addition, within the chip, it is connected in a loop to all latch circuits 82 that serve as check points for internal logic circuits.

When performing a test, a test device including an automatic test pattern generator is connected to the test pad section 71c, and a predetermined test pattern signal is sent to the control logic circuit 81.

The control logic circuit 81 sequentially scans the latch circuits 82 connected in a loop according to the test pattern. Thereby, data corresponding to the state of the internal logic circuit can be obtained from each latch circuit 82, and by extracting this data to the outside and analyzing it, the internal state of the IC chip 8 can be diagnosed.

In this embodiment, the test pad portion 71c is provided only on the seven conductive leads 71' connected to the protruding electrodes (bumps) connected to the control logic circuit 81 provided inside the IC chip 8. Therefore, the arrangement space of these test pad sections 71c can be selected relatively freely, and the size of each test pad section 71c can also be set to be quite large.

For example, in the illustrated example, seven test pad sections 71
c are arranged in a row along one edge of the film carrier 7 at approximately equal intervals. With this configuration, connection with a test device can be easily performed by, for example, sandwiching the necessary test pad portion 71c between clip-shaped connection terminals.

In the above embodiment, the test pad portion 71c was provided only on the seven conductive leads 71' connected to the control logic circuit 81 provided at one corner of the IC chip 8. The position and number of leads are not limited to those in the above embodiment, and may vary depending on the IC to be mounted.
It can be changed as appropriate depending on the internal test circuit of the chip.

Further, the internal test circuit of the IC chip to be mounted may be other than that shown in the above embodiment.

Further, the film carrier 7 may not be provided with the support ring 704.

〔Effect of the invention〕

As explained above, according to the present invention, among the conductive wires formed on the insulating substrate, a specific conductive wire connected to a test circuit for self-diagnosis provided inside the integrated circuit element to be mounted On the other hand, a terminal portion having a larger area than the terminal portions of other conductive wires is provided.

Therefore, compared to the case where all conductive wires are provided with large terminal portions, the degree of freedom in forming the test terminal portions is greater, and the area of each test terminal portion can also be made considerably larger.

As a result, diagnostic tests of the internal state of integrated circuit elements can be performed more easily and accurately.

[Brief explanation of drawings]

FIG. 1 is a plan view of essential parts of a film carrier for mounting an RC chip according to an embodiment of the present invention, FIG. 2 is a schematic diagram showing an internal test structure of an IC chip mounted by the film carrier of the above embodiment, and FIG. The figure is a plan view of a conventional film carrier for mounting an IC chip. In addition, in the symbols used in the drawings, ■, 7... Film carrier (base material) 8... IC chip 10.70... ...... Insulating film (base) 11.71.71' ■ lc. It is 1 2. Ic, 7 ■ Conductive lead (conductor wire) Logic circuit latch circuit for terminal control

Claims (1)

[Claims] An insulating base for mounting an integrated circuit element having a large number of connection terminals and a test circuit for self-diagnosis provided therein, and connection of the integrated circuit element on this base. a first conducting wire formed in a predetermined shape for connection to a terminal and having a terminal portion of a first size on a side of the integrated circuit element not connected to the connecting terminal; A terminal portion having a second size larger than the first size terminal portion is provided at one end side, and the other end side is connected to a connecting terminal connected to the test circuit of the integrated circuit element. A base material for mounting an integrated circuit element, preferably comprising a second conductive wire formed in a predetermined shape on the base body.