JPH0362967A - Solid image-pickup device - Google Patents

Solid image-pickup device

Info

Publication number
JPH0362967A
JPH0362967A JP1198431A JP19843189A JPH0362967A JP H0362967 A JPH0362967 A JP H0362967A JP 1198431 A JP1198431 A JP 1198431A JP 19843189 A JP19843189 A JP 19843189A JP H0362967 A JPH0362967 A JP H0362967A
Authority
JP
Japan
Prior art keywords
film
photoconductive
photoconductive film
lamination
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1198431A
Other languages
Japanese (ja)
Inventor
Tetsuya Yamaguchi
鉄也 山口
Akihiko Furukawa
古川 章彦
Kensaku Yano
健作 矢野
Ryohei Miyagawa
良平 宮川
Yoshinori Iida
義典 飯田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP1198431A priority Critical patent/JPH0362967A/en
Publication of JPH0362967A publication Critical patent/JPH0362967A/en
Pending legal-status Critical Current

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  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To obtain an improved picture image by forming so that the lower surface of a photoelectric conversion film is flat and by restricting generation of picture image defect such as white stripe or picture image spot. CONSTITUTION:A picture electrode is formed by being embedded into a surface flattening film 8, thus flattening the ground where a photoconductive film 10 is subjected to lamination-formation as well as the bottom surface of the photoconductive film 10. Namely, when the photoconductive film 10 is subjected to lamination-formation, the bottom surface of the photoconductive film 10 is flattened, thus enabling the film quality of the photoconductive film 10 to be uniform over the entire surface and achieving a desired withstand voltage. As a result, it is possible to prevent white stripe due to faulty withstand voltage from being generated. Further, since the upper surface of the photoconductive film 10 is flattened, a transparent electrode film 11 which is lamination-formed on the photoconductive film 10 is subjected to lamination-forming flatly, thus preventing the transparent electrode film 11 from being cut off. As a result, electric field is uniformly applied to the photoconductive film 10, thus preventing picture image spot due to nonuniformity in electric field from occurring.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野〉 この発明は、半導体基板に形成された信号電荷転送部上
に光電変換部が積層形成された固体撮像装置に関し、特
に画素電極の構造を改良した固体Vri像装置に関する
[Detailed Description of the Invention] [Objective of the Invention] (Industrial Field of Application) The present invention relates to a solid-state imaging device in which a photoelectric conversion section is stacked on a signal charge transfer section formed on a semiconductor substrate, and particularly relates to a solid-state imaging device in which a photoelectric conversion section is stacked on a signal charge transfer section formed on a semiconductor substrate. This invention relates to a solid-state VRI imager with an improved electrode structure.

〈従来の技術) 信号電荷を蓄積する蓄積部と蓄積された信号電荷を読出
を読出部とからなる信号電荷伝送部と、この信号電荷転
送部上に積層形成された光導電膜を備えた光導電膜積居
形の固体撮像装置としては、例えば第4図に示すような
構造のものがある。
(Prior art) A photoconductor comprising a signal charge transfer section consisting of an accumulation section for accumulating signal charges and a readout section for reading out the accumulated signal charges, and a photoconductive film laminated on the signal charge transfer section. As a conductive film stack type solid-state imaging device, there is one having a structure as shown in FIG. 4, for example.

第4図は光導電II! 4m 膚形の固体撮像装置にお
ける画素部分の断面構造を示す図である。
Figure 4 shows Photoconductivity II! 4m is a diagram showing a cross-sectional structure of a pixel portion in a skin-shaped solid-state imaging device.

第4図において、P型のシリコン基板1には、入射光に
応じて生成された信号電荷を蓄積するn“型の蓄積ダイ
オード2が形成され、この蓄積ダイオード2に隣接して
、M積ダイオード2にlされた信号電荷を読出すn型の
埋込みチャンネルCODからなる垂直CCD3が形成さ
れている。
In FIG. 4, an n" type storage diode 2 that stores signal charges generated in response to incident light is formed on a P type silicon substrate 1, and an M product diode is formed adjacent to this storage diode 2. A vertical CCD 3 consisting of an n-type buried channel COD is formed for reading out the signal charges which are divided into two.

この垂直CG[)3上には、蓄積ダイオード2に蓄積さ
れた信号電荷の垂直CCD3への転送を制御する転送用
のゲート電極4が、酸化膜等からなる絶縁膜5により周
囲と絶縁されてポリシリコンで形成されている。また、
シリコン基板1には、分離すべき画素間を分離するため
のP+型のチャネルストップ領域6が形成されている。
On this vertical CG[) 3, a transfer gate electrode 4 that controls the transfer of signal charges accumulated in the storage diode 2 to the vertical CCD 3 is insulated from the surroundings by an insulating film 5 made of an oxide film or the like. Made of polysilicon. Also,
A P+ type channel stop region 6 is formed in the silicon substrate 1 to isolate pixels to be separated.

蓄積ダイオード2には、その上部からゲート電極4の上
部にかけて、例えばAIやMoSi等からなる引出し電
極7が形成されている。このような構造の表面を平坦化
するために、シリコン基板1上には、BPSG(ボロン
・リン・シリケートガラス)膜等の絶縁膜からなる表面
平lll化膜8が形成されている。この表面平IUI化
膜8上には、表面平坦化膜8に形成されたコンタクトホ
ールを介して引出し電極7と電気的に接続される/lあ
るいはTi等からなる画素電極9が形成されている。
An extraction electrode 7 made of, for example, AI or MoSi is formed on the storage diode 2 from its upper part to the upper part of the gate electrode 4 . In order to flatten the surface of such a structure, a surface flattening film 8 made of an insulating film such as a BPSG (boron phosphorus silicate glass) film is formed on the silicon substrate 1. A pixel electrode 9 made of /l, Ti, etc. is formed on this surface flattened IUI film 8 and is electrically connected to the extraction electrode 7 through a contact hole formed in the surface flattened film 8. .

このように、シリコン基板1に形成された信号電荷蓄積
部上には、アモルファス31等からなる光導電膜10が
、グロー放電や光CVD法により形成されている。この
光導電膜10の上には、光導電膜10に電圧を印加する
透明Ti極膜11が、ITO(インジウム・スズ・酸化
膜)等で積層形成されている。
As described above, the photoconductive film 10 made of amorphous material 31 or the like is formed on the signal charge storage section formed on the silicon substrate 1 by glow discharge or photo-CVD. On this photoconductive film 10, a transparent Ti electrode film 11 for applying a voltage to the photoconductive film 10 is laminated with ITO (indium tin oxide film) or the like.

このような構造にあっては、画素電極9が引出し電極7
から表面平坦化膜8に形成されたコンタクトホールを介
して、表面平坦化膜8の上に所定の広さで形成され、そ
の上に光導電膜10が積層されている。このため、画素
電極9の周端部にJ′3いて、光導電膜10に段差12
が生じる。また、表面平坦化膜8に形成されたコンタク
トボールに画素電極9が埋込まれるため、コンタクトホ
ール上の画素電極の表面に凹凸13が生じる。
In such a structure, the pixel electrode 9 is connected to the extraction electrode 7.
A photoconductive film 10 is formed on the surface planarizing film 8 with a predetermined width through a contact hole formed in the surface planarizing film 8, and a photoconductive film 10 is laminated thereon. Therefore, there is a step 12 at the peripheral end of the pixel electrode 9 and a step 12 at the photoconductive film 10.
occurs. Further, since the pixel electrode 9 is buried in the contact ball formed in the surface flattening film 8, unevenness 13 is generated on the surface of the pixel electrode above the contact hole.

これらにより、光導電膜10を画素電極9及び表面平坦
化膜8上に積層形成する際に、段差12や凹凸が生じた
部分では、光導電膜10の膜質が不均一となる。このた
め、膜質が不均一になった部分においては、耐圧が劣化
して誤電流が流れ、再生画像に白傷の発生を沼いていた
As a result, when the photoconductive film 10 is laminated on the pixel electrode 9 and the surface flattening film 8, the film quality of the photoconductive film 10 becomes non-uniform in areas where the steps 12 or unevenness occur. For this reason, in areas where the film quality is non-uniform, the withstand voltage deteriorates and erroneous current flows, resulting in the occurrence of white scratches on reproduced images.

また、段差12・や凹凸13が生じた部分の光導電膜1
0」:に積層形成された透明電極膜11にあっても、段
差12や凹凸13が反映されるため、比較的薄く形成さ
れる透明電極膜11に断切れが生じ易くなる。透明電極
膜11に断切れが生じると、透明電極膜11から光導電
膜10に加えられるm界が不均一となり、再生画像に斑
が9:しることになる。
In addition, the photoconductive film 1 in the areas where the steps 12 and the unevenness 13 are formed
Even in the transparent electrode film 11 formed in a layered manner as shown in FIG. When a break occurs in the transparent electrode film 11, the m-field applied from the transparent electrode film 11 to the photoconductive film 10 becomes non-uniform, resulting in mottling in the reproduced image.

(発明が解決しようとする課題) このように、従来の光導KG積層形の固体撮像装置にお
ける構造にあっては、光導電膜10の底面、すなわち光
導電膜10と画素電極9及び表面平坦化膜8との接合面
に段差や凹凸があるために、光導電膜10に耐汗不良が
生じ、自船といった画像欠陥を1rIいていた。
(Problems to be Solved by the Invention) As described above, in the structure of the conventional light guiding KG stacked solid-state imaging device, the bottom surface of the photoconductive film 10, that is, the photoconductive film 10, the pixel electrode 9 and the surface flattening. Due to the presence of steps and irregularities on the bonding surface with the film 8, the photoconductive film 10 had poor sweat resistance, resulting in image defects such as self-shipping.

さらに、透明電極膜11に断切れが生じ易く、画像斑を
引き起こし、良好な画像を得る上での障害となっていた
Furthermore, the transparent electrode film 11 is prone to breakage, causing image unevenness, which is an obstacle to obtaining good images.

そこで、この発明は、上記に鑑みてなされたものであり
、その目的とするところは、白傷や画像斑といった画像
欠陥の発生を抑制して、良好な画質を得ることができる
固体顕像装置を捉供することにある。
Therefore, the present invention has been made in view of the above, and its purpose is to provide a solid-state imaging device that can obtain good image quality by suppressing the occurrence of image defects such as white scratches and image spots. The goal is to capture and provide information.

〔発明の構成] (課題を解決するための手段) 上記目的を達成するために、入用光に応じて(qられた
信号電荷を蓄積する蓄積部と、この蓄積部に蓄811<
5れた信号電荷を読出す読出し部とを備えた信号電荷蓄
積部上に、電極部を介して前記蓄積部と電気的に接続さ
れる光電変換膜が積層形成されてなる固体顕像装備にお
いて、この発明は、前記光電変換膜の下面が平坦となる
ように形成されることを要旨とする。
[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, an accumulation part for accumulating (q) signal charges according to the required light, and an accumulation part 811<
In a solid-state imaging device, a photoelectric conversion film electrically connected to the signal charge storage section via an electrode section is laminated on a signal charge storage section including a readout section for reading out signal charges that have been detected. The gist of the present invention is that the photoelectric conversion film is formed so that the lower surface thereof is flat.

(作用〉 上記構成において、この発明は、光電変換11Qの下面
を平坦にすることで、光電変換膜及びこの光電変換膜」
二に積層形成される透明電極膜に段差や凹凸が生じない
ようにしている。
(Function) In the above configuration, the present invention provides a photoelectric conversion film and a photoelectric conversion film by flattening the lower surface of the photoelectric conversion 11Q.
Second, the transparent electrode film laminated thereon is prevented from having any steps or irregularities.

(実施例〉 以下、図面を用いてこの発明の詳細な説明する。(Example> Hereinafter, the present invention will be explained in detail using the drawings.

第1図はこの発明の一実施例に係わる固体撮像装置にお
ける画素部の断面構造を示す図である。
FIG. 1 is a diagram showing a cross-sectional structure of a pixel portion in a solid-state imaging device according to an embodiment of the present invention.

同図に示す固体撮像H置は、電荷転送部としてインター
ライン転送型CODを用い、この電荷転送部の上に光導
電膜を積層形成した光導電膜hM居形の固体11i1像
装置である。第1図に示す実施例の特徴とするところは
、第4図に示した従来構造に対して、画素電極21を表
面平坦化膜8に埋込んで形成して、光導電膜10が積層
形成される下地を平坦にし、光導電膜10の底面を平坦
化したことにある。なお、第1図において、第4図と同
符号のものは同一物であり、その説明は省略する。
The solid-state imaging device H shown in the same figure is a solid-state 11i1 image device with a photoconductive film hM type in which an interline transfer type COD is used as a charge transfer section and a photoconductive film is laminated on the charge transfer section. The feature of the embodiment shown in FIG. 1 is that, in contrast to the conventional structure shown in FIG. The reason is that the underlying layer to be coated is flattened, and the bottom surface of the photoconductive film 10 is flattened. In FIG. 1, the same reference numerals as in FIG. 4 are the same, and their explanation will be omitted.

次に、ff11図に示す構造における一製造方法の実施
例を、第2図に示す工程断面を参照して説明する。
Next, an example of a manufacturing method for the structure shown in FIG. ff11 will be described with reference to the process cross section shown in FIG.

まず、シリコン基板1中に従来から用いられている通常
の方法で、蓄積ダイオード2、垂直CCD3となる拡散
層を形成づるとともに、チ17ネルストツプ領域6を形
成する。また、垂直CCD3が形成されたシリコン酸化
膜1の上部に、シリコン酸化膜からなる絶縁II! 5
で周囲と絶縁された多結晶シリコン膜からなるゲート電
極4を形成する。
First, diffusion layers which will become the storage diode 2 and the vertical CCD 3 are formed in a silicon substrate 1 by a conventional method, and a channel stop region 6 is formed. Further, on the top of the silicon oxide film 1 on which the vertical CCD 3 is formed, an insulator II! made of a silicon oxide film is placed. 5
Then, a gate electrode 4 made of a polycrystalline silicon film insulated from the surroundings is formed.

さらに、蓄積ダイオード2の表面から絶縁膜5に沿って
ゲート電極4の上部に引出し電極7を形成した後、表面
を平坦化するために表面平坦化膜8を形成する(第2図
(a〉〉。
Furthermore, after forming an extraction electrode 7 on the top of the gate electrode 4 from the surface of the storage diode 2 along the insulating film 5, a surface flattening film 8 is formed to flatten the surface (see FIG. 2(a)). 〉.

次に、全面にレジスト材16を塗布して、このレジスト
材16をリングラフイー挾術を用いて、画素電極15を
形成しようとする領域が開口されて表面平坦化膜8が露
出するようにバターニングする。その後、このパターニ
ングされたレジスト材16をマスクにして、表面平1目
化膜8の露出した部分を引出し電1Li7が露出する程
度にエツチングして除去する〈第2図(b〉)。
Next, a resist material 16 is applied to the entire surface, and the resist material 16 is applied using a ring graphing technique to open the area where the pixel electrode 15 is to be formed and expose the surface flattening film 8. Buttering. Thereafter, using the patterned resist material 16 as a mask, the exposed portion of the surface planarized film 8 is etched and removed to the extent that the lead-out electrode 1Li7 is exposed (FIG. 2(b)).

次に、例えばAU等の導電性物質17を表面平坦化膜8
のエツチング除去されて開口された部分に、蒸着法ある
いはスパッタ法により表面平用化膜8の表面とほぼ同程
度の高さになるように形成する。この時に、導電性物質
17はレジスト材16の上部にも堆積形成される(第2
図(C))。
Next, a conductive material 17 such as AU is applied to the surface flattening film 8.
It is formed in the opening portion which has been removed by etching by vapor deposition or sputtering so as to have approximately the same height as the surface of the surface leveling film 8. At this time, the conductive material 17 is also deposited on the resist material 16 (second
Figure (C)).

次に、マスクパターンとなった残存するレジスト材16
を除去づることによりレジスト材16の上部にイを積さ
れた導電性物質17を除去するリフトオフ法によって、
不要な導電性物質17を除去する。これにより、導電性
物5117がエツチング除去された表面平坦化膜8の部
分にのみ表面が平坦となるように埋込まれて、引出し電
極と電気的に接続される画素電極15が形成される(第
2図(d〉〉。
Next, the remaining resist material 16 that has become a mask pattern is
By the lift-off method, the conductive material 17 deposited on the top of the resist material 16 is removed by removing the resist material 16.
Remove unnecessary conductive material 17. As a result, the conductive material 5117 is buried only in the etched-removed portion of the surface flattening film 8 so that the surface becomes flat, and the pixel electrode 15 electrically connected to the extraction electrode is formed. Figure 2 (d〉〉).

Qmに、平fil化された全面に例えばアモルファスS
1からなる光導電膜10を積層形成し、この光導電膜1
0の上部に例えばITO摸からなる透明電極膜11を積
層形成して、第1図に示すような固体囮像装置における
画素部の構造が完成する。
For example, amorphous S is applied to the entire flattened surface of Qm.
A photoconductive film 10 consisting of photoconductive film 1 is laminated.
A transparent electrode film 11 made of, for example, an ITO sample is laminated on top of the pixel 0, thereby completing the structure of the pixel portion in the solid-state decoy image device as shown in FIG.

このような製造方法によって形成される第1図に示すよ
うな構造にあっては、光導電膜10を形成する際の下地
が平坦であるため、光56電膜10を積層形成した時に
、光導電膜10の底面が平坦となる。これにより、光導
電pA10の膜質が全面にわたって均一となり、所望の
耐圧が得られる。
In the structure shown in FIG. 1 formed by such a manufacturing method, since the base upon which the photoconductive film 10 is formed is flat, when the photoconductive film 10 is laminated, the structure is The bottom surface of the conductive film 10 becomes flat. As a result, the film quality of the photoconductive pA10 becomes uniform over the entire surface, and a desired breakdown voltage can be obtained.

この結果、耐圧不良に寄囚する白傷の発生を防止するこ
とができる。
As a result, it is possible to prevent the occurrence of white scratches that may lead to poor withstand voltage.

さらに、光導電膜10の上面も平坦化されるために、光
導電膜10の上に積層形成される透明電極膜11ち平坦
に積層形成されることになる。これにより、透明電極膜
11の断切れを防止することができる。この結果、電界
が光導電膜10に均一に印加されることになり、電界の
不均一性に奇囚する画像斑を防止することができる。
Furthermore, since the upper surface of the photoconductive film 10 is also flattened, the transparent electrode film 11 laminated on the photoconductive film 10 is laminated flatly. Thereby, breakage of the transparent electrode film 11 can be prevented. As a result, the electric field is uniformly applied to the photoconductive film 10, and image unevenness caused by non-uniformity of the electric field can be prevented.

これらのことから、信頼性の向上が図られ、良好な画質
を得ることができるようになる。
For these reasons, reliability can be improved and good image quality can be obtained.

次に、第1図に示す構造の他の%Ij造方法の実施例を
、第3図に示す工程断面図を参照して説明する。
Next, an embodiment of another %Ij manufacturing method for the structure shown in FIG. 1 will be described with reference to the process cross-sectional diagram shown in FIG. 3.

まず、前述したように第2図(a >及び同図(b)に
示した方法と同様な方法を経た後、第2図(b)に示す
I nを形成する。その後、マスクパターンとなったレ
ジスト材16を除去する。続いて、表面平坦化膜8をエ
ツチング除去して形成されたft1口部に蒸着法あるい
はスパッタ法により、画素電極15となる例えばA11
等の導電性物質17を開口部が十分に埋込まれるように
全面に形成する〈第3図(a)〉。
First, as described above, after passing through a method similar to that shown in FIGS. 2(a) and 2(b), the In shown in FIG. The resist material 16 that has been etched is then removed by etching.Then, the surface flattening film 8 is removed by etching, and a film, for example A11, which will become the pixel electrode 15 is deposited on the ft1 opening formed by vapor deposition or sputtering.
A conductive material 17 such as the like is formed over the entire surface so that the opening is sufficiently filled (FIG. 3(a)).

次に、開口部に埋込まれるようにに#積形成された導電
性物質17とほぼ同程度のTツチング比を有するレジス
ト材18を全面に塗布する(第3図(b))。
Next, a resist material 18 having approximately the same T-setting ratio as the conductive material 17 formed in the # layer is applied to the entire surface so as to be embedded in the opening (FIG. 3(b)).

次に開口されていない表面平坦化膜8の表面が露出する
まで、レジスト材18及び導電性物質17をRIE法に
よってエツチング除去する。すなわち、表面平坦化膜8
に形成された開口部が導電性物質17で完全に埋込まれ
、導電性物質17と表面平坦化膜8のそれぞれの表面が
ほぼ同等の高さとなるように、エッチバック法によりレ
ジスト材18と導電性物質17をエツチング除去する。
Next, the resist material 18 and the conductive material 17 are etched away by RIE until the surface of the surface flattening film 8 that is not opened is exposed. That is, the surface flattening film 8
The resist material 18 is etched by an etch-back method so that the opening formed in the conductive material 17 is completely filled with the conductive material 17 and the surfaces of the conductive material 17 and the surface flattening film 8 are approximately at the same height. The conductive material 17 is removed by etching.

これにより、第2図(d )に示したと同様の構造が得
られ、その後の工程は前述したと同様である。
As a result, a structure similar to that shown in FIG. 2(d) is obtained, and the subsequent steps are the same as described above.

このような製造方法にあっても、#T述したと荊・様の
効果が得られる固体銀像装置における画素部の構造を形
成することができる。
Even with such a manufacturing method, it is possible to form a structure of a pixel portion in a solid silver image device that achieves the effects described above.

なお、この発明は、上記実施例に限定されることはなく
、信号電荷転送部を例えば蓄積ダイオードをイjするM
OS型やCP D g’等で形成されたものであっても
適用することができる。
It should be noted that the present invention is not limited to the above-mentioned embodiments, and the signal charge transfer section may be configured such that, for example, a storage diode is used.
Even if it is formed of an OS type or CP D g', it can be applied.

また、絶縁膜はシリコン酸化膜の他にS’13N4膜や
これらの複合膜であっても良い。
Further, the insulating film may be a S'13N4 film or a composite film thereof in addition to the silicon oxide film.

ざらに、光導電膜はアモルファスSiの他に5b2s3
 、Se  −As−Te、  CdSe、CdZnT
eであっても良く、InSbやPb Sn Tc 。
In general, the photoconductive film is made of 5b2s3 in addition to amorphous Si.
, Se-As-Te, CdSe, CdZnT
It may be InSb or PbSnTc.

Cd)−IUTe等の赤外用光電物質を用いても良い。An infrared photoelectric material such as Cd)-IUTe may also be used.

また、光導変換膜に限らず光起電膜であっても良い。Moreover, it is not limited to a photoconductive conversion film, but may be a photovoltaic film.

さらに、画素電極はAlの他に、7i、Mo。Furthermore, the pixel electrode is made of 7i and Mo in addition to Al.

P【、八u 、MOシリサイド、 Mo Si 、ポリ
シリコン膜等の1ffi性物質及びこれらの多層膜であ
ってb良い。
It may be a 1ffi material such as P[, 8u, MO silicide, MoSi, polysilicon film, or a multilayer film thereof.

[弁明の効果] 以上説明したように、この発明によれば、充電変換膜の
下面が平坦となるように形成して、光電変換膜に段差や
凹凸が住じないようにしたので、光電変換膜の膜質を均
一に形成して、耐圧不良を低減することができる。これ
により、白傷といった画像欠陥の発生を抑制することが
可能となる。
[Effect of explanation] As explained above, according to the present invention, the lower surface of the charge conversion film is formed to be flat so that there are no steps or unevenness in the photoelectric conversion film, so that the photoelectric conversion It is possible to form a film with uniform film quality and reduce breakdown voltage defects. This makes it possible to suppress the occurrence of image defects such as white spots.

また、光電変換膜上に積層形成される透明電極膜にあっ
ても、段差や凹凸がなくなり、断切れが防止される。こ
れにより、光電変換膜に電界が均一に印加され、画像斑
を防止することが可能となる。
Further, even in the transparent electrode film laminated on the photoelectric conversion film, there are no steps or irregularities, and breakage is prevented. As a result, an electric field is uniformly applied to the photoelectric conversion film, making it possible to prevent image unevenness.

この結果、信頼性の向上が図られ、良好な画質を得るこ
とができる固体銀像装置を提供することができるように
なる。
As a result, it is possible to provide a solid silver image device with improved reliability and good image quality.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例に係る固体顕像装置の要部
構造を示す断面図、第2図は第1図に示す装置の一製造
方法を示す工程断面図、第3図は第1図に示す装置の他
の!lA迄方法の要部をボす工Ill断面図、第4図は
従来の固体ぬ像装回の一要部構成を示す断面図である。 1・・・シリコン基板、 2・・・蓄積ダイオード、 3・・・垂直COD。 4・・・ゲート電極、 5・・・絶縁膜、 6・・・チ17ネルストツプ領域、 7・・・引出し電極、 8・・・表面平坦化膜、 9・・・画素電極、 0・・・光導電膜、 1・・・透明電極膜、 2・・・段差、 3・・・凹凸、 5・・・画素電極、 6.18・・・レジスト材、 7・・・導“電性物質。
FIG. 1 is a cross-sectional view showing the main structure of a solid-state imaging device according to an embodiment of the present invention, FIG. 2 is a process cross-sectional view showing a method of manufacturing the device shown in FIG. 1, and FIG. Other than the equipment shown in Figure 1! FIG. 4 is a cross-sectional view showing the construction of a main part of a conventional solid-state imaging circuit. 1...Silicon substrate, 2...Storage diode, 3...Vertical COD. 4... Gate electrode, 5... Insulating film, 6... Channel stop region, 7... Extracting electrode, 8... Surface flattening film, 9... Pixel electrode, 0... Photoconductive film, 1... Transparent electrode film, 2... Step, 3... Irregularities, 5... Pixel electrode, 6.18... Resist material, 7... Conductive material.

Claims (1)

【特許請求の範囲】 入射光に応じて得られた信号電荷を蓄積する蓄積部と、
この蓄積部に蓄積された信号電荷を読出す読出し部とを
備えた信号電荷転送部上に、電極部を介して前記蓄積部
と電気的に接続される光電変換膜が積層形成されてなる
固体撮像装置において、 前記光電変換膜の下面が平坦となるように形成されるこ
とを特徴とする固体撮像装置。
[Claims] An accumulation section that accumulates signal charges obtained in response to incident light;
A solid state in which a photoelectric conversion film electrically connected to the storage section through an electrode section is laminated on a signal charge transfer section that includes a readout section that reads out the signal charges accumulated in the storage section. A solid-state imaging device, characterized in that the photoelectric conversion film is formed so that a lower surface thereof is flat.
JP1198431A 1989-07-31 1989-07-31 Solid image-pickup device Pending JPH0362967A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1198431A JPH0362967A (en) 1989-07-31 1989-07-31 Solid image-pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1198431A JPH0362967A (en) 1989-07-31 1989-07-31 Solid image-pickup device

Publications (1)

Publication Number Publication Date
JPH0362967A true JPH0362967A (en) 1991-03-19

Family

ID=16390975

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1198431A Pending JPH0362967A (en) 1989-07-31 1989-07-31 Solid image-pickup device

Country Status (1)

Country Link
JP (1) JPH0362967A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2023534229A (en) * 2019-07-23 2023-08-08 サイバー メディカル イメージング,インコーポレイテッド Using Surface Patterning to Fabricate a Single Die Direct Capture Dental X-ray Imaging Sensor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2023534229A (en) * 2019-07-23 2023-08-08 サイバー メディカル イメージング,インコーポレイテッド Using Surface Patterning to Fabricate a Single Die Direct Capture Dental X-ray Imaging Sensor

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