JPH0363247B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transistor amplifier circuit, and more particularly to a transistor amplifier circuit that can equalize operating levels between input and output and has a degree of amplification.

Generally, an emitter follower circuit is used as a buffer amplifier that transmits a signal with a high input impedance and a low output impedance. However, as is well known to those skilled in the art, in the emitter follower circuit, the potential difference V _BE between the base and emitter occurs as an offset voltage, causing a difference in operating level between input and output. By the way, in a circuit such as an integrated circuit having many directly connected stages, when connecting a front-stage circuit and a rear-stage circuit, it may be desirable to have equal operating levels between input and output in order to widen the dynamic range.

For this reason, the following circuits have been considered to equalize the operating levels between input and output in the circuit described above. Figure 1 shows a complementary transistor circuit, in which an NPN transistor Q ₁ is combined with a PNP transistor Q ₂ , an input is applied to the base of transistor Q ₁ , an output is taken from the emitter of transistor Q 2, and a PNP transistor Q ₂ is connected to the base of transistor Q ₁ .・The potential difference between emitters is compensated by transistor _Q2 . In Figure 2, transistor Q ₃ is connected to transistor Q ₁ , the base and collector of transistor Q ₃ are connected to give it diode characteristics, and the output is taken from the collector of transistor Q ₃ , making use of the above diode characteristics. An example of a circuit that compensates for the potential difference V _BE is shown below. Figure 3 shows a differential amplifier consisting of transistors Q ₄ and Q _5. A transistor Q ₆ is provided to feed back the output from an active load (a load consisting of transistors Q ₇ and Q ₈ ) to form a feedback loop. This circuit takes the output from the emitter of _Q6 and tracks the operating level between input and output. The code I ₀₁ is
A constant current source is shown.

Incidentally, Vcc in FIGS. 1 to 3 indicates a voltage source.

However, in the above circuit, although the potential difference V _BE between the base and emitter can be compensated, the gain is always 1, and no amplification can be obtained. _For this reason, for example, as shown in FIG. 4, when input signals e ₁ and e ₂ are input from input terminals P ₁ and _{P 2 respectively} in the circuit shown in FIG. When the operating level is given, an output voltage e ₀ of e ₀ =R ₁ /R ₁ +R ₂ e ₁ +R ₂ /R ₁ +R ₂ e ₂ appears at the output terminal P ₃ . Here, R ₁ and
_R2 is a resistor connected to input terminals _P1 and _P2 .
As a result, for example, if R ₁ =R ₂ , then e ₀ =(e ₁ +e ₂ )/2, which has the disadvantage that the output voltage e ₀ is attenuated and halved.

The present invention has been made in view of the above-mentioned points, and it is an object of the present invention to provide a transistor amplifier circuit that can equalize the operating level between input and output and provide amplification degree.

Embodiments of the present invention will be described below based on the drawings.

FIG. 5 is a circuit diagram showing the basic principle of the transistor amplifier circuit of the present invention.

As shown in Fig. 5, the first DC power supply E ₁ (the voltage is also assumed to be E ₁ ) is connected to the non-inverting input terminal P _a of the differential amplifier A.
and the signal source e _s (the voltage is also assumed to be e _s ), and the output terminal P _c of the differential amplifier A is connected to the second DC power supply E ₂ (the voltage is also assumed to be e s ).
the _first and second resistors in series between
Connect R _a and R _b , and connect the first and second resistors R _{a and}
The connection point of R _b and the inverting input terminal P _b of the differential amplifier A are connected. First and second DC power supplies E ₁ and
The voltage levels on E ₂ are substantially equal and the first and second resistors R _a and R _b form a feedback loop.

Then, a signal voltage e _s is placed on this voltage level E ₁ (=E ₂ ) to obtain E ₁ +e _s , which is applied to the non-inverting input terminal P _a . At this time, the output signal from the output terminal P _c is divided by the first and second resistors R _a and R _b and applied to the inverting input terminal P _b . The non-inverting input terminal P _a and the inverting input terminal P _b can be set to the same operating level by the feedback loop, and the voltage applied to the inverting input terminal P _b can be set to (E ₁ +e _s ). The input impedance at the inverting input terminal P _b of the differential amplifier A is the same as that of the first and second resistors R _a and
If it is larger than R _b , the current e _s /R _b flows through the resistor R _b ,
Therefore, a current equal to e _s /R _b is flowing through the resistor R _a as well. As a result, an amplified output voltage expressed as E ₁ +Rb/Rbe _s +Ra/Rbe _s =E ₁ +Ra+Rb/Rbe _s can be taken out at the output terminal P _c .

FIG. 6 is a circuit diagram showing a first embodiment of the present invention.

In Figure 6, the differential amplifier is a transistor
Q ₈ and Q ₉ , a current mirror active load consisting of transistors Q ₁₀ and Q ₁₁ , a constant current source I ₀₂ ,
It consists of a transistor _Q12 forming a feedback circuit, and has a configuration similar to that of the circuit shown in FIG. There is a resistor between the emitter of transistor _Q12 and the power supply _E3 .
Connect R ₃ and R ₄ as first and second resistors,
The connection point between resistors R ₃ and R ₄ is connected to the base of transistor Q ₉ . The power supply _E3 is used as a second DC power supply and also as a first DC power supply.
It is connected to the base of transistor Q ₈ through a resonant circuit consisting of L ₁ and capacitor C ₁ . The input signal is amplified by the transistor _Q13 from the input terminal _P4 and applied to the base of the transistor _Q8 , and the output signal is taken out from the output terminal _P5 connected to the emitter of the transistor _Q12 . The symbol I ₀₃ is a constant current source connected to the emitter of transistor Q ₁₂ ,
Vcc is a transistor driving power supply.

Next, the operation will be explained with reference to FIG.

When a signal enters input terminal _P4 , it is amplified by transistor _Q13 and resonates with the load of the resonant circuit. The amplified signal enters the base of transistor _Q8 . When the base potential of transistor Q ₈ increases, the current of Q ₈ also increases, the current of transistor Q ₁₀ increases, and the current of transistor Q ₁₁ also increases. On the other hand, the current on the transistor _Q9 side decreases compared to when there is no input signal, increasing the base current of the output stage transistor _Q12 , thereby increasing the emitter current of the transistor _Q12 . As a result, the potential of the output terminal P ₅ connected to the emitter of the transistor Q ₁₂ increases, and the base current of the transistor Q ₉ , which is connected via the resistor R ₃ , increases, so that it is connected to the constant current source I ₀₂ . The current in transistor _Q8 decreases. In this way, the base potential of the transistor _Q12 , that is, the output potential of the output terminal _P5 is also determined in accordance with the base potential of the transistor _Q8 . In this case, the base potential of transistor Q ₉ always operates to be equal to the base potential of transistor Q ₈ due to the feedback effect based on resistors R ₃ and R ₄ .
Therefore, the base potential of transistor Q ₈ is E ₃ +ΔV
Then, the base potential of transistor Q ₉ is also E ₃ +
It becomes ΔV. By the way, since the power supply voltage E ₃ is applied to one side of the resistor R ₄ , a potential difference ΔV occurs between both ends of the resistor R ₄ . Therefore, a current ΔV/R ₄ flows through the resistor R ₄ and this current flows through the resistor R ₃ , so that the voltage fluctuation at the output terminal P ₅ becomes R ₄ +R ₃ /R ₄ ΔV. In other words, (1+
R ₃ /R ₄ ) times the amplification degree can be obtained. Furthermore, since the potential difference across the resistor R ₃ is R ₃ /R ₄ ΔV, the potential at the output terminal P ₅ is E ₃ +ΔV+R ₃ /R ₄ ΔV, and the operating level is E ₃ .

This is therefore equal to the operating level of transistor _Q8 . Also, if there is no resistor R ₃ between the emitter of transistor Q ₁₂ and the base of transistor Q ₉ , then the base of transistor Q ₁₂ → emitter →
Since a loop is formed from the base of transistor Q ₉ to the collector to the base of transistor Q ₁₂ , unnecessary oscillation occurs, but in the present invention, a resistor is connected between the emitter of transistor Q ₁₂ and the base of Q ₉ .
The presence of _R3 reduces the loop gain, making it possible to suppress unnecessary oscillations.

FIG. 7 is a circuit diagram showing a second embodiment of the present invention.

This embodiment uses the circuit shown in FIG. 6 to input a plurality of input signals from two input terminals P ₄ and P ₆ as in the circuit example shown in FIG. 4, and synthesizes the signals. This is an example. Therefore, the circuit configuration and operation are the same as those shown in FIG. 6, and include coils L ₁ and L ₂ , capacitors C ₁ and C ₂ , transistors Q ₁₃ and Q ₁₄ , and resistor R ₉
and R ₁₀ correspond to each other.

Next, only the differences from FIG. 6 will be explained.

Transistors Q ₁₅ and Q ₁₆ are emitter follower circuits connected to input the two input signals amplified by transistors Q ₁₃ and Q ₁₄ , and resistors R ₁₁ and R ₁₂ are connected to each emitter of the transistors. Add at the base point of Q ₈ . Also, the base-emitter voltage V _BE of transistors Q ₁₅ and Q ₁₆ is adjusted by the base-emitter voltage V _BE of transistor Q 17 so that the base potentials of transistors Q _{8 and} Q ₉ are at the same potential. . Here, the resistance
R ₁₃ , R ₁₄ , and R ₁₅ provide bias to transistors Q ₁₅ , Q ₁₆ , and Q ₁₇ . In this way, the resistance R ₃ and
With R ₄ , the degree of amplification can be obtained as in FIG. 6.

As described above, according to the present invention, an input signal at a predetermined operating level is applied to the non-inverting input terminal of a differential amplifier, and the signal voltage from the output terminal of the differential amplifier is applied to the output terminal and the predetermined operating level. Since the voltage is divided to be equal to the input signal voltage by two resistors connected between the level and the power supply of the same level and is fed back to the inverting input terminal of the differential amplifier, unnecessary oscillation due to feedback is eliminated. It has the advantage that it is possible to reduce the noise level, equalize the operating level between input and output, and obtain amplification.

[Brief explanation of drawings]

Figures 1 to 3 are circuit diagrams showing circuit examples of conventional transistor amplifier circuits, Figure 4 is a circuit diagram for multiple inputs to the conventional circuit, and Figure 5 is the basic principle of the transistor amplifier circuit of the present invention. Circuit diagram showing 6th
The figure is a circuit diagram showing a first specific embodiment of the present invention,
FIG. 7 is a circuit diagram showing a second specific embodiment of the present invention. A... Differential amplifier, P _a ... Non-inverting input terminal,
P _b ... Inverting input terminal, P _c , P ₅ ... Output terminal, E ₁
and E ₂ , E ₃ ...first and second DC power supplies, R _a ,
R ₃ ... first resistance, R _b , R ₄ ... second resistance,
Q ₁₂ , Q ₁₅ , Q ₁₆ , Q ₁₇ ... Emitsuta follower.

Claims (1)

[Claims] 1. An active load consisting of first and second transistors whose emitters are commonly connected, a current mirror coupled between the collectors of the first and second transistors, and the second transistor. an emitter-follower circuit including a third transistor whose base is connected to the collector, the base of the first transistor is used as a non-inverting input terminal, the base of the second transistor is used as an inverting input terminal, and the base of the first transistor is used as an inverting input terminal;
a differential amplifier whose output terminal is the emitter of the transistor; and DC coupling means for coupling between the output terminal of the differential amplifier and a DC power source via first and second resistors connected in series. , means for coupling the junction of the first and second resistors to an inverting input terminal of the differential amplifier; and providing a non-inverting input terminal of the differential amplifier with a DC operating level substantially equal to the DC power supply. , and input means for supplying an input signal. 2. The DC coupling means couples the DC power supply to the output terminal of the differential amplifier via the first emitter follower circuit and the first and second resistors connected in series, and the input means , a plurality of input signals each having a DC operating level substantially equal to that of the DC power supply are supplied to the non-inverting input terminal of the differential amplifier via a second emitter follower circuit and a third resistor, respectively. A transistor amplifier circuit according to claim 1, characterized in that the transistor amplifier circuit is configured as follows.