JPH036328U - - Google Patents
Info
- Publication number
- JPH036328U JPH036328U JP6640889U JP6640889U JPH036328U JP H036328 U JPH036328 U JP H036328U JP 6640889 U JP6640889 U JP 6640889U JP 6640889 U JP6640889 U JP 6640889U JP H036328 U JPH036328 U JP H036328U
- Authority
- JP
- Japan
- Prior art keywords
- charging
- discharging
- comparator
- parallel
- input signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000007599 discharging Methods 0.000 claims description 5
- 239000003990 capacitor Substances 0.000 claims 1
- 230000002265 prevention Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 7
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
Landscapes
- Electronic Switches (AREA)
Description
第１図は本考案に係る電子タイマー回路の一実
施例を示す回路図、第２図はその動作説明図、第
３図は本考案の他の実施例を示す回路図、第４図
はその動作説明図である。また第５図はその電子
タイマー回路への入力信号作成回路の一例を示す
回路図である。第６図は従来技術の一例を示す回
路図である。
１０，２０……第１の充放電回路、１２，２２
……第２の充放電回路、１４……比較器、１６…
…整流回路。
Fig. 1 is a circuit diagram showing one embodiment of the electronic timer circuit according to the present invention, Fig. 2 is an explanatory diagram of its operation, Fig. 3 is a circuit diagram showing another embodiment of the invention, and Fig. 4 is the circuit diagram thereof. It is an operation explanatory diagram. Further, FIG. 5 is a circuit diagram showing an example of an input signal generation circuit for the electronic timer circuit. FIG. 6 is a circuit diagram showing an example of the prior art. 10, 20...first charging/discharging circuit, 12, 22
...Second charging/discharging circuit, 14...Comparator, 16...
...rectifier circuit.
Claims (1)
なる２組の充放電回路を並設し、それぞれに入力
信号端子から逆流防止用ダイオードを介して入力
信号を供給し、前記充放電回路の充放電電圧をそ
れぞれ比較器の入力端子に印加し、該比較器の出
力端子からタイマー信号を得ることを特徴とする
電子タイマー回路。 Two sets of charging/discharging circuits with different time constants, each consisting of a resistor and a capacitor connected in parallel, are installed in parallel, and an input signal is supplied from the input signal terminal to each via a backflow prevention diode, thereby controlling the charging/discharging voltage of the charging/discharging circuit. are applied to input terminals of a comparator, respectively, and a timer signal is obtained from an output terminal of the comparator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989066408U JPH0510424Y2 (en) | 1989-06-07 | 1989-06-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989066408U JPH0510424Y2 (en) | 1989-06-07 | 1989-06-07 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH036328U true JPH036328U (en) | 1991-01-22 |
| JPH0510424Y2 JPH0510424Y2 (en) | 1993-03-15 |
Family
ID=31599100
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989066408U Expired - Lifetime JPH0510424Y2 (en) | 1989-06-07 | 1989-06-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0510424Y2 (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5225054U (en) * | 1975-08-12 | 1977-02-22 | ||
| JPS57131738U (en) * | 1981-02-06 | 1982-08-17 | ||
| JPS6190323U (en) * | 1984-11-19 | 1986-06-12 |
-
1989
- 1989-06-07 JP JP1989066408U patent/JPH0510424Y2/ja not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5225054U (en) * | 1975-08-12 | 1977-02-22 | ||
| JPS57131738U (en) * | 1981-02-06 | 1982-08-17 | ||
| JPS6190323U (en) * | 1984-11-19 | 1986-06-12 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0510424Y2 (en) | 1993-03-15 |
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