JPH0363830B2 - - Google Patents
Info
- Publication number
- JPH0363830B2 JPH0363830B2 JP24935084A JP24935084A JPH0363830B2 JP H0363830 B2 JPH0363830 B2 JP H0363830B2 JP 24935084 A JP24935084 A JP 24935084A JP 24935084 A JP24935084 A JP 24935084A JP H0363830 B2 JPH0363830 B2 JP H0363830B2
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- mesa
- emitting diode
- type
- etching groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000005530 etching Methods 0.000 claims description 26
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 21
- 239000000758 substrate Substances 0.000 claims description 17
- 239000013078 crystal Substances 0.000 claims description 15
- 239000002184 metal Substances 0.000 claims description 10
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 238000009792 diffusion process Methods 0.000 description 11
- 239000011701 zinc Substances 0.000 description 8
- 238000000034 method Methods 0.000 description 7
- 239000005360 phosphosilicate glass Substances 0.000 description 6
- 230000006798 recombination Effects 0.000 description 6
- 238000005215 recombination Methods 0.000 description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229910000927 Ge alloy Inorganic materials 0.000 description 1
- BYDQGSVXQDOSJJ-UHFFFAOYSA-N [Ge].[Au] Chemical compound [Ge].[Au] BYDQGSVXQDOSJJ-UHFFFAOYSA-N 0.000 description 1
- 230000001154 acute effect Effects 0.000 description 1
- 239000003708 ampul Substances 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000003776 cleavage reaction Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- SAOPTAQUONRHEV-UHFFFAOYSA-N gold zinc Chemical compound [Zn].[Au] SAOPTAQUONRHEV-UHFFFAOYSA-N 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000007017 scission Effects 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Landscapes
- Led Devices (AREA)
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は、半導体チツプの裏面に共通電極、表
面に複数個の個別電極を有するモノリシツク発光
ダイオードアレイに関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a monolithic light emitting diode array having a common electrode on the back side of a semiconductor chip and a plurality of individual electrodes on the front side.
［従来の技術］
従来、モノリシツク発光ダイオードとしては、
単結晶基板の上に成長させたエピタキシヤル成長
層に不純物を拡散させた構造が知られている。[Conventional technology] Conventionally, monolithic light emitting diodes are
A structure in which impurities are diffused into an epitaxial growth layer grown on a single crystal substrate is known.
第５図は、従来のモノリシツク発光ダイオード
アレイの上面図、第６図は第５図におけるＡ−
A′断面の斜視図である。 FIG. 5 is a top view of a conventional monolithic light emitting diode array, and FIG. 6 is a top view of a conventional monolithic light emitting diode array.
It is a perspective view of the A′ section.
図中、１はｎ型GaAs基板、２および３はそれ
ぞれエピタキシヤル成長させたｎ型GaAs1-xPx層
およびｎ型GaAs層である。４および５は、ｎ型
GaAs層３の表面からZnを選択拡散させることに
よつて形成したｐ型領域であつて、４は発光再結
合部、５は各発光再結合部４よりなる個々の発光
ダイオード部門のアイソレーシヨンストライプで
ある。６は各発光ダイオード部のｎ型GaAs層３
の電極部９上に設けられた通電用の個別プラス電
極、７はｎ型GaAs基板の裏面に設けられた各発
光ダイオード部共通のマイナス電極である。 In the figure, 1 is an n-type GaAs substrate, 2 and 3 are an epitaxially grown n-type GaAs 1-x P x layer and an n-type GaAs layer, respectively. 4 and 5 are n-type
A p-type region formed by selectively diffusing Zn from the surface of the GaAs layer 3, 4 is a light emitting recombination part, and 5 is an isolation region of each light emitting diode section consisting of each light emitting recombination part 4. It's striped. 6 is the n-type GaAs layer 3 of each light emitting diode part
An individual positive electrode for conducting electricity is provided on the electrode portion 9, and 7 is a negative electrode common to each light emitting diode portion provided on the back surface of the n-type GaAs substrate.
プラス電極６、マイナス電極７間に正バイヤス
を加えると、ｎ型GaAs1-xPx層２からの電子はｐ
型領域である発光再結合部４に注入され、発光再
結合による光は、個別プラス電極６およびｎ型
GaAs層３に設けられた光取り出し孔８を通つて
矢印Ｃの示す如く外部に放出される。 When a positive bias is applied between the positive electrode 6 and the negative electrode 7, the electrons from the n-type GaAs 1-x P x layer 2 become p
The light is injected into the luminescent recombination part 4 which is the mold region, and the light due to the luminescent recombination is transferred to the individual positive electrode 6 and the n-type
The light is emitted to the outside as indicated by arrow C through the light extraction hole 8 provided in the GaAs layer 3.
［発明が解決しようとする問題点］
しかし、従来の拡散型発光ダイオードアレイは
上記したような構成であるため、次のような問題
点をもつている。[Problems to be Solved by the Invention] However, since the conventional diffused light emitting diode array has the above-described configuration, it has the following problems.
(1) Znの選択拡散を必要とするため、拡散マス
クの形成工程を含め工程が複雑である。(1) Since selective diffusion of Zn is required, the process is complicated, including the process of forming a diffusion mask.
(2) Znの選択拡散はアンプル内拡散であり、製
造コストが高くなる。(2) Selective diffusion of Zn is in-ampule diffusion, which increases manufacturing cost.
(3) Znの選択拡散はインターステイシヤルな部
分を含むため、特に結晶欠陥部で異常拡散を生
じ易く、歩留りを低下するおそれがある。(3) Since the selective diffusion of Zn includes interstitial parts, abnormal diffusion is likely to occur particularly in crystal defect areas, which may reduce the yield.
(4) 駆動用集積回路としてはプラス電極を共通、
マイナス電極を個別に設けることが望ましい
が、−族化合物半導体では、実用的なドナ
ー拡散源がないためｎ型基板しか用いられず、
従つてマイナス電極を共通にしたアレイしか得
られない。(4) As a driving integrated circuit, the positive electrode is common,
It is desirable to provide a separate negative electrode, but in - group compound semiconductors, only an n-type substrate is used because there is no practical donor diffusion source.
Therefore, only an array with a common negative electrode can be obtained.
(5) 各発光ダイオード部の個別電極はリードワイ
ヤで配線されているため、ボンデイング等の工
数がかかり、微細構造にはむかない。(5) The individual electrodes of each light emitting diode section are wired with lead wires, which requires a lot of work for bonding, etc., and is not suitable for fine structures.
［発明の目的］
本発明の目的は、前記した従来技術の問題点を
解消し、Znの選択拡散工程を必要とせず、従つ
て簡単な工程で低コストの製造ができ、結晶欠陥
の存在もあまり歩留りに影響することなく、更に
はワイヤボンデイング不用の新規な構造のメサ型
モノリシツク発光ダイオードアレイを提供するこ
とにある。[Object of the Invention] The object of the present invention is to solve the problems of the prior art described above, to eliminate the need for a selective diffusion process of Zn, to enable low-cost manufacturing with a simple process, and to eliminate the presence of crystal defects. The object of the present invention is to provide a mesa-type monolithic light emitting diode array having a novel structure that does not significantly affect the yield and does not require wire bonding.
［問題点を解決するため手段］
すなわち、本発明の要旨は、GaAs基板上にｐ
−ｎ接合面が形成されるよう少なくとも一層の混
晶系エピタキシヤル層が成長され、前記ｐ−ｎ接
合面が相直交するメサ・エツチング溝により一列
に並ぶ複数個の発光ダイオード部に分割されてな
る発光ダイオードアレイにおいて、各隣接する前
記発光ダイオード部門に設けられている前記メ
サ・エツチング溝は逆メサ方向のエツチング溝で
あり、それに直交し前記発光ダイオードアレイを
縦断する前記メサ・エツチング溝は順メサ方向の
エツチング溝であり、前記各発光ダイオード部の
電極部に接続される金属膜配線が前記電極部から
前記順メサ方向のエツチング溝上を通つて引き出
されていることにある。[Means for solving the problem] That is, the gist of the present invention is to
At least one mixed crystal epitaxial layer is grown to form a -n junction plane, and the pn junction plane is divided into a plurality of aligned light emitting diode parts by mutually orthogonal mesa etching grooves. In the light emitting diode array, the mesa etching grooves provided in each adjacent light emitting diode section are etching grooves in a reverse mesa direction, and the mesa etching grooves extending vertically through the light emitting diode array perpendicular thereto are etching grooves in a reverse mesa direction. The etching groove is in the mesa direction, and the metal film wiring connected to the electrode portion of each light emitting diode portion is drawn out from the electrode portion through the etching groove in the forward mesa direction.
［要旨の補足説明］
一般に、セン亜鉛鉱型の−族化合物半導体
結晶にあつては、化学エツチングの速度や劈開方
向に異方性が強く存在し、そのため、素子形成用
単結晶ウエハとしては、（100）面ないしこれに近
い面方位をもつたものが用いられる。[Additional explanation to the summary] In general, zincite-type - group compound semiconductor crystals have strong anisotropy in the chemical etching speed and cleavage direction. A material with a (100) plane or a plane orientation close to this is used.
例えば、第３図に示す如く、（100）面を〈011〉
方向およびこれと直角な〈０１１〉方向にメサ・
エツチングすれば、それぞれのメサの稜角は
〈011〉方向のものでは鋭角になるためこれを逆メ
サと呼び、〈011〉方向ないしこれに近い方向を逆
メサ方向と呼んでいる。反対に、稜角が鈍角にな
る〈０１１〉方向ないしこれに近い方向を順メサ
方向と呼んでいる。 For example, as shown in Figure 3, the (100) plane is
direction and the <011> direction perpendicular to this
If etched, the edge angle of each mesa becomes acute in the <011> direction, so this is called a reverse mesa, and the <011> direction or a direction close to this is called a reverse mesa direction. On the other hand, the <011> direction in which the ridge angle becomes obtuse or a direction close to this is called the forward mesa direction.
ところで、第４図ａ，ｂにそれぞれのメサ断面
図を示した如く、第４図ａ、において逆メサ方向
のエツチング法では融着金属膜１６がメサ稜部で
段切れを起こし、反対に第４図ｂにおいて順メサ
方向のエツチング部では蒸着金属膜１６の段切れ
は起こらない。なお、第３図および第４図中、１
２は結晶基板、１３は絶縁膜である。 By the way, as shown in FIGS. 4a and 4b, which are cross-sectional views of the respective mesas, in the etching method in the reverse mesa direction in FIG. In FIG. 4b, no breakage occurs in the deposited metal film 16 in the etched portion in the forward mesa direction. In addition, in Figures 3 and 4, 1
2 is a crystal substrate, and 13 is an insulating film.
［実施例］
以下、本発明の実施例を図面に基づき詳細に説
明する。[Example] Hereinafter, an example of the present invention will be described in detail based on the drawings.
第１図に本発明のメサ型モノリシツク発光ダイ
オードアレイの上面図、第２図に第１図のＢ−
B′断面の斜視図を示す。 FIG. 1 is a top view of the mesa-type monolithic light emitting diode array of the present invention, and FIG.
A perspective view of the B′ section is shown.
図中、２１はＰ型GaAs基板、２２はエピタキ
シヤル成長させたｐ型Ga1-xAlxAs層であり、そ
の混晶比ｘのはｘ＝0.10〜0.35程度の範囲内で、
これは希望する発光波長によつて適宜定められ
る。２３はｐ型Ga1-xAlxAs層２２上にエピタキ
シヤル成長させたｎ型Ga1−yAlyAs層であり、
その混晶比ｙは、上記混晶比ｘよりも高くするこ
とによつて、ｐ型Ga1-xAlxAs層２２からの発光
波長に対する光透過性と、このｎ型Ga1-yAlyAl
層２３からの電子の注入効率の増加およびｐ型
Ga1-xAlxAs層２２内に注入さた少数キヤリアの
閉じ込めを図つている。 In the figure, 21 is a P-type GaAs substrate, 22 is an epitaxially grown p-type Ga 1-x Al x As layer, and the mixed crystal ratio x is within the range of approximately 0.10 to 0.35.
This is appropriately determined depending on the desired emission wavelength. 23 is an n-type Ga1 - yAlyAs layer epitaxially grown on the p-type Ga1- xAlxAs layer 22;
By setting the mixed crystal ratio y higher than the above-mentioned mixed crystal ratio x, the light transmittance for the emission wavelength from the p-type Ga 1- x Al yAl
Increased injection efficiency of electrons from layer 23 and p-type
It is intended to confine the minority carriers injected into the Ga 1-x Al x As layer 22.
２６は、ｎ型Ga1-yAlyAs層２３の電極部２９
に接続される配線用の個別マイナス電極であり、
金属膜が蒸着されている。 26 is an electrode part 29 of the n-type Ga 1-y Al y As layer 23
A separate negative electrode for the wiring connected to the
A metal film is deposited.
２４は、個別マイナス電極２６と電極部２９以
外のｎ型Ga1-yAlyAs層２３とを絶縁するために
設けられたフオスホ・シリケート・ガラス
（PSG）膜である。 Reference numeral 24 denotes a phosphosilicate glass (PSG) film provided to insulate the individual negative electrodes 26 from the n-type Ga 1-y Al y As layer 23 other than the electrode section 29 .
２５はメサ・エツチング溝で、２５ａは逆メサ
方向のエツチング溝、２５ｂは順メサ方向のエツ
チング溝であり、それぞれ各発光ダイオード部３
０をアイソレートするために設けられている。な
お、各隣接する発光ダイオード部３０間には逆メ
サ方向のエツチング溝が設けられ、素子を縦断す
るように順メサ方向のエツチング溝が設けられる
ようにしなければならない。 25 is a mesa etching groove, 25a is an etching groove in the reverse mesa direction, and 25b is an etching groove in the forward mesa direction.
Provided to isolate 0. Note that etching grooves in the reverse mesa direction must be provided between adjacent light emitting diode sections 30, and etching grooves in the forward mesa direction must be provided so as to traverse the device.
よつて、各個別マイナス電極２６は、電極部２
９から順メサ方向のエツチング溝２５ｂ上を通つ
て引き出されるため、メサの稜部で段切れを起こ
して断線することがない。 Therefore, each individual negative electrode 26 is connected to the electrode section 2.
Since the wire is drawn out from 9 through the etched groove 25b in the forward mesa direction, there is no chance of breakage or disconnection at the edge of the mesa.
２７はＰ型GaAs基板２１の裏面に金属膜を全
面蒸着させて形成した共通プラス電極である。 A common positive electrode 27 is formed by depositing a metal film on the entire back surface of the P-type GaAs substrate 21.
この構造において、個別マイナス電極２６と共
通プラス電極２７との間に電圧を印加して発光ダ
イオード部３０に順方向電流を流せば、ｎ型
Ga1-yAlyAs層２３から電子がｐ型Ga1-xAlxAs層
２２に注入されて発光再結合を起こし、光はメサ
部から上方に放出される。 In this structure, if a voltage is applied between the individual negative electrodes 26 and the common positive electrode 27 and a forward current flows through the light emitting diode section 30, an n-type
Electrons are injected from the Ga 1-y Al y As layer 23 into the p-type Ga 1-x Al x As layer 22 to cause radiative recombination, and light is emitted upward from the mesa portion.
なお、個別マイナス電極２６が引き出し部でＬ
字型になつているのは、ワイヤボンデイングが容
易に行えるようにするためである。 Note that the individual negative electrode 26 is
The reason for the shape is to facilitate wire bonding.
実施例 １
Znドープ、キヤリア濃度２×1018cm-3である厚
さ350μｍのＰ型GaAs基板の（100）表面に液相
エピタキシヤル成長により、キヤリア濃度５×
1016cm-3のｐ型Ga0.9Al0.1As層を20μｍおよびキヤ
リア濃度２×1017cm-3のｎ型Ga0.7Al0.3As層を3μ
ｍ順次成長させた。Example 1 A carrier concentration of 5× was deposited on the (100) surface of a 350 μm thick P-type GaAs substrate doped with Zn and having a carrier concentration of 2×10 18 cm -3 by liquid phase epitaxial growth.
A 20 μm p-type Ga 0.9 Al 0.1 As layer with 10 16 cm -3 and a 3 μm n-type Ga 0.7 Al 0.3 As layer with a carrier concentration of 2×10 17 cm -3
m was grown sequentially.
この表面をメサ・エツチングして、（100）面に
対して順メサ方向である〈０１１〉方向のエツチ
ング溝を２本設け、その〈０１１〉方向に垂直な
逆メサ方向である〈011〉方向のエツチング溝を
２本の順メサエツチング溝間に設けた。よつて、
これらメサ・エツチング溝にぐより、〈０１１〉
方向に一列に並ぶ発光ダイオード部が形成された
ことになる。なお、それぞれのメサ・エツチング
溝の深さを5μｍとした。 This surface is mesa-etched to provide two etching grooves in the <011> direction, which is the forward mesa direction, with respect to the (100) plane, and the <011> direction, which is the reverse mesa direction perpendicular to the <011> direction. An etched groove was provided between the two forward mesa etched grooves. Then,
These mesa etching grooves are filled with <011>
This means that light emitting diode portions lined up in a row in the direction are formed. Note that the depth of each mesa etching groove was 5 μm.
次に、全表面を覆うようにPSG膜を0.2μｍ成長
させ、その後各発光ダイオード部の電極部上の
PSG膜をフツ酸により除去した。 Next, a PSG film is grown to a thickness of 0.2 μm to cover the entire surface, and then on the electrode part of each light emitting diode part.
The PSG film was removed with hydrofluoric acid.
PSG膜上には、個別マイナス電極として各発
光ダイオード部の電極部から順メサ方向のエツチ
ング溝上を通つて引き出されるよう金−ゲルマニ
ウム合金／ニツケル／金の金属膜を蒸着し、その
厚さをそれぞれ0.1μｍ／0.2μｍ／0.5μｍとした。 On the PSG film, a metal film of gold-germanium alloy/nickel/gold is deposited as an individual negative electrode so as to be drawn out from the electrode part of each light emitting diode part through the etching groove in the forward mesa direction, and its thickness is adjusted individually. It was set to 0.1μm/0.2μm/0.5μm.
基板の裏面全体には共通プラス電極として厚さ
がそれぞれ0.1μｍ／0.2μｍ／0.5μｍである金−亜
鉛／ニツケル／金の金属膜を蒸着した。 A gold-zinc/nickel/gold metal film having a thickness of 0.1 μm, 0.2 μm, and 0.5 μm, respectively, was deposited as a common positive electrode on the entire back surface of the substrate.
発光ダイオード部は、１mm当り16個の割合で形
成され、1.6mm×８mmのチツプ中に128個の発光ダ
イオード部を形成することができた。 The light emitting diode sections were formed at a rate of 16 per mm, and 128 light emitting diode sections could be formed in a chip of 1.6 mm x 8 mm.
このメサ型モノリシツク発光ダイオードアレイ
の立上り電圧は0.4Vで、順方向1.6Vにおいて
10mA以上、逆耐圧が7V以上、発光波長は800mm
であつた。 The rise voltage of this mesa-type monolithic light emitting diode array is 0.4V, and the forward voltage is 1.6V.
10mA or more, reverse breakdown voltage is 7V or more, emission wavelength is 800mm
It was hot.
又、順メサ方向のエツチング上に金属膜が蒸着
されているため、第４図ｂに示したように段切れ
が生ずることがなく、歩留り100％で2000時間使
用後も断線することのないメサ型モノリシツク発
光ダイオードを得ることができた。 In addition, since a metal film is deposited on the etching in the forward mesa direction, there will be no breakage as shown in Figure 4b, and the mesa will not break even after 2000 hours of use with a 100% yield. A type monolithic light emitting diode could be obtained.
このように、本発明の実施例であれば、従来の
ような工程の複雑なZn選択拡散技術を必要とせ
ず、簡単な工程で製造可能であり、各発光ダイオ
ード部３０の特性のばらつきが少ないものであ
る。 As described above, the embodiment of the present invention does not require the Zn selective diffusion technology with complicated steps as in the past, and can be manufactured through a simple process, and there is little variation in the characteristics of each light emitting diode section 30. It is something.
上記実施例では、基板結晶としてｐ型GaAsを
用いていたが、ｎ型GaAsを用いることも可能
で、ｎ型GaAsを用いた場合、共通電極側をマイ
ナス電極、個別電極側をプラス電極としてもよ
い。 In the above embodiment, p-type GaAs was used as the substrate crystal, but it is also possible to use n-type GaAs. When n-type GaAs is used, the common electrode side can be used as a negative electrode and the individual electrode side can be used as a positive electrode. good.
また、各発光ダイオード部３０に設けられる個
別電極が、発光面の中心部に位置するいわゆる中
心電極型のものにつにて記載したが、本発明はこ
れに限られるものではなく、第１図および第２図
に示した光透過孔を有するいわゆる周辺電極型な
どあらゆる電極形状について適用可能である。 Further, although the individual electrodes provided in each light emitting diode section 30 are of the so-called center electrode type located at the center of the light emitting surface, the present invention is not limited to this. It is also applicable to any electrode shape, such as the so-called peripheral electrode type having a light transmission hole as shown in FIG.
また、GaAs基板上に形成される混晶系も
GaAlAsに限られるものではなく、その他の混晶
系を用いてもよい。 In addition, the mixed crystal system formed on the GaAs substrate is also
It is not limited to GaAlAs, and other mixed crystal systems may be used.
［発明の効果］
以上に説明した如く、本発明のメサ型モノリシ
ツク発光ダイオードアレイは次のような顕著な効
果を奏する。[Effects of the Invention] As explained above, the mesa-type monolithic light emitting diode array of the present invention has the following remarkable effects.
(1) Znの選択拡散を必要とせず工程が簡単でか
つ異常拡散等による発光不良を生じないため、
歩留り高く生産でき、かつ各発光ダイオード部
の発光特性にばらつきが少ないものである。(1) The process is simple and does not require selective diffusion of Zn, and does not cause light emission defects due to abnormal diffusion, etc.
It can be produced with high yield, and there is little variation in the light emitting characteristics of each light emitting diode section.
(2) 基板結晶として、ｎ型あるいはｐ型のどちら
のGaAs基板をも用いることができるため、共
通電極をプラスあるいはマイナスのどちらの電
極にも設計可能であり、駆動回路の選択自由度
が大きい。(2) Since either an n-type or p-type GaAs substrate can be used as the substrate crystal, the common electrode can be designed to be either a positive or negative electrode, providing a high degree of freedom in selecting the drive circuit. .
(3) 順メサ方向のエツチング溝を通つて蒸着金属
膜で配線引出しができるため、ワイヤボンデイ
ング工程を省くことが可能であり、生産性に優
れている。(3) Since wiring can be drawn out using the vapor-deposited metal film through the etched groove in the forward mesa direction, it is possible to omit the wire bonding process, resulting in excellent productivity.
第１図は本発明の実施例を示す上面図、第２図
は第１図におけるＢ−B′断面の斜視図、第３図
はエツチングによるメサ形状を示す説明図、第４
図はメサ断面を示す断面図、第５図は従来例を示
す上面図、第６図は第５図におけるＡ−A′断面
の斜視図である。
１……ｎ型GaAs基板、２……ｎ型GaAs1-xPx
層、３……ｎ型GaAs層、４……発光再結合部、
５……アイソレーシヨンストライプ、６……個別
プラス電極、７……共通マイナス電極、８……光
取り出し孔、９，２９……電極部、１２……結晶
基板、１３……絶縁膜、１６……蒸着金属膜、２
１……ｐ型GaAs基板、２２……ｐ型Ga1-xAlxAs
層、２３……ｎ型Ga1-yAlyAs層、２４……PSG
膜、２５……メサ・エツチング溝、２６……個別
マイナス電極、２７……共通プラス電極、３０…
…発光ダイオード部。
FIG. 1 is a top view showing an embodiment of the present invention, FIG. 2 is a perspective view taken along the line B-B' in FIG. 1, FIG. 3 is an explanatory diagram showing a mesa shape by etching,
5 is a top view showing a conventional example, and FIG. 6 is a perspective view taken along the line A-A' in FIG. 5. 1...n-type GaAs substrate, 2...n-type GaAs 1-x P x
layer, 3... n-type GaAs layer, 4... luminescent recombination part,
5... Isolation stripe, 6... Individual positive electrode, 7... Common negative electrode, 8... Light extraction hole, 9, 29... Electrode portion, 12... Crystal substrate, 13... Insulating film, 16 ...Vapour-deposited metal film, 2
1... p-type GaAs substrate, 22... p-type Ga 1-x Al x As
Layer, 23... n-type Ga 1-y Al y As layer, 24... PSG
Membrane, 25...Mesa etching groove, 26...Individual negative electrode, 27...Common positive electrode, 30...
...Light emitting diode section.
Claims (1)
う少なくとも一層の混晶系エピタキシヤル層が成
長され、前記ｐ−ｎ接合面が相直交するメサ・エ
ツチング溝により一列に並ぶ複数個の発光ダイオ
ード部に分割されてなる発光ダイオードアレイに
おいて、各隣接する前記発光ダイオード部門に設
けられている前記メサ・エツチング溝は逆メサ方
向のエツチング溝であり、それに直交しかつ前記
発光ダイオードアレイを縦断する前記メサ・エツ
チング溝は順メサ方向のエツチング溝であり、前
記各発光ダイオード部の電極部に接続される金属
膜配線が前記電極部から前記順メサ方向のエツチ
ング溝上を通つて引き出されているものであるこ
とを特徴とするメサ型モノリシツク発光ダイオー
ドアレイ。1 At least one mixed crystal epitaxial layer is grown on a GaAs substrate so that a p-n junction is formed, and the p-n junction is formed into a plurality of light emitting layers arranged in a line by mesa-etched grooves orthogonal to each other. In a light emitting diode array divided into diode sections, the mesa etching groove provided in each adjacent light emitting diode section is an etching groove in a reverse mesa direction, and is perpendicular to the mesa etching groove and extends longitudinally through the light emitting diode array. The mesa etching groove is an etching groove in the forward mesa direction, and the metal film wiring connected to the electrode portion of each of the light emitting diode portions is drawn out from the electrode portion through the etching groove in the forward mesa direction. A mesa-shaped monolithic light emitting diode array characterized by:
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59249350A JPS6216583A (en) | 1984-11-26 | 1984-11-26 | Mesa monolithic light emitting diode array |
| DE3541790A DE3541790C2 (en) | 1984-11-26 | 1985-11-26 | Solid state light emitting diode array |
| US07/178,648 US4984035A (en) | 1984-11-26 | 1988-04-07 | Monolithic light emitting diode array |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59249350A JPS6216583A (en) | 1984-11-26 | 1984-11-26 | Mesa monolithic light emitting diode array |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6216583A JPS6216583A (en) | 1987-01-24 |
| JPH0363830B2 true JPH0363830B2 (en) | 1991-10-02 |
Family
ID=17191715
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59249350A Granted JPS6216583A (en) | 1984-11-26 | 1984-11-26 | Mesa monolithic light emitting diode array |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6216583A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0752779B2 (en) * | 1987-12-09 | 1995-06-05 | 日立電線株式会社 | Light emitting diode array |
| US5406095A (en) * | 1992-08-27 | 1995-04-11 | Victor Company Of Japan, Ltd. | Light emitting diode array and production method of the light emitting diode |
| JP3797748B2 (en) | 1997-05-30 | 2006-07-19 | シャープ株式会社 | Light emitting diode array |
| JP4046586B2 (en) | 2002-01-16 | 2008-02-13 | シャープ株式会社 | Compound semiconductor device and manufacturing method thereof |
-
1984
- 1984-11-26 JP JP59249350A patent/JPS6216583A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6216583A (en) | 1987-01-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6846686B2 (en) | Semiconductor light-emitting device and method of manufacturing the same | |
| US5707891A (en) | Method of manufacturing a light emitting diode | |
| JP3207773B2 (en) | Compound semiconductor light emitting device and method of manufacturing the same | |
| JPH10107316A (en) | Group III nitride semiconductor light emitting device | |
| US6222208B1 (en) | Light-emitting diode and light-emitting diode array | |
| JPS6159886A (en) | Manufacture of photosemiconductor device | |
| JP3511213B2 (en) | Optical semiconductor device | |
| US3998672A (en) | Method of producing infrared luminescent diodes | |
| JPH0363830B2 (en) | ||
| JPH05218586A (en) | Semiconductor laser device and manufacture of the same | |
| JPH05343744A (en) | Die-bond type light emitting diode and manufacturing method thereof | |
| JPH0525189B2 (en) | ||
| KR910006707B1 (en) | Light emitting diodes and manufacturing method | |
| JPH03190287A (en) | Light-emitting diode array | |
| JP2948967B2 (en) | Semiconductor light emitting device | |
| JP2661009B2 (en) | Gallium nitride based compound semiconductor light emitting device | |
| JPH07254731A (en) | Light emitting element | |
| JPH0613654A (en) | Semiconductor light emitting device and manufacturing method thereof | |
| JP3638413B2 (en) | Semiconductor light emitting device and manufacturing method thereof | |
| JPS5826676B2 (en) | light emitting diode | |
| GB1258360A (en) | ||
| JPH02202085A (en) | Manufacture of semiconductor laser device | |
| JP3488783B2 (en) | Light emitting diode array | |
| JPH06169104A (en) | Emiconductor light-emitting device and manufacture thereof | |
| JP3420417B2 (en) | Light emitting diode array |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |