JPH0363835A - Firmware diagnostic device - Google Patents

Firmware diagnostic device

Info

Publication number
JPH0363835A
JPH0363835A JP1201614A JP20161489A JPH0363835A JP H0363835 A JPH0363835 A JP H0363835A JP 1201614 A JP1201614 A JP 1201614A JP 20161489 A JP20161489 A JP 20161489A JP H0363835 A JPH0363835 A JP H0363835A
Authority
JP
Japan
Prior art keywords
firmware
address
memory
decoder
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1201614A
Other languages
Japanese (ja)
Inventor
Shogo Kido
城戸 省吾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1201614A priority Critical patent/JPH0363835A/en
Publication of JPH0363835A publication Critical patent/JPH0363835A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To recognize the access status of a universal register in a wide range by storing the address of firmware at the time when a microinstruction which makes access an arbitrary universal register with a decoder is stored in a memory sequentially with a program counter at every detection of the microinstruction. CONSTITUTION:When the firmware running microinstruction of a controller 1 is an instruction to make access the universal register I, the decoder 30 outputs an enable signal c1, and the address of the firmware at that time is stored in the memory 40 via a signal line (a). Next, when the instruction to make access the universal register II is issued, the decoder 30 outputs an enable signal c2, and the address is stored in the memory 50, and similarly, the address is stored in the memory 60 with an enable signal c3 in the case of the universal register III. In such a manner, it is possible to recognize the access status of the universal register in a wide range.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はファーウェア診断装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a firmware diagnostic device.

〔従来の技術〕[Conventional technology]

従来のファームウェア診断装置は任意のアドレスでプロ
グラムを停止させ、汎用レジスタの内容及びストップア
ドレスまでのファームウェアの走行アドレスなどを保持
するのみで、汎用レジスタをアクセスしたファームウェ
アのアドレスは保持されなかった。
Conventional firmware diagnostic devices stop the program at an arbitrary address and only retain the contents of general-purpose registers and the running address of the firmware up to the stop address, but do not retain the address of the firmware that accessed the general-purpose register.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のファームウェア診断装置は、ある限られ
たファームウェアの走行アドレスを保持するのみなので
、ある汎用レジスタに着目すると限られた範囲の情報し
かないので、その時点よりかなり前からの汎用レジスタ
のアクセス状況を調べることは困難であるという欠点が
ある。
The conventional firmware diagnostic device described above only holds a certain limited running address of the firmware, so when focusing on a certain general-purpose register, there is only a limited range of information, so it is difficult to access the general-purpose register from a long time before that point. The disadvantage is that it is difficult to investigate the situation.

ウェアの走行アドレスをカウントするプログラムカウン
タと、複数の汎用レジスタをアンクセスするマイクロ命
令を個々に検出するデコーダと、前記マイクロ命令が検
出されたとき、その時点の前記ファームウェアのアドレ
スを格納するメモリとを有し、前記デーコダにより任意
の汎用レジスタをアクセスするマイクロ命令を検出する
ごとに前記プログラムカウンタよりその時点のファーム
ウェアのアドレスを前記メモリに順次格納するように構
成されている。
A program counter that counts running addresses of the firmware, a decoder that individually detects microinstructions that access a plurality of general-purpose registers, and a memory that stores the address of the firmware at that time when the microinstruction is detected. and is configured such that each time the decoder detects a microinstruction that accesses an arbitrary general-purpose register, the address of the firmware at that time is sequentially stored in the memory from the program counter.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例のブロック図である0通常機
能を実現するファームウェア内臓の制御装置1は、例え
ば、16ビツトのプログラムカウンタ10及びインスト
ラクションレジスタ20を備えており、プログラムカウ
ンタ10の出力信号線であるプログラムカウンタ出力信
号線aおよびインストラクションレジスタ20の出力信
号線であるインストラクションレジスタ出力信号41b
を介して、制御装置1のファームウェアを診断するため
の診断装置2に接続されている。この診断装置2は信号
線すより入力されるマイクロ命令をデコードし、汎用レ
ジスタをアクセスする命令を個々に検出して′、イネー
ブル信号01〜C3を出力するデコーダ30において、
レジスタアクセス命令が検出されるごとに、信号線aを
介して制御装置1から受信するデータを入力データとし
て順次格納するメモリ40.50.60から構成されて
いる。
FIG. 1 is a block diagram of an embodiment of the present invention. A control device 1 with built-in firmware that realizes normal functions includes, for example, a 16-bit program counter 10 and an instruction register 20. A program counter output signal line a, which is an output signal line, and an instruction register output signal 41b, which is an output signal line of the instruction register 20.
It is connected to a diagnostic device 2 for diagnosing the firmware of the control device 1 via. This diagnostic device 2 decodes microinstructions input through the signal line, detects individual instructions to access general-purpose registers', and outputs enable signals 01 to C3 in a decoder 30.
Each time a register access command is detected, the memory 40, 50, and 60 sequentially store data received from the control device 1 via the signal line a as input data.

次に、動作について説明する。Next, the operation will be explained.

第1図において、制御装置1のファームウェア走行中、
マイクロ命令が汎用レジスタ■をアクセスする命令のと
き、デコーダ30はイネーブル信号CIを出力し、信号
線aを介してメモリ40にその時点のファームウェアの
アドレスが格納される9次に、汎用レジスタ■をアクセ
スする命令が出された場合、デコーダ30はイネーブル
信号C2を出力し、メモリ50にアドレスが格納される
。同様に、汎用レジスタ■の場合もイネーブル信号C3
により、メモリ60にアドレスが格納される。
In FIG. 1, while the firmware of the control device 1 is running,
When the microinstruction is an instruction to access the general-purpose register ■, the decoder 30 outputs an enable signal CI, and the address of the firmware at that time is stored in the memory 40 via the signal line a. When an access command is issued, the decoder 30 outputs an enable signal C2, and the address is stored in the memory 50. Similarly, in the case of general-purpose register ■, enable signal C3
As a result, the address is stored in the memory 60.

メモリ40,50.60のメモリアドレスはセットされ
るごとに+1され、最終アドレスになると、先頭アドレ
スにもどされる。
The memory addresses of the memories 40, 50, and 60 are incremented by 1 each time they are set, and when they reach the final address, they are returned to the starting address.

従って、ファームウェアをあるアドレスにおいて、停止
するように設定しておいた場合、上記動作終了時メモリ
40.50.60には、それぞれ対応する汎用レジスタ
1.II、nIをアクセスしたファームウェアのアドレ
スが格納されている。
Therefore, if the firmware is set to stop at a certain address, the corresponding general-purpose registers 1. The address of the firmware that accessed II and nI is stored.

このようにして、広い範囲の汎用レジスタのアクセス状
況を知ることができる。
In this way, the access status of a wide range of general-purpose registers can be known.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明はわずがな診断回路を使用
することにより、広い範囲の汎用レジスタのアクセス状
況を知ることができるという効果がある。
As described above, the present invention has the advantage that access conditions of a wide range of general-purpose registers can be known by using a special diagnostic circuit.

Claims (1)

【特許請求の範囲】[Claims] ファームウェアの走行アドレスをカウントするプログラ
ムカウンタと、複数の汎用レジスタをアンクセスするマ
イクロ命令を個々に検出するデコーダと、前記マイクロ
命令が検出されたとき、その時点の前記ファームウェア
のアドレスを格納するメモリとを有し、前記デーコダに
より任意の汎用レジスタをアクセスするマイクロ命令を
検出するごとに前記プログラムカウンタよりその時点の
ファームウェアのアドレスを前記メモリに順次格納する
ことを特徴とするファームウェア診断装置。
A program counter that counts running addresses of firmware, a decoder that individually detects microinstructions that access a plurality of general-purpose registers, and a memory that stores the address of the firmware at that time when the microinstruction is detected. 1. A firmware diagnostic device comprising: a firmware diagnostic device, wherein each time the decoder detects a microinstruction that accesses an arbitrary general-purpose register, the address of the firmware at that time is sequentially stored in the memory from the program counter.
JP1201614A 1989-08-02 1989-08-02 Firmware diagnostic device Pending JPH0363835A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1201614A JPH0363835A (en) 1989-08-02 1989-08-02 Firmware diagnostic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1201614A JPH0363835A (en) 1989-08-02 1989-08-02 Firmware diagnostic device

Publications (1)

Publication Number Publication Date
JPH0363835A true JPH0363835A (en) 1991-03-19

Family

ID=16443980

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1201614A Pending JPH0363835A (en) 1989-08-02 1989-08-02 Firmware diagnostic device

Country Status (1)

Country Link
JP (1) JPH0363835A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002000853A (en) * 2000-06-20 2002-01-08 Taiyo Elec Co Ltd Game machine
JP2014014575A (en) * 2012-07-10 2014-01-30 Sankyo Co Ltd Game machine
JP2014050609A (en) * 2012-09-07 2014-03-20 Sankyo Co Ltd Game machine
JP2014057648A (en) * 2012-09-14 2014-04-03 Sankyo Co Ltd Game machine

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002000853A (en) * 2000-06-20 2002-01-08 Taiyo Elec Co Ltd Game machine
JP2014014575A (en) * 2012-07-10 2014-01-30 Sankyo Co Ltd Game machine
JP2014050609A (en) * 2012-09-07 2014-03-20 Sankyo Co Ltd Game machine
JP2014057648A (en) * 2012-09-14 2014-04-03 Sankyo Co Ltd Game machine

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