JPH0363854A - Data protective circuit - Google Patents

Abstract

PURPOSE:To protect information desired not to be recognized from a general user by applying control in such a way that a select signal is prohibited to be inputted to a ROM(Read Only Memory) which holds protect data unless it is reset after reading the protect data once. CONSTITUTION:The circuit consists of a processor 1, the ROM 102 which holds data to be protected, a decoder 103 to make access from the processor 1 to the ROM 102, control logic which applies the control in such a way that no ROM 102 can be accessed unless it is reset after the ROM 102 is accessed from the processor 101 once i.e. a flip-flop 104, and an OR 105. When the system is started, the content of the ROM 102 is read once, and the content of the ROM 102 is prohibited to read again from software, and when charged software is executed, a device number read when the system is started is compared with a device number held in the software, and the software is executed when coincidence is obtained, and is not executed when noncoincidence is obtained. Thereby, information is protected from being read easily by the user.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information processing device, and particularly to a method for protecting data.

[Conventional technology]

In information processing equipment, the identification number of the equipment is stored in the ROM (R
This is used as a means to prevent unauthorized copying of paid software. In this method, the paid software also stores the device number, and when the software is loaded, the device number held by the software is compared with the identification number stored in the ROM of the device.

Then, if they match, the paid software is to be executed on the corresponding device, so the process moves to execution. If they do not match, an attempt was made to illegally copy the paid software and run it on another device, so the program does not proceed with execution and outputs a warning such as "Cannot be executed on this device" and exits.

As described above, the identification number of the device is important information for software copyright protection, but in the conventional technology, the hardware simply stores the identification number in the ROM.

[Problem to be solved by the invention]

The conventional method described above in which the identification information is simply stored in the ROM is insufficient to protect the identification information because if the user wants to read the contents of the ROM, he or she can read it with a memory load command. There was a risk that it could be misused if the user knew about it.

An object of the present invention is to provide data protection means that prevents users from easily reading out information as described above.

[Means to solve the problem]

The data protection circuit of the present invention includes a storage means for holding data to be protected, an address decoding means for making the storage means accessible from a processor, and a storage means for holding data to be protected. and control means for preventing access again.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. In the figure, the data protection circuit includes a processor 10.
1, a ROM 102 holding data to be protected, a decoder 103 for accessing the ROM 102 from the processor 101, and a ROM 102 for storing data to be protected;
It consists of control logic, that is, a flip-flop 104 and an OR 105, which prevents the ROM 102 from being accessed again unless the ROM 102 is accessed once the OM 102 is accessed.

A signal line connecting these resets the flip-flop 104 (reset when the reset signal is 0).

107 Address bus 108 Data bus 109 AS (address strobe, address bus valid when O) 110 R/W (1 for read, 0 for write) 111 Other control lines Not specifically mentioned here.
Acknowledge signal to processor, etc.〉 112 Signal to select ROM 102 (selected when O) 113 Signal to mask select signal 114 Logical sum of select signal 112 and mask signal 113, ROM
Input signal 115 of select signal of 102 Data input of flip-flop 104 (
It is always 1).

Next, the operation of the data protection circuit configured as described above will be explained.

In the state immediately after being reset, the flip-flop 104
The output 113 of decoder lO3 is 0, and the output 112 of decoder lO3
is not masked, so processor 101
It is now possible to access M102. That is, when the processor 101 reads the ROM 102, the output 112 of the decoder 103 becomes O, ie, select. Since the output 113 of the flip-flop 104 is also O, the output 114 of the logical sum 105 becomes O, and the ROM 102 is selected. Therefore, the processor 101 can read the contents (protected data) of ROMIO2.

At the end of this read cycle, the output of decoder 103 is 1.
12 changes from 0 to 1. This is flip flop 10
By being inputted to the clock (CK) of 4, the output 113 of the flip-flop changes from 0 to 1. Therefore, after this read cycle ends, the processor 101
Even if the decoder 10 tries to read the ROM 102,
Since the output 113 masks the output of 3, the ROM
102 is not selected, that is, the contents of ROM 102 cannot be read.

By providing such a hardware mechanism, the contents of the ROM 102 (device number) can be read once at system start-up, and thereafter the contents of the ROM 102 can be prevented from being read by software (data is protected).

When executing paid software, the device number read at startup is compared with the device number held by the paid software, and if they are equal, it is executed, and if they are not equal, it is not executed.

Note that if the ROM 102 is reset, it can be read again from the processor (only once).

〔Effect of the invention〕

As explained above, the present invention protects information that general users do not want to know by controlling so that when the protected data is read, the select signal is not sent to the ROM that holds the protected data unless it is reset. I can do it.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a data protection circuit according to the present invention. 101... Processor, 102... ROM holding data to be protected, 103... Decoder, 10
4...Flip-flop, 105...Logic OR.

Claims (1)

[Claims] A storage means for holding data to be protected, an address decoding means for making the storage means accessible from the processor, and a storage means for holding the data to be protected cannot be accessed again from the processor unless reset. a data protection circuit having a control means for controlling the data protection circuit;