JPH0363854B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to an FM receiver, and particularly to a technique that is effective when supplying an FM detection output to a stereo demodulation circuit.

[Background technology]

FIG. 1 shows an FM detector 1 and a stereo demodulation circuit 2 that were studied by the inventors prior to the present invention.
FIG. A detection output known as a so-called S-curve is obtained from the FM detector 1, and this detection output is described in the ``FM Tuner Manual'' (1st edition reprinted on September 1, 1970, published by Co., Ltd.). It is described in detail in Radio Gijutsusha, Akira Kurokawa).

The above FM detection output has an S curve, so if the FM frequency remains at a high frequency ₁ due to detuning, for example, the S curve shown in the figure indicates that the DC voltage is apparently high. It's like you're at the same level. Therefore, the FM detection output cannot be directly supplied to the demodulation circuit 2 at the next stage, and a capacitor is required to cut off the DC component.

By the way, when the power supply voltage of the FM detector 1 and the power supply voltage of the demodulation circuit 2 are relatively low voltages and have close voltage levels, the bias voltage of the demodulation circuit 2 is initially limited to a specific range. . and,
If you try to connect the output terminal of FM detector 1 and the input terminal of demodulation circuit 2 with one capacitor, the voltage swing of the detection output will change depending on the polarity of the connection, in other words, the voltage will vary from negative voltage to positive voltage. Levels are limited. In this case, high output cannot be obtained, so two electrolytic capacitors C ₁ and C ₂ are connected with the polarity shown in Fig. 1, and no matter what level of positive voltage the detection output is, the capacitors C ₁ and C ₂ Problems such as destruction of the demodulation circuit do not occur, and the input bias voltage of the demodulation circuit can be set to any level of positive voltage to allow the demodulation circuit to operate without problems.

However, such a circuit configuration requires two large capacitance and large electrolytic capacitors, so the FM
When implementing a semiconductor integrated circuit such as a receiver, the electrolytic capacitor must be an external component. For this reason, studies by the present inventors have revealed that the production cost increases as the number of external connection terminals increases, and the packaging density decreases.

[Purpose of the invention]

The present invention was made in view of the above-mentioned circumstances, and its purpose is to reduce the number of DC blocking capacitors provided between the FM detector and the stereo demodulation circuit, and to transmit the detected output. Our goal is to provide an FM receiver with the following features.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief summary of the invention disclosed in this application is as follows.

In other words, the AC component of either one of the FM detection outputs supplied to points A and B with opposite phases to each other is removed by switch SW and capacitor C _A , and the DC component and the other AC component are transmitted and added. After that, the FM detection output is supplied to the amplifier circuit A ₁ , and the added FM detection output is superimposed on the desired bias voltage of the amplifier circuit A ₁ , which is set in relation to the bias voltage of the FM demodulation circuit in the subsequent stage. By reducing the coupling capacitor between the detector and the FM demodulation circuit,
This achieves the objectives of the invention.

Embodiment 1 Next, a first embodiment of an FM receiver to which the present invention is applied will be explained with reference to FIGS. 2 and 3.

Figure 2 shows the circuit configuration of an IC-based FM receiver from the receiving antenna to the FM detector, and the circles surrounding the numbers are external connection terminals. In the above FM receiver, the present invention is shown as a circuit block after the FM detector, and the above circuit block is interposed between the FM detector and the stereo demodulation circuit shown in FIG. . Therefore,
In explaining the embodiment, for convenience of explanation, the explanation will be given sequentially starting from the antenna input.

The circuit configurations and circuit operations of the antenna 11, high frequency amplification circuit 12, frequency mixing circuit 13, and local oscillation circuit 14 are well known to those skilled in the art. The output signal of the mixing circuit 13 is introduced into the IC via the coupling capacitor _C11 , and is voltage amplified and amplitude limited by the FMIF limiter constituted by the multi-stage connected differential amplifiers D _A1 to D _A5 . Na
AM components are removed.

On the other hand, from the output of the differential amplifier D _A5 to the differential amplifier
A predetermined DC NFB is applied to D _A1 by a capacitor C ₁₁ and a resistor R ₁₁ , and the differential amplifiers D _A1 to _{D A5}
Bias stabilization is being performed. Furthermore, a ceramic filter 15 having a predetermined pass band is connected between the differential amplifiers D _A5 and D _A6 .

Thus, the differential amplifier as a buffer amplifier
The two output signals with opposite phases obtained from D _A6 are transmitted by a transistor that operates as a buffer amplifier.
Supplied to each base of Q ₁ and Q ₂ . transistor
The output voltages of Q ₁ and Q ₂ are obtained as voltage drops across the emitter resistors R ₁₂ and R ₁₃ and are supplied to the double-balanced differential amplifier circuit 31 at the next stage. And the transistor
The above-mentioned double balance type differential amplifier 31 consisting of Q ₃ to Q ₈
A phase shifter 30 (for _example , _a frequency of _{10.7 M}
90° phase shift with a center frequency of Hz) constitutes a well-known quadrature detector, with nodes N ₁ ,
S-shaped detection outputs S ₁ and S ₂ having mutually opposite phases are generated at N ₂ . Note that the reference voltage V _RFF1 determines the bias voltage of the transistors _Q5 to _Q8 via the resistors _R16 and _R17 .

Transistors Q ₉ , Q ₁₀ , and Q ₁₁ constitute a current mirror circuit, and transistors Q ₁₂ , Q ₁₃ , and Q ₁₄ also constitute a current mirror circuit. In addition, transistors Q ₁₅ and Q ₁₆ constitute a current mirror circuit CS ₁ ,
Transistors Q ₁₇ and Q ₁₈ similarly constitute a current mirror circuit, and each of these current mirror circuits operates as an output circuit of the quadrature detector. Then, when node N ₁ is at a high level and node N ₂ is at a low level, for example, point A and point B
At the points, S-shaped detection outputs S ₁ and S ₂ as shown are obtained.

What should be noted here is the circuit operation of the circuit block 32.

First, the circuit operation when the switch SW is connected to contact a will be described. S-shaped detection output S ₁ as described above,
If S ₂ is obtained and the current change as shown by the arrow is a low frequency or direct current that is close to direct current,
Capacitor C _A connected to point A does not respond in any way. Therefore, if resistance R _A = R _B , the resistance
The analog addition output, which is the common connection point X of R _A and R _B , is equal to a constant reference voltage V _REF2 and is not affected by the current shown in the direction of the arrow. That is, only V _REF2 appears at the output of operational amplifier _A1 .

Next, the circuit operation when the current indicated by the arrow is in the audio frequency band will be described.

In this case, the current change at point A is bypassed to GND via capacitor _CA and is not transmitted to point X. Therefore, the operational amplifier _A1 amplifies the voltage at point B by the resistors R _B and R _C , and the resistor R _B
= R _L , output reliability V ₀ with the same amplitude and opposite phase as point B can be obtained at the output terminal Z. Thus, the output signal V ₀ in response to the audio signal is
Obtained from _A1 .

While the above circuit is operating, the voltage generated at one end of capacitor C _A is
(Automatic Freqency Control) signal is supplied to the local oscillation circuit 14. In this case, it is preferable that the frequency of the local signal f _L is higher than the frequency of the carrier signal.

On the other hand, when switch SW is switched to contact B, capacitor C _A operates in the same manner as above for the audio signal appearing at point B, and in this case, an output with the same amplitude and opposite phase as point A is output to output terminal Z. signal
V ₀ is obtained.

While the above circuit operation is being performed, the voltage generated at one end of the capacitor _CA is supplied to the local oscillation circuit 14 as an AFC signal. in this case,
It is preferable that the frequency of the local signal f _L is smaller than the frequency of the carrier signal.

Next, the case where the output signal V ₀ is supplied to a stereo demodulation circuit (hereinafter referred to as MPX) will be described with reference to FIG. The IC shown on the left side of Figure 3 has the same circuit configuration as the IC shown in Figure 2, and the output signal V ₀ obtained from terminal 7 is passed through the coupling capacitor _C to the FM shown on the right side. The signal is supplied to the demodulation circuit 40.

Zener diode D _Z , transistor Q ₄₁ , Q ₄₂ ,
Q ₄₃ , resistors R ₄₁ , R ₄₂ , R ₄₃ , and R ₄₄ constitute a Zener stabilized power supply circuit 41 . The voltage V _BB becomes the bias voltage of the amplifier 43 provided as a buffer amplifier, and the AC component of the output signal V ₀ is the voltage
_VBB is supplied to the superimposition amplifier 43.

PLL circuit 4 configuring stereo demodulation circuit 40
2. The circuit configuration and circuit operation of the decoder 43 etc. are well known to those skilled in the art, and the decoder 43 etc.
Demodulated R and L signals are obtained from the .

By the way, according to the above circuit configuration, since the DC voltage level of Z is equal to V _REF2 as described above, when the reference voltage V _REF2 and the bias voltage V _BB are V _REF2 < V _BB , one capacitor C _C is Just connect it as you like. Also, if V _REF2 > V _BB , one capacitor
Connect by reversing the polarity of _C.

Embodiment 2 Next, a second embodiment of the present invention will be described with reference to FIG.

In this embodiment, the bias voltage _VBB is used as the bias voltage of the operational amplifier _A1 . Therefore, the output signal V ₀ can be directly connected to the buffer amplifier 43 without going through a capacitor, and in this case, as described in the first embodiment,
This is effective in reducing the number of pins when configuring the FM receiver and the stereo demodulation circuit 40 using the same IC.

〔effect〕

(1) Since the FM detection output and the reference voltage are in opposite phase to each other, an S-shaped detection output of either of the above FM detection outputs can be obtained at a DC level based on this reference voltage, so the bias voltage of the stereo demodulation circuit is The number of capacitors for transmitting the detection output can be reduced.

(2) According to (1) above, the reference voltage can be made the same as the bias voltage and can be directly connected without using the capacitor.

(3) Due to (2) above, the FM detection circuit and the stereo demodulation circuit can be configured in the same IC, and the IC
The number of external connection terminals can be reduced.

(4) Due to the above (3), the production cost of the FM receiver can be significantly reduced.

Although the invention made by the present inventor has been specifically explained based on the examples above, the present invention is not limited to the above examples, and it is understood that various changes can be made without departing from the gist of the invention. Needless to say.

For example, the FM detection circuit is not limited to a quadrature detection circuit, and may have other circuit configurations. Furthermore, the Zener diode stabilized power supply circuit may be any other type of constant voltage circuit.

[Application field]

In the above explanation, the invention made by the present inventor will mainly be explained in the field of application that is the background thereof.
Although the description has been made regarding an FM receiver, the present invention is not limited thereto.

For example, it can be used for FM tuners.

The present invention can be used for at least all electronic devices that perform FM detection.

[Brief explanation of drawings]

FIG. 1 shows a block diagram showing the connection relationship between an FM detector and a stereo demodulation circuit that was studied prior to the present invention, and FIG. 2 shows a circuit diagram of an FM receiver showing the first embodiment of the present invention. Figure 3 shows
A circuit diagram showing a connection relationship between an FM detector and a stereo demodulation circuit is shown, and FIG. 4 is a circuit diagram showing a connection relationship between an FM detector and a stereo demodulation circuit showing a second embodiment of the present invention. S ₁ , S ₂ ... S-shaped detection output, V ₀ ... Output signal,
R _A , R _B , R _C ... Resistor, A ₁ ... Operational amplifier,
V _REF2 ...Reference voltage, V _BB ...Bias voltage, SW
...Switch, C _A , C _C ...Capacitor, 30...
...Phase shifter, 31...FM detector, 40...Stereo demodulation circuit.

Claims (1)

[Claims] 1. A switch circuit that selectively removes the alternating current component of one of the FM detection outputs that are supplied in opposite phases and transmits the other FM detection output, and one FM detection output from which the alternating current component has been removed. and the other FM detection output, and an amplifier circuit that superimposes the output signal of the adder circuit on a desired bias voltage, amplifies it, and supplies it to the next-stage FM stereo demodulation circuit, etc. An FM receiver characterized by: