JPH0364052A - Hybrid integrated circuit - Google Patents
Hybrid integrated circuitInfo
- Publication number
- JPH0364052A JPH0364052A JP1199393A JP19939389A JPH0364052A JP H0364052 A JPH0364052 A JP H0364052A JP 1199393 A JP1199393 A JP 1199393A JP 19939389 A JP19939389 A JP 19939389A JP H0364052 A JPH0364052 A JP H0364052A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- wiring board
- hybrid integrated
- circuit device
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3405—Edge mounted components, e.g. terminals
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Details Of Resistors (AREA)
- Multi-Conductor Connections (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は混成集積回路装置、特に配線基板と外部端子と
なるリードの接合構造に適用して有効な技術に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a technology that is effective when applied to a hybrid integrated circuit device, particularly to a bonding structure between a wiring board and a lead serving as an external terminal.
混成集積回路装置は多機能、高密度化に適した構造とな
ることから多用されている。混成集積回路装置の標準的
な製造方法は、たとえば、社団法人、日本電子機械工業
会発行「ハイブリッドICガイド」、昭和62年7月2
1日発行、P8〜P9に記載されているように、導体印
刷・焼成、抵抗印刷・焼成、オーバーコートガラス、グ
イボンディング、ワイヤボンディング、樹脂コーティン
グ、部品搭載、外部リード付け、外装樹脂封止なる工程
を順次繰て製造される。Hybrid integrated circuit devices are widely used because they have a structure suitable for multiple functions and high density. The standard manufacturing method for hybrid integrated circuit devices is described, for example, in "Hybrid IC Guide" published by the Japan Electronics Industry Association, July 2, 1988.
Published on the 1st, as described on pages 8 to 9, conductor printing and firing, resistance printing and firing, overcoat glass, Gui bonding, wire bonding, resin coating, component mounting, external lead attachment, and exterior resin sealing. It is manufactured by repeating the steps one after another.
一方、工業調査会発行「電子材料J 19B5年5月号
、昭和60年5月1日発行、P162〜P167には、
高周波高出力用ハイブリッドICとして、移動無線通信
用ハイブリッドICについて記載されている。この文献
には、回路設計においてインピーダンス整合に注意を要
する内容が記載されている。On the other hand, in "Electronic Materials J, May 19B5 issue, published May 1, 1985, pages 162 to 167, published by Kogyo Research Association,
A hybrid IC for mobile radio communication is described as a high frequency, high output hybrid IC. This document describes the need to pay attention to impedance matching in circuit design.
混成集積回路装置においては、配線基板の配線層と外部
端子(リード)との接続は、配線基板の一面に設けられ
た端子取付部に半田等の接合材を用いてリードを重ねて
固定する構造、あるいは−端にクランプ部を有するリー
ドを配線基板にクランプさせかつ半田等の接合材で固定
する構造が多用されている。高周波高出力バイブリッド
ICにあっては、インピーダンス整合をとるために、リ
ードは配線基板の一面に重ねられて固定する構造が採用
されている。In a hybrid integrated circuit device, the wiring layer of the wiring board and the external terminals (leads) are connected using a structure in which the leads are stacked and fixed using a bonding material such as solder to the terminal mounting part provided on one side of the wiring board. Alternatively, a structure in which a lead having a clamp portion at the negative end is clamped to a wiring board and fixed with a bonding material such as solder is often used. In high-frequency, high-output hybrid ICs, a structure is adopted in which the leads are stacked and fixed on one surface of a wiring board in order to achieve impedance matching.
前記移動無線通信用ハイブリッドICを無線のキー局で
使用する場合、その動作頻度は車載用に比較して格段に
多い、このため、より信頼性の高い製品が望まれている
。When the hybrid IC for mobile radio communication is used in a wireless key station, its operation frequency is much higher than that in a vehicle, and therefore a product with higher reliability is desired.
このような動作頻度の高い混成集積回路装置の特性向上
において、過酷な条件で温度サイクル試験(マイナス5
5’cからプラス150°C)を行い、剥離テスト(ピ
ーリングテスト)を行ったところ、端子取付部が配線基
板から剥離する不良モードが発見された。第9図は端子
取付部に接続されたリードに剥離力を加えて端子取付部
を剥離させた状態を示す模式図である。すなわち、配線
基板1の主面には配線層2が設けられるとともに、この
配線層2の配wA基Fi1の端に至る部分は、矩形の端
子取付部3となっている。そして、前記端子取付部3に
は、リード4の先端の矩形の取付部5が半田からなる接
合材6を介して固定されている。前記配線基板1はセラ
ミンク板からなるため、その熱膨張係数は6〜7X10
−’/“Cとなる。これに対して前記端子取付部3は銅
で形成されているため、その熱膨張係数は16〜f8X
10−”/゛Cとなり、両者の熱膨張係数は一部も違う
。In order to improve the characteristics of hybrid integrated circuit devices that operate frequently, temperature cycle tests (-5
5'c to +150°C) and a peeling test was performed, and a failure mode was discovered in which the terminal attachment part peeled off from the wiring board. FIG. 9 is a schematic diagram showing a state in which the terminal mounting portion is peeled off by applying a peeling force to the lead connected to the terminal mounting portion. That is, a wiring layer 2 is provided on the main surface of the wiring board 1, and a portion of this wiring layer 2 that reaches the end of the wiring A base Fi1 is a rectangular terminal attachment portion 3. A rectangular attachment portion 5 at the tip of the lead 4 is fixed to the terminal attachment portion 3 via a bonding material 6 made of solder. Since the wiring board 1 is made of a ceramic board, its coefficient of thermal expansion is 6 to 7X10.
-'/"C. On the other hand, since the terminal mounting part 3 is made of copper, its thermal expansion coefficient is 16~f8X
10-''/'C, and the thermal expansion coefficients of both are partially different.
一方、前記リード4と端子取付部3は接合強度の強い半
田によって接合されていることから、熱応力によって両
者が剥離するようなことは殆どないが、前記端子取付部
3は配線基板1の主面に導体を印刷しかつ焼成して形成
されているため、両者の接合力は必ずしも高いとは言え
ず、前記端子取付部3に発生する熱応力によって接合界
面の接合強度が低くなり、ビーリングテストによって、
第9図に示されるように端子取付部3が配線基板1から
剥離してしまう。On the other hand, since the leads 4 and the terminal attachment part 3 are joined by solder with a strong bonding strength, there is almost no possibility that the two will peel off due to thermal stress. Since it is formed by printing a conductor on the surface and firing it, the bonding strength between the two is not necessarily high, and the bonding strength at the bonding interface decreases due to thermal stress generated in the terminal mounting portion 3, resulting in beer vibration. By testing,
As shown in FIG. 9, the terminal mounting portion 3 peels off from the wiring board 1.
本発明の目的は、端子強度の高い信頼性の高い混成集積
回路装置を提供することにある。An object of the present invention is to provide a highly reliable hybrid integrated circuit device with high terminal strength.
本発明の前記ならびにそのほかの目的と新規な特徴は、
本明細書の記述および添付図面からあきらかになるであ
ろろ。The above and other objects and novel features of the present invention include:
It will become clear from the description of this specification and the accompanying drawings.
本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、下記のとおりである。A brief overview of typical inventions disclosed in this application is as follows.
すなわち、本発明の混成集積回路装置は、配線基板の主
面に設けられた端子取付部に接合材を介してリードが固
定された構造となっている。また、前記端子取付部の周
縁は剥離抑止コート膜で被われている。That is, the hybrid integrated circuit device of the present invention has a structure in which the leads are fixed to the terminal mounting portions provided on the main surface of the wiring board via the bonding material. Further, the periphery of the terminal attachment portion is covered with a peeling prevention coating film.
〔作用]
上記した手段によれば、本発明の混成集積回路装置は、
配線基板の主面に設けられた端子取付部に接合材を介し
てリードが固定された構造となっているが、前記端子取
付部の周縁は剥離抑止コート膜で被われていることから
、端子取付部は強固に配線基板に固定されることになり
、温度サイクル試験において熱応力が端子取付部に作用
しても、端子取付部は配線基板から剥離し難くなる。[Operation] According to the above-described means, the hybrid integrated circuit device of the present invention has the following features:
The structure is such that the leads are fixed to the terminal mounting portion provided on the main surface of the wiring board via a bonding material, but since the periphery of the terminal mounting portion is covered with a peeling prevention coating film, the terminal The attachment portion is firmly fixed to the wiring board, and even if thermal stress acts on the terminal attachment portion in a temperature cycle test, the terminal attachment portion is difficult to separate from the wiring board.
以下図面を参照して本発明の一実施例について説明する
。An embodiment of the present invention will be described below with reference to the drawings.
第1図は本発明の一実施例による混成集積回路装置にお
ける端子取付部を示す模式的平面図、第2図は同じく断
面図、第3図は同しく本発明の混成集積回路装置の外観
を示す平面図、第4図は同じく本発明の混成集積回路装
置の製造を示すフローチャート、第5図は同じく配線層
が形成された配線基板の一部を示す平面図、第6図は同
じく剥離抑止コート膜が形成された配線基板の一部を示
す平面図、第7図は同じくリードが接合された配線基板
の一部を示す平面図である。FIG. 1 is a schematic plan view showing a terminal mounting part in a hybrid integrated circuit device according to an embodiment of the present invention, FIG. 2 is a sectional view of the same, and FIG. 3 is an external view of the hybrid integrated circuit device of the present invention. FIG. 4 is a flowchart showing the manufacturing of the hybrid integrated circuit device of the present invention, FIG. 5 is a plan view showing a part of the wiring board on which the wiring layer is formed, and FIG. FIG. 7 is a plan view showing a part of the wiring board on which a coat film is formed, and FIG. 7 is a plan view showing a part of the wiring board to which leads are similarly bonded.
この実施例の混成集積回路装置は外観的には、第3図に
示されるように、熱伝導性の良好な金属、たとえば、銅
板からなるヘッダ10と、このヘッダ10の主面に重ね
合わされた第2図に示されるセラミック板からなる配線
基板1と、この配線基板lの主面に取り付けられた封止
ケース11と、この封止ケース11の一側から突出する
4本のり−ド4とからなっている。前記ヘッダ10は、
特に限定はされないが、2.3mmの厚さとなるととも
に、配線基板1は0.6mm程度の厚さとなっている。As shown in FIG. 3, the hybrid integrated circuit device of this embodiment has a header 10 made of a metal having good thermal conductivity, such as a copper plate, and a header 10 that is superimposed on the main surface of the header 10. A wiring board 1 made of a ceramic board as shown in FIG. It consists of The header 10 is
Although not particularly limited, the thickness is 2.3 mm, and the wiring board 1 has a thickness of about 0.6 mm.
また、封止ケース11はプラスチック製であり、図示し
ないシリコーン樹脂系からなる接着材で配線基板lに接
合されている。また、前記封止ケース11の両端から突
出するヘッダ10の部分には、この混成集積回路装置を
実装する際利用される取付溝12が設けられている。そ
して、前記封止ケース11内には、抵抗、コンデンサ等
の受動部品やパワー半導体素子等の能動部品が搭載され
、前記配線基板lの主面に設けられた配線層2等によっ
て所望の回路を形成している。Further, the sealing case 11 is made of plastic, and is bonded to the wiring board l with an adhesive made of silicone resin (not shown). Further, the portions of the header 10 that protrude from both ends of the sealing case 11 are provided with mounting grooves 12 that are used when mounting this hybrid integrated circuit device. Passive components such as resistors and capacitors and active components such as power semiconductor elements are mounted inside the sealing case 11, and a desired circuit is formed by the wiring layer 2 provided on the main surface of the wiring board l. is forming.
このような混成集積回路装置において、リード4は、そ
の内端の取付部5が第1図に示されるような矩形の端子
取付部3に半田からなる接合材6を介して固定されてい
る。前記配線112および端子取付部3ならびにリード
4の寸法は、所望のインピーダンスとなるように選択さ
れる。たとえば、前記配線層2の幅は1mm以下、端子
取付部3は一辺が1.5mmの正方形、リード4の厚さ
は0゜25mm、リード4の幅は0.45mm、リード
4の取付部5は一辺が1mmの正方形となっている。In such a hybrid integrated circuit device, the mounting portion 5 at the inner end of the lead 4 is fixed to a rectangular terminal mounting portion 3 as shown in FIG. 1 via a bonding material 6 made of solder. The dimensions of the wiring 112, the terminal attachment portion 3, and the lead 4 are selected to provide a desired impedance. For example, the width of the wiring layer 2 is 1 mm or less, the terminal attachment part 3 is a square with a side of 1.5 mm, the thickness of the lead 4 is 0°25 mm, the width of the lead 4 is 0.45 mm, and the attachment part 5 of the lead 4 is a square with sides of 1 mm.
また、これが本発明の特徴的なことの一つであるが、前
記リード4の取付部5が取り付けられる端子取付部3の
周縁は、概念的に示す第1図および第2図に示されるよ
うに、剥離抑止コー[113(ハツチングが施された領
域)で被われている。Furthermore, this is one of the characteristics of the present invention, and the periphery of the terminal attachment part 3 to which the attachment part 5 of the lead 4 is attached is as conceptually shown in FIGS. 1 and 2. It is covered with a peeling prevention coat 113 (hatched area).
この剥離抑止コート11113は、配線基板lの主面の
配線層2や抵抗(厚膜抵抗)を保護するためにコーティ
ングされる厚さ数10pmの厚さのガラスコーテイング
膜によって形成されている。この剥離抑止コート膜13
によって端子取付部3の周縁は配線基板1に固定される
結果、端子取付部3の配m基板lに対する接合力は大き
くなる。したがって、前記へラダ10(熱膨張係数16
〜18x10−’1/’C)と、配!!基板l(熱膨張
係数6〜7X10−’1/’C)の熱膨張係数が1桁と
大きく異なり、両者間に熱応力が繰り返して作用して仮
に接合強度がやや低下したとしても、前記剥離抑止コー
ト膜13のカバーリング作用によって、端子取付部3が
配線基板1から剥離するようなこともなくなる。This peeling prevention coat 11113 is formed of a glass coating film several tens of pm thick that is coated to protect the wiring layer 2 and the resistor (thick film resistor) on the main surface of the wiring board l. This peeling prevention coating film 13
As a result, the peripheral edge of the terminal mounting portion 3 is fixed to the wiring board 1, and as a result, the bonding force of the terminal mounting portion 3 to the wiring board l becomes large. Therefore, the helada 10 (thermal expansion coefficient 16
~18x10-'1/'C) and arrangement! ! Even if the thermal expansion coefficients of the substrates 1 (thermal expansion coefficients 6 to 7X10-'1/'C) are significantly different from each other by one order of magnitude, and the bonding strength is slightly reduced due to repeated thermal stress between the two, the peeling will not occur. Due to the covering effect of the deterrent coating film 13, the terminal mounting portion 3 is prevented from peeling off from the wiring board 1.
また、前記剥離抑止コー)1113は、端子取付部3の
全周に亘って設けられ、かつ接合材6である半田がガラ
スである剥離抑止コート膜13に濡れないため、接合材
6はこの剥離抑止コートI!13の内側で盛り上がる。Further, the peeling prevention coat 1113 is provided all around the terminal mounting portion 3, and since the solder that is the bonding material 6 does not get wet with the peeling prevention coating film 13 that is glass, the bonding material 6 does not prevent this peeling. Deterrent coat I! It swells inside 13.
したがって、リード4の取付部5は半田の表面張力によ
って端子取付部3の中心に中心が合うように固定され、
リード4の取り付は精度が向上する。また、前記剥離抑
止コート膜13から接合材6が溢れ出ないため、配線基
板1の緑から接合材6が流出する不良も発生しないばか
りか、リード4の取付部5を固定する接合材6の厚さも
一定となり、接合性が安定する。Therefore, the attachment part 5 of the lead 4 is fixed by the surface tension of the solder so that its center is aligned with the center of the terminal attachment part 3.
The accuracy of attaching the lead 4 is improved. Further, since the bonding material 6 does not overflow from the peeling prevention coat film 13, not only does the defect in which the bonding material 6 flows out from the green part of the wiring board 1 occur, but also the bonding material 6 that fixes the mounting portion 5 of the lead 4 does not overflow. The thickness is also constant, and the bonding performance is stable.
つぎに、このような混成集積回路装置の製造、特に剥離
押止コー)!1113の製造方法について説明する。Next, the manufacturing of such hybrid integrated circuit devices, especially the peeling and pressing method)! The manufacturing method of 1113 will be explained.
混成集積回路装置は、第4図のフローチャートに示され
る各作業工程を経て製造される。最初にスルーホールや
くり抜き部分等を有するパターニングされたセラミック
板が用意される。その後、第5図に示されるように、前
記セラミック板14の表面には、常用の印刷法によって
導体が所望パターンに印刷されるとともに焼成され、配
線層2および矩形状の端子取付部3等が形成される。ま
た、前記セラミック板14の表面には、常用の印刷法に
よって抵抗が所望パターンに印刷(図示せず)されると
ともに焼成される。抵抗は必要に応じてトリミングされ
て所望の抵抗値とされる。The hybrid integrated circuit device is manufactured through each work process shown in the flowchart of FIG. First, a patterned ceramic plate having through holes, hollowed out parts, etc. is prepared. Thereafter, as shown in FIG. 5, a conductor is printed in a desired pattern on the surface of the ceramic plate 14 by a commonly used printing method and fired, thereby forming a wiring layer 2, a rectangular terminal mounting portion 3, etc. It is formed. Further, on the surface of the ceramic plate 14, a resistor is printed in a desired pattern (not shown) using a commonly used printing method and then fired. The resistor is trimmed as necessary to a desired resistance value.
つぎに、第6図のハツチング領域で示されるように、ガ
ラスコーティングがセラ壽ツク板14の所望部分に施さ
れ、オーバコートガラス膜15が形成される。この結果
、セラミック板14は配線基板1となる。前記オーバコ
ートガラス膜15は、前記抵抗や配線層2等を被うよう
に設けられる。Next, as shown by the hatched area in FIG. 6, a glass coating is applied to desired portions of the ceramic plate 14 to form an overcoat glass film 15. As a result, the ceramic board 14 becomes the wiring board 1. The overcoat glass film 15 is provided to cover the resistor, wiring layer 2, etc.
たとえば、隣合う配線層2間にチップ抵抗が搭載される
場合には、第6図に示されるように、配線層2の抵抗搭
載領域16にはオーバコートガラス膜15は設けられな
い、また、このガラスコーティング時、前記端子取付部
3の周縁はコーティングされ、オーバコートガラス膜1
5からなる剥離押止コート膜13が形成される。For example, when a chip resistor is mounted between adjacent wiring layers 2, the overcoat glass film 15 is not provided in the resistor mounting area 16 of the wiring layer 2, as shown in FIG. During this glass coating, the periphery of the terminal mounting portion 3 is coated, and the overcoat glass film 1
5 is formed.
つぎに、このような配線基板1は前記へラダ10の主面
に半田等によって重ね合わされて固定される。その後、
チンプボンディング、ワイヤボンディングが行われる。Next, such a wiring board 1 is overlaid and fixed on the main surface of the ladder 10 by soldering or the like. after that,
Chimp bonding and wire bonding are performed.
また、チップやワイヤ等は、樹脂でコーティング(アン
ダーコートレジン)されて保護がなされる。また、第7
図に示されるように、前記配線基IIの隣合う端子取付
部3に亘ってチップ抵抗17が、点々で示される半田1
8を介して搭載(部品搭載)される。In addition, chips, wires, etc. are coated with resin (undercoat resin) to protect them. Also, the seventh
As shown in the figure, a chip resistor 17 is connected to the solder 1 shown in dots over the adjacent terminal mounting portions 3 of the wiring board II.
It is mounted (components are mounted) through 8.
つぎに、第7図に示されるように、配線基板lの各端子
取付部3に半田からなる接合材6を介してリード4の取
付部5が固定される。この際、前述のように、端子取付
部3の周囲は半田が濡れない剥離抑止コート膜13で被
われていることから、取付部5は半田の表面張力によっ
て高精度に位置決めされて固定される。また、固定する
接合材6定する。Next, as shown in FIG. 7, the mounting portions 5 of the leads 4 are fixed to each terminal mounting portion 3 of the wiring board 1 via a bonding material 6 made of solder. At this time, as mentioned above, since the terminal mounting part 3 is covered with the peeling prevention coating film 13 that does not wet the solder, the mounting part 5 is positioned and fixed with high precision by the surface tension of the solder. . Further, the bonding material 6 to be fixed is determined.
つぎに、前記配線基板1の主面側には封止ケース11が
取り付けられてパッケージングがなされ、混成集積回路
装置が製造される。Next, a sealing case 11 is attached to the main surface side of the wiring board 1 for packaging, and a hybrid integrated circuit device is manufactured.
このような実施例によれば、つぎのような効果が得られ
る。According to such an embodiment, the following effects can be obtained.
(1)本発明の混成集積回路装置は、配線基板上に設け
られた配線層の端子取付部の周縁が剥離抑止コート膜で
被われていることから、端子取付部の配線基板に対する
接合力が従来に比較して全体として大きくなるため、セ
ラミック板からなる配vA基板と金属からなる端子取付
部との間に熱膨張係数の違いによって繰り返し熱応力が
発生しても、端子取付部は配線基板から剥離するような
こともな(なり、端子取付部の支持の信頼性が向上する
という効果が得られる。(1) In the hybrid integrated circuit device of the present invention, the periphery of the terminal mounting portion of the wiring layer provided on the wiring board is covered with a peeling prevention coating film, so that the bonding force of the terminal mounting portion to the wiring board is reduced. Since the overall size is larger than that of the conventional wiring board, even if repeated thermal stress occurs due to the difference in coefficient of thermal expansion between the wiring board made of a ceramic plate and the terminal mounting part made of metal, the terminal mounting part will still be attached to the wiring board. There is no possibility that the terminal will peel off from the terminal, and the reliability of supporting the terminal mounting portion will be improved.
(2)上記(1)により、本発明の混成集積回路装置は
、前記端子取付部の周縁がガラスからなる剥離抑止コー
ト膜で被われていることから、混成集積回路装置の製造
時、前記剥離抑止コート膜が半田流出を阻止するダムの
役割を果すため、一定量の半田は一定の面積内に納まり
、半田接合層の厚さは常に一定となって接合の信頼度が
安定するという効果が得られる。(2) According to (1) above, in the hybrid integrated circuit device of the present invention, the periphery of the terminal mounting portion is covered with a peeling-preventing coating film made of glass, so that when manufacturing the hybrid integrated circuit device, the peeling Since the deterrent coating film acts as a dam to prevent solder from flowing out, a certain amount of solder is contained within a certain area, and the thickness of the solder bonding layer remains constant, resulting in stable bonding reliability. can get.
(3)上記(2)により、本発明の混成集積回路装置は
、前記端子取付部の周縁がガラスからなる剥離抑止コー
ト膜で被われていることから、混成集積回路装置の製造
時、溶けた半田が剥離抑止コート膜内に納まるため、溶
けた半田上に載る矩形状の取付部は半田の表面張力によ
って常に中心に位置するようになり、リードの接合位置
が一定となるという効果が得られる。(3) According to (2) above, in the hybrid integrated circuit device of the present invention, since the periphery of the terminal mounting portion is covered with a peeling prevention coating film made of glass, melting may occur during manufacturing of the hybrid integrated circuit device. Since the solder is contained within the peel-off prevention coating film, the rectangular mounting part that rests on the melted solder is always centered in the center due to the surface tension of the solder, resulting in the effect that the lead bonding position remains constant. .
(4)上記(1)により、本発明の混成集積回路装置は
、前記端子取付部の周縁がガラスからなる剥離抑止コー
ト膜で被われていることから、混成集積回路装置の製造
時、前記剥離抑止コート膜が半田流出を阻止するダムの
役割を果すため、半田は剥離抑止コート膜から溢れ出る
ことがなく、配線基板の縁外から半田が食み出る不良の
防止が達(5)上記(1)により、本発明の混成集積回
路装置は、前記端子取付部の周縁がガラスからなる剥離
抑止コート膜で被われていることから、混成集積回路装
置の製造時、前記剥離抑止コート膜が半田流出を阻止す
るダムの役割を果すため、半田は剥離抑止コート膜から
溢れ出ることがなく、リードピッチをより小さくできる
という効果が得られる。(4) According to (1) above, in the hybrid integrated circuit device of the present invention, since the periphery of the terminal attachment portion is covered with a peeling-preventing coating film made of glass, the peeling-off prevention coating film is not removed during manufacturing of the hybrid integrated circuit device. Since the inhibitory coating film acts as a dam to prevent solder from flowing out, the solder does not overflow from the peeling prevention coating film, thereby preventing defects in which solder protrudes from outside the edge of the wiring board (5) (5). According to 1), in the hybrid integrated circuit device of the present invention, since the periphery of the terminal mounting portion is covered with a peeling prevention coating film made of glass, the peeling prevention coating film is not soldered when manufacturing the hybrid integrated circuit device. Since the solder acts as a dam to prevent outflow, the solder does not overflow from the peeling prevention coating film, resulting in the effect that the lead pitch can be made smaller.
(6)上記(1)〜(5)により、本発明によれば、リ
ード接合強度の高い信頼度の高い混成集積回路装置を提
供することができるという相乗効果が得られる。(6) According to the above (1) to (5), according to the present invention, a synergistic effect can be obtained in that a highly reliable hybrid integrated circuit device with high lead bonding strength can be provided.
以上本発明者によってなされた発明を実施例に基づき具
体的に説明したが、本発明は上記実施例に限定されるも
のではなく、その要旨を逸脱しない範囲で種々変更可能
であることはいうまでもない、たとえば、第8図に示さ
れるように、前記端子取付部3の配線基板lに対する接
合強度を高くするためだけである場合には、前記剥離抑
止コー縁、すなわちリードの外端寄りの縁部分に設けて
もよく、前記実施例同様な効果が得られる。Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. For example, as shown in FIG. 8, if the purpose is only to increase the bonding strength of the terminal attachment part 3 to the wiring board l, the edge of the peeling prevention cord, that is, the edge near the outer end of the lead. It may be provided at the edge portion, and the same effect as in the previous embodiment can be obtained.
以上の説明では主として本発明者によってなされた発明
をその背景となった利用分野である混成集積回路装置の
製造技術に適用した場合について説明したが、それに限
定されるものではない。In the above description, the invention made by the present inventor is mainly applied to the technology for manufacturing hybrid integrated circuit devices, which is the background field of application, but the invention is not limited thereto.
本願において開示される発明のうち代表的なものによっ
て得られる効果を簡単に説明すれば、下記のとおりであ
る。A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.
本発明の混成集積回路装置は、配線基板の主面に設けら
れた端子取付部に接合材を介してリードが固定された構
造となっているが、前記端子取付部の周縁は剥離抑止コ
ート膜で被われていることから、端子取付部は強固に配
線基板に固定されることになり、温度サイクル試験にお
いて熱応力が端子取付部に作用しても、端子取付部は配
線基板から剥離し難くなる。したがって、リードの接合
の信頼性が向上し、混成集積回路装置の信頼性が高くな
る。The hybrid integrated circuit device of the present invention has a structure in which the leads are fixed to the terminal mounting portion provided on the main surface of the wiring board via a bonding material, and the periphery of the terminal mounting portion is coated with a peeling prevention coating. Because the terminal mounting part is covered with Become. Therefore, the reliability of lead bonding is improved, and the reliability of the hybrid integrated circuit device is increased.
第1図は本発明の一実施例による混成集積回路装置にお
ける端子取付部を示す模式的平面図、第2図は同じく断
面図、
第3図は同じく本発明の混成集積回路装置の外観を示す
平面図、
第4図は同じく本発明の混成集積回路装置の製造を示す
フローチャート、
第5図は同じく配線層が形成された配線基板の一部を示
す平面図、
第6図は同じく剥離抑止コート膜が形成された配線基板
の一部を示す平面図、
第7図は同じくリードが接合された配線基板の一部を示
す平面図、
第8図は本発明の他の実施例による端子取付部を示す平
面図、
第9図は端子取付部に接続されたリードに剥離力を加え
て端子取付部をHMさせた状態を示す模式図である。
1・・・配線基板、2・・・配線層、3・・・端子取付
部、4・・・リード、5・・・取付部、6・・・接合材
、10・・・ヘッダ、11・・・封止ケース、12・・
・取付溝、13・・・剥離抑止コート膜、14・・・セ
ラミック板、15・・・オーバコートガラス膜、16・
・・抵抗搭載領域、17・・・チップ抵抗、18・・・
半田。
第 1
図
F13
図
11J”li、ケース
13−五りS力甲上コート股
第
4
図
図
2−曲乙a4
3−4J 駁イ=rn
第
図
第
図
13−!t、J歯−L主IF2コート腋15−オーバコ
ートtラス濃FIG. 1 is a schematic plan view showing a terminal attachment part in a hybrid integrated circuit device according to an embodiment of the present invention, FIG. 2 is a sectional view of the same, and FIG. 3 is an external view of the hybrid integrated circuit device of the present invention. 4 is a flowchart showing the manufacturing of the hybrid integrated circuit device of the present invention. FIG. 5 is a plan view showing a part of the wiring board on which the wiring layer is formed. FIG. 6 is the same as the peeling prevention coat. FIG. 7 is a plan view showing a part of the wiring board on which the film is formed; FIG. 7 is a plan view showing a part of the wiring board to which leads are also bonded; FIG. 8 is a terminal mounting portion according to another embodiment of the present invention. FIG. 9 is a schematic diagram showing a state in which the terminal mounting portion is HM by applying a peeling force to the lead connected to the terminal mounting portion. DESCRIPTION OF SYMBOLS 1... Wiring board, 2... Wiring layer, 3... Terminal mounting part, 4... Lead, 5... Mounting part, 6... Bonding material, 10... Header, 11...・・Sealed case, 12・・
・Mounting groove, 13... Peeling prevention coat film, 14... Ceramic plate, 15... Overcoat glass film, 16.
...Resistor mounting area, 17...Chip resistor, 18...
solder. Fig. 1 F13 Fig. 11 J”li, case 13-5-ri S armor upper coat crotch No. 4 Fig. 2-Kokuotsu a4 3-4J 閁I=rn Fig. Fig. 13-!t, J tooth-L main IF2 coat armpit 15-overcoat T-last dark
Claims (1)
層と、前記配線層の端子取付部に接合材を介して接続さ
れたリードを有する混成集積回路装置であって、前記端
子取付部の周縁の少なくとも一縁は剥離抑止コート膜で
被われていることを特徴とする混成集積回路装置。1. A hybrid integrated circuit device comprising a wiring board, a wiring layer provided on the surface of the wiring board, and a lead connected to a terminal mounting part of the wiring layer via a bonding material, the terminal mounting part A hybrid integrated circuit device, characterized in that at least one peripheral edge of the hybrid integrated circuit device is covered with a peel-off prevention coating film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1199393A JP2914679B2 (en) | 1989-08-02 | 1989-08-02 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1199393A JP2914679B2 (en) | 1989-08-02 | 1989-08-02 | Hybrid integrated circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0364052A true JPH0364052A (en) | 1991-03-19 |
| JP2914679B2 JP2914679B2 (en) | 1999-07-05 |
Family
ID=16407035
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1199393A Expired - Fee Related JP2914679B2 (en) | 1989-08-02 | 1989-08-02 | Hybrid integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2914679B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006344841A (en) * | 2005-06-10 | 2006-12-21 | Mitsubishi Electric Corp | Power semiconductor module |
| WO2017221601A1 (en) * | 2016-06-23 | 2017-12-28 | 株式会社東海理化電機製作所 | Module and method for manufacturing same |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5965551U (en) * | 1982-10-26 | 1984-05-01 | 日本無線株式会社 | Thick film hybrid integrated circuit |
-
1989
- 1989-08-02 JP JP1199393A patent/JP2914679B2/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5965551U (en) * | 1982-10-26 | 1984-05-01 | 日本無線株式会社 | Thick film hybrid integrated circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006344841A (en) * | 2005-06-10 | 2006-12-21 | Mitsubishi Electric Corp | Power semiconductor module |
| WO2017221601A1 (en) * | 2016-06-23 | 2017-12-28 | 株式会社東海理化電機製作所 | Module and method for manufacturing same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2914679B2 (en) | 1999-07-05 |
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