JPH0364206A - Pulse generating circuit - Google Patents

Abstract

PURPOSE:To eliminate the positional change of an output pulse when the width of this pulse is changed by always securing a constant difference of reference voltage between two comparators A and B. CONSTITUTION:When an input trigger is applied to the base of a transistor TR Q1, the electric charge is stored in a capacitor C via a TR Q8 of a current mirror circuit 1. In this case, a potential Vc is shown as Vc=It/c. At the same time, the reference potential of a comparator A2 is shown as Vref2=Vref+R'I' together with the reference potential of a comparator B shown as Vref3=Vref respectively. The potential is changed to a low level from a high level at a point (b) at the time t=RC based on Vc=Vref3 owing to Vref=RI. Then the generation of pulses is started. Thus the output pulse width can be changed when the variable resistance VR and then a current I of a current source VIF are changed. As a result, a constant difference of reference voltage is secured between both comparators A and B. Thus it is possible to change the output pulse width without changing the output pulse position.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a pulse generation circuit in which the pulse position is constant and only the pulse width is variable.

[Conventional technology]

A timing chart shown in FIG. 4 is known as a timing chart showing the operation of a conventionally applied pulse generation circuit. In the figure, pulse 1 is a pulse input to the pulse generation circuit as an input trigger, pulse 2 is a waveform pulse generated by an OR discharge curve started by the trigger of pulse 1, pulse 3. Pulse 4 shows a pulse waveform representing each case of an output pulse output when the discharge curve of time constant pulse 2 changes. Also, vthl
*Vtm2 is the threshold voltage provided for the time constant pulse to generate the output pulse.

Next, the operation will be explained. In the above-mentioned pulse generation circuit, when the input trigger of pulse 1 is input, an OR discharge curve as shown in pulse 2 is generated by its upward edge. This discharge curve is the threshold k
l The output pulse goes high when it reaches 8EVthl, then the discharge curve reaches the threshold 't8EVthz
When , the output pulse goes low and the expected pulse is generated.

[Problem to be solved by the invention]

Since the conventional pulse generating circuit was constructed as described above, there was a problem in that if the width of the pulse was changed, the position of the pulse would also change accordingly.

The present invention was made to solve the above-mentioned problems, and it is an object of the present invention to provide a pulse generating circuit in which the position of the pulse does not change even if the width of the pulse is changed.

[Steps to solve the problem]

The pulse generating circuit according to the present invention uses constant current charging to a capacitor that changes linearly as a time constant, and two comparators A and B that determine the start and end of a pulse.
Each reference voltage is changed so as to keep the difference constant.

[Effect]

The difference between the reference voltages of the two comparators A and B used in this invention is always constant, and the effect of increasing the width t-X of the output pulse is to eliminate any change in the position of the output pulse. I can do it.

〔Example〕

Hereinafter, a -x suitable example of the present invention will be explained with reference to the drawings. 1st
Many of the figures are circuit diagrams showing one embodiment of the pulse generating circuit according to the present invention. In the figure, VR is a variable resistor, VIF is a variable current source whose current is variable by the variable resistor VR, (1) is a current circuit whose reference current is the current I of the variable current source VIP, and (2) is a PNP). Ratio IR6As composed of two transistors Q4eQ5 (3) is PNP) transistor Q
Comparison 6 B % Re R made by 21Q3 1#
*rl q r2 is a resistor, 0 is a capacitor, and Qs is an NPN transistor to which an input trigger is applied to the base.

Next, the operation will be explained. When an input trigger as shown in the figure is applied to the base of transistor q1, charge is stored in capacitor C by transistor Q8 of the current mirror circuit, and the potential of vc at that time is t. Vc=−...(1) Expressed by the above equation (1). On the other hand, the reference potential of comparator A is
” (2) Expressed by the above formula (2), the specific softness g3 B O
The reference potential is Vt*t3 = Vtm1”
`` `` ''<3) It is expressed by the above equation (3). Here, Vrd is Vo, 1=Rx...
・(4) Since it is expressed by the above equation (4), Me “Vtd
B, j) t□=RO can be generated, where τ= tl - tl) zp, expressed as 0/I. Here, by changing the variable resistor VR, the current source VIP
If the current of is set to +Δk, then the reference voltage of comparator B is 1EV
raf2' is Vrat2 = Vtd "RI"" (5)
The reference potential Vrsf3' of the comparator B is Vr
It is expressed as sfl=Vref. Here, ■. f is Vrat ”R (I + ΔI) - (6)
It is expressed as Therefore, the pulse start time to' is t□
=RO-...@(7) The pulse end time is expressed by the above equation (8). At this time, the pulse width τ changes from low to high. Here, by taking the NAND of the potentials at point a and point b, a pulse of pulse length τ is generated, which is expressed by equation (9).

〔Effect of the invention〕

゛As described above, according to the present invention, the constant current charging to the capacitor changes linearly as a time constant, and the constant current charging of the capacitors changes linearly as a time constant, and the respective standards Since the electric motor is changed, the width of the output pulse can be changed without changing the output pulse position.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing an embodiment of the pulse generating circuit according to the present invention, Fig. 2 is a waveform diagram of the circuit of Fig. 1, Fig. 3 is a block diagram of a conventional pulse generating circuit, and Fig. 4 is a circuit diagram showing an embodiment of the pulse generating circuit according to the present invention. You can see the waveform diagram of the circuit diagram in Figure 3. In the figure, (1) is the current (cooling circuit), (2) is the comparator A, (3) is the comparator B, O is the capacitor, QIFi
NPN transistors, Qz to Q9 are PNP) transistors, R1*R1*rl e r2 are resistors, VIP is a variable current source, and VR is a variable resistor. In the figures, the same symbols indicate the same or equivalent parts. Figure 1

Claims (1)

[Claims] A variable resistor with one end grounded, a variable current source with the other end of the variable resistor as an adjustment terminal input, and a PNP transistor with two output terminals, each with the current of this variable current source as a reference current. a current mirror circuit having an output; a first resistor connected to a first output of the current mirror circuit, the other end being grounded; a first output of the current mirror circuit; a second resistor connected between them, a first current source through which current flows, a second current source through which the same current as the first current source flows through the second resistor; a first comparator A connected to the first current source and the reference potential side; a second comparator B connected to the second current source; and a second output of the current mirror circuit;
The input of the first comparator A, the input of the second comparator B, and the other terminal of the capacitor, one of which is grounded, are connected to the collector, and the emitter is grounded, and an input trigger is input from the pace. an NPN transistor, a third resistor connected to the negative output side of the first comparator A, the other side being grounded, and a fourth resistor connected to the positive output side of the second comparator B, the other side being grounded. A pulse generation circuit characterized by comprising a resistor.