JPH0365330U - - Google Patents
Info
- Publication number
- JPH0365330U JPH0365330U JP12654389U JP12654389U JPH0365330U JP H0365330 U JPH0365330 U JP H0365330U JP 12654389 U JP12654389 U JP 12654389U JP 12654389 U JP12654389 U JP 12654389U JP H0365330 U JPH0365330 U JP H0365330U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- microcomputer
- circuit
- control
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims description 4
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
第１図及び第２図はこの考案に係るＰＬＬ回路
の実施例を示し、第１図は要部のブロツク図、第
２図は動作を示したタイミングチヤートであり、
第２図Ａは電圧制御信号の波形図、第２図Ｂはコ
ントロール信号の波形図、第２図Ｃは電圧制御信
号とコントロール信号とが重畳した電圧制御信号
の波形図である。
主な符号の説明、１……マイクロコンピユータ
、２……Ｄ／Ａ変換回路、３……アナログスイツ
チ、４……電圧制御発振回路、５……Ｄ／Ａ変換
回路出力の電圧制御信号、６……コントロール信
号、７……コントロール信号を重畳した電圧制御
信号。
1 and 2 show an embodiment of the PLL circuit according to this invention, FIG. 1 is a block diagram of the main part, and FIG. 2 is a timing chart showing the operation.
FIG. 2A is a waveform diagram of the voltage control signal, FIG. 2B is a waveform diagram of the control signal, and FIG. 2C is a waveform diagram of the voltage control signal in which the voltage control signal and the control signal are superimposed. Explanation of main symbols, 1... Microcomputer, 2... D/A conversion circuit, 3... Analog switch, 4... Voltage controlled oscillation circuit, 5... Voltage control signal of D/A conversion circuit output, 6 . . . control signal, 7 . . . voltage control signal on which the control signal is superimposed.
Claims (1)
振回路を有したＰＬＬ回路において、 周波数データに応じて設定される電圧データを
備えたマイクロコンピユータと、このマイクロコ
ンピユータの出力データをアナログ信号に変換す
るＤ／Ａ変換回路と、マイクロコンピユータで制
御されるアナログスイツチとを備えて電圧制御発
振回路を制御するように構成したことを特徴とす
るＰＬＬ回路。[Claims for Utility Model Registration] In a PLL circuit having a voltage controlled oscillation circuit that performs voltage control and oscillation using a lock voltage, a microcomputer equipped with voltage data set according to frequency data, and an output of this microcomputer 1. A PLL circuit comprising a D/A conversion circuit for converting data into an analog signal and an analog switch controlled by a microcomputer to control a voltage controlled oscillation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12654389U JPH0365330U (en) | 1989-10-31 | 1989-10-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12654389U JPH0365330U (en) | 1989-10-31 | 1989-10-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0365330U true JPH0365330U (en) | 1991-06-25 |
Family
ID=31674349
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12654389U Pending JPH0365330U (en) | 1989-10-31 | 1989-10-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0365330U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008119828A (en) * | 2008-01-07 | 2008-05-29 | Max Co Ltd | Stapler having backup staple storing part |
-
1989
- 1989-10-31 JP JP12654389U patent/JPH0365330U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008119828A (en) * | 2008-01-07 | 2008-05-29 | Max Co Ltd | Stapler having backup staple storing part |
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