JPH02134723U - - Google Patents

Description

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an embodiment of the variable frequency waveform generator according to the present invention, Figs. 2 to 4 are diagrams for explaining its operation, and Fig. 5 is a block diagram of a conventional waveform generator. , FIG. 6 is a diagram for explaining the operation. 5... Register, 6... DA converter, 10... Phase data generator, 11... ROM, 12... Timing controller.

Claims (1)

[Claims for Utility Model Registration] A phase data generation section that generates addresses and timing data in response to a clock signal, and a storage section that outputs stored waveform data to which addresses are given by the phase data generation section. , a register that holds the output of this storage section, and a timing for inputting the timing data of the phase data generating section and the clock signal, and delaying the clock signal based on the timing data and outputting the delayed clock signal to the register as a latch signal. A variable frequency signal generation device comprising: a control section; and a DA conversion section that converts the output of the register into an analog signal.