JPH03654B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a microprogram control device used in a data processing device, and more particularly to a method for generating microinstructions for controlling arithmetic operations.

(Prior Art) In a microprogram controlled processor having an arithmetic function, the arithmetic operations are generally performed under the control of the microprogram. There are various methods for calculations, but among them, binary multiplication and division are rarely processed in a single operation, and a method in which they are processed by a microprogram with a certain number of steps is widely adopted. has been done. In order to shorten this process as much as possible, for example, the next microinstruction performs addition or subtraction based on the operation result of the previous microinstruction.
A system in which a part of the hardware functions so that two separate operations can be executed by a single microinstruction, and one of the operations is performed is known. In this method, an arithmetic control logic has been assembled by inputting bit fields related to arithmetic control of microinstructions and flags for holding arithmetic results.

(Problems to be Solved by the Invention) Therefore, it is necessary to decode the same microinstruction in order to perform control to perform different operations depending on the flags. For this reason, the arithmetic control logic becomes more complex, and the number of logic stages from the microinstruction register to the arithmetic unit via the arithmetic control unit increases, resulting in an increase in delay time. The problem was that the number of steps in the microprogram increased to determine the number of steps, and it was difficult to make advance decisions about branching.

An object of the present invention is to use a microinstruction to select either a microinstruction generated from a logic array that receives the output of an arithmetic unit or a microinstruction stored in a control memory, and to import the selected microinstruction into a microinstruction register. This eliminates the above-mentioned disadvantages by making it possible to retrieve different types of microinstructions from the same control memory address, giving flexibility to the design of microprograms, reducing the number of microprogram steps, and reducing the number of microprogram steps based on operation results. An object of the present invention is to provide a microprogram control device configured to make it possible to determine branching of a microprogram.

(Means for solving the problem) A microprogram control device according to the present invention includes:
It is equipped with a control memory, an arithmetic unit, a logic array, a multiplexer, and a microinstruction register, and is configured so that the multiplexer can be switched by the output of the microinstruction register.

Control memory is for storing microprograms.

The arithmetic unit is controlled by a microprogram and is used to execute arithmetic operations.

A logic array is used to input the outputs of arithmetic units and execute logical operations.

The multiplexer inputs and multiplexes the first part of the output of the control store and the output of the logic array.

The microinstruction register is for inputting and holding the output of the multiplexer and the outputs other than the first part of the output of the control store.

(Example) Next, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of a microprogram control device according to the present invention. 1st
In the figure, 1 is a control memory, 2 is a control address generation circuit, 3 is a microinstruction register, 4 is a multiplexer, 5 is a logic array, 6 is an arithmetic control section, 7 is an arithmetic unit, 8 and 9 are first and second 10 and 11 are first and second general-purpose registers, respectively, and 12 is a selector.

FIG. 2 is a timing chart showing the operation of the microprogram control device shown in FIG.

Next, the present invention will be explained in detail with reference to FIGS. 1 and 2. In FIG. 1, a control memory 1 stores microprograms, and microinstructions are used for controlling various processes. The arithmetic instruction has an arithmetic control field, and the microinstruction generated by the logic array 5 corresponds to the arithmetic control field, and the control memory 1 also stores a portion corresponding to the arithmetic control field. Here, the bit field of a microinstruction is explained according to Figure 3.A microinstruction consists of an instruction type field for determining the main operation of the microinstruction, and an operation field for controlling detailed operations under the main operation. A control field, a switching bit SEL for selecting the input of multiplexer 4, a control field CNT for controlling other processing, and a next address field for generating the next control address.
It consists of NEXT ADDRESS. In an instruction that does not perform an operation, the operation control field of the microinstruction has a meaning as a field for other control, such as a control field for transfer between registers.

A portion of the output of the control memory 1 having the same bit width as the output of the logic array 5 CSP and the output of the logic array 5 are input to the multiplexer 4, and the output of the multiplexer 4 and the output from the control memory 1 other than CSP are It is input to the instruction register 3 and fetched by the clock. The microinstructions taken into the microinstruction register 3 are sent to the arithmetic control unit 6
The arithmetic control unit 6 controls the arithmetic unit 7 and register files 8 and 9 for storing the arithmetic output.

As shown in FIG. 1, the microinstructions input to the arithmetic control unit 6 are obtained as the outputs of the logic array 5 or the microinstruction register 3 which takes in the microinstructions CSP. This indicates that the microinstruction CSP and the output of the logic array 5 correspond to the arithmetic control field ALU.

Under the above conditions, the operation during calculation will be explained in more detail.

In FIG. 2, it is accessed by control address A, and microinstruction a is read out from control memory 1 and output. Normally, the switching control bit SEL of the multiplexer 4 is "0", so the multiplexer 4 selects and outputs the contents of the control memory 1, and the contents of a are transferred to the microinstruction register 3 by the clock.
and executed. The control address generation circuit 2 generates the next address field NE− of the microinstruction.
Generates the next control address B from XT ADDRESS, reads microinstruction b from control memory 1, and outputs it. At this time, since a is stored in the microinstruction register 3, the SEL field is "0". Therefore, the multiplexer 4 selects and outputs the output b of the control memory 1 and takes it into the microinstruction register 3. Here, if microinstruction b is a microinstruction that performs binary multiplication or division, the multiplexer control bit
SEL is "1", and multiplexer 4 selects and outputs the output of logic array 5. Microinstruction b is an instruction to execute an operation between the first general-purpose register 10 and the second general-purpose register 11,
The arithmetic output is input to the logic array 5, and in accordance with the arithmetic output, a microinstruction c' for the arithmetic control field to be executed in the next microinstruction is generated and input to the multiplexer 4. Therefore,
The output of the multiplexer 4 becomes the input to the microinstruction register 3.

Here, a specific arithmetic operation when microinstruction b is a microinstruction that performs multiplication will be explained. Microinstruction b is the first general-purpose register 1
The addition result obtained by adding the contents of 0 and the contents of the second general-purpose register 11 is concatenated with the contents of the second register file 9, shifted to the right by one bit, and the result is transferred to the second general-purpose register 11. Assume that the instruction is to be stored in the general-purpose register 11 and the second register file 9. In this case, if the lowest input of the second register field 9 during the above calculation is "0", the logic array 5 concatenates the contents of the second general-purpose register 11 and the contents of the second register file 9. A microinstruction is generated to shift the result by one bit to the right and store the result in the second general-purpose register 11 and the second register file 9. If the lowest input of the second register file 9 is "1", the contents of the first general-purpose register 10 and the contents of the second general-purpose register 11 are added, and the addition result and the second
1 to the right by concatenating the contents of register file 9 with
A microinstruction is generated to shift the bit by bit and store the result in the second general-purpose register 11 and the second register file 9. An example of the operation of the multiplication program has been described above.

On the other hand, the next address field NEXT ADD−
The next control address C is generated from the RESS by the control address generation circuit 2, and the microinstruction c is read out from the control memory 1 and the arithmetic control field is read out.
The microinstruction register 3 other than ALU is inputted. Therefore, the contents of the microinstruction c' output from the logic array 5 are stored in the arithmetic control field ALU of the microinstruction register 3, and the contents of the microinstruction c read out from the control memory 1 are stored in the other fields for execution. Ru. Since the microinstruction c' is generated from the result of the operation output, it is clear that more than one microinstruction can be generated.

On the other hand, it is of course also possible to perform an operation using the operation control field ALU of the microinstruction c of the control memory 1 stored at address C. In FIG. 2, microinstruction d is microinstruction register 3.
When the microinstruction d is taken in, the SEL bit of the microinstruction d is “0”, the control address generation circuit 2 generates the control address C based on the next address field NEXT ADDRESS of the microinstruction d, and the control address C is generated by the control address C. Accessed control memory 1
Microinstruction c is then read out. At this time SEL
="0", the multiplexer 4 selects and outputs the output of the control memory 1, stores it in the microinstruction register 3, and executes it.

Although multiplication and division have been described in this embodiment, this does not mean that the types of microinstructions are limited to the above operations; if the next microinstruction is determined based on the operation result, Needless to say, it can be applied to any situation.

(Effects of the Invention) As explained above, the present invention provides, in addition to the microinstruction c stored in the control memory as a microinstruction at address C, by obtaining a microinstruction from the logic array that inputs the operation output. By making it possible to store one or more microinstructions in a microinstruction, and making it possible to determine a branch of a microinstruction conditional on the result of an operation at the same time as obtaining the result of an operation, it is possible to pre-empt a branch and to write a microprogram. In addition to reducing the number of steps and simplifying the logic of the arithmetic control section, this method has a wide range of effects, including not only reducing the number of logic stages but also providing flexibility in microprogram design.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of a microprogram control device according to the present invention. Second
1 is a timing chart showing the operation of the microprogram control device shown in FIG. FIG. 3 is a diagram showing the field structure of a microinstruction used in the present invention. DESCRIPTION OF SYMBOLS 1... Control memory, 2... Control address generation circuit, 3... Micro instruction register, 4... Multiplexer, 5... Logic array, 6... Arithmetic control unit, 7... Arithmetic unit, 8, 9... Register File, 10, 11...General purpose register, 12...Selector, OP...Instruction type field, ALU...
Arithmetic control field, SEL...multiplexer control bit, CNT...processor control field, NEXT ADDRESS...next address field.

Claims (1)

[Claims] 1. A control memory for storing a microprogram, an arithmetic unit controlled by the microprogram and for executing an operation, and a logic array for inputting the output of the arithmetic unit and executing a logical operation. , a multiplexer for inputting and multiplexing a first part of the output of the control memory and the output of the logic array; and a multiplexer for inputting and multiplexing the output of the multiplexer and the output of the control memory other than the first part. 1. A microprogram control device comprising: a microinstruction register for inputting and holding; and configured such that the multiplexer can be switched by the output of the microinstruction register.