JPH036655A - Multiprocessor system - Google Patents

Abstract

PURPOSE:To obtain a multiprocessor system which can easily specify the areas of faults by making each processor output successively the prescribed display requests at a prescribed time interval. CONSTITUTION:A 1st processor 1 outputs a prescribed display request A of a 1st form to a signal line 5 at a prescribed time interval in a working state of the processor 1 and gives a report to a 2nd processor 2. The processor 2 reports the request A to a display controller 3 via a signal line 6 if the processor receives the request A from the processor 1 in its working state. If the request A is not received within a prescribed time, a display request B of a 2nd form is outputted to the line 6 and reported to the controller 3. Thus it is possible to specify a processor having a fault just by observing the display of a display means 4.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a multiprocessor system, and particularly to a multiprocessor system having a function of diagnosing each processor individually.

[Prior Art] As part of an electronic computer system, two or more processors or microcontrollers work together as a whole by sharing resources such as Ilo and storage devices, or by exchanging information in some way. Multiprocessor systems that function as one system are known.

Various types of multiprocessor systems are known, such as a resource sharing type multiprocessor system, a distributed processing type multiprocessor system, or a system that combines a resource sharing type and a distributed processing type.

FIG. 3 is a diagram showing a schematic configuration of a resource sharing type multiprocessor system, in which a plurality of microprocessors 20I
,...,20. is some shared resource 22I,
..., 22o are configured for joint use. As shown in the figure, shared resources include:
Hard disk drive, Ethernet
et) interface, etc. And each processor 20I,..., 20° is,
Shared resources 22I, . . . , 22. access allows them to work independently and do not necessarily need to exchange information with each other.

In addition, a distributed processing multiprocessor system can be summarized as follows.
The configuration is as shown in FIG. 4, including a main processor system 25 and a plurality of processor subsystems 261.・・・・・・
..., 2B, l is multiprocessor interface 2
In the resource sharing type multiprocessor system described above, each processor can process work independently, whereas in the distributed processing type multiprocessor system, each processor exchanges information with each other. While exchanging parts, the work as a single system is divided and processed. Note that the multiprocessor interface 27 can be configured with a system bus, a high-speed communication interface, or the like. Additionally, the processor subsystem 261. ..., 26o may be a complete multiprocessor system including a program memory, data memory, 10, etc., or it may be only a processor section.

[Problem to be Solved by the Invention] When a failure occurs in a computer system that employs a multiprocessor system as described above, it is necessary to identify which processor is experiencing the failure. It is difficult to pinpoint the location of the problem, and conventionally the only option was to replace the circuit boards one by one while searching for the location of the fault, which was extremely time-consuming.

The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a multiprocessor system that can easily identify the location where a failure occurs.

[Means for Solving the Problems] In order to achieve the above object, the multiprocessor system of the present invention provides a multiprocessor system in which a plurality of processors perform processing independently or jointly, in which each processor performs a predetermined process. It is characterized in that display requests are transmitted sequentially at time intervals.

[Operation and Effects of the Invention] According to the present invention, each processor making up the multiprocessor system sequentially outputs a predetermined display request at a predetermined time interval. If a fault has occurred in a certain processor, a predetermined display will be displayed, and if a fault has occurred in a certain processor, a corresponding display will be shown. It is possible to identify whether

[Example code] Examples will be described below with reference to the drawings.

FIG. 1 is a diagram showing the configuration of one embodiment of the present invention, in which 1 is a first processor, 2 is a second processor, and 3 is a diagram showing the configuration of an embodiment of the present invention.
4 is a display controller, 4 is a display means, and 5, 6, and 7 are signal lines, respectively.

In FIG. 1, a first processor 1 and a second processor 2 are processors constituting a multiprocessor system, and the multiprocessor system may be of a resource sharing type, a distributed processing type, or of other types. There may be.

The first processor 1 performs a predetermined task, and during its operation, a predetermined display request (hereinafter, this display request) in a first form is sent to the signal line 5 at a predetermined time interval, for example, 1 second. (referred to as a display requester), and the second processor 2
Notify. The second processor 2 similarly performs a predetermined task, but during its operation, the display request A from the first processor 1 is received within a predetermined period of time, for example, 10 seconds.
is received, the display request A is notified to the display controller 3 via the signal line 6, and if the display request A is not received from the first processor 1 within the predetermined time, the display request A is notified to the display controller 3 via the signal line 6. 6, a predetermined display request of the second form (hereinafter, this display request will be referred to as display request B) is output, and the display controller 3 is notified. Therefore, if both the first processor 1 and the second processor 2 are operating normally, the display controller 3 receives the display request A, but the first
If some kind of failure occurs in the processor 1 and it stops functioning, the display request A will not be output, so the display controller 3 will receive the display request B.

The display controller 3 receives the display request A from the second processor 2 within a predetermined period of time, for example, 30 seconds.
Or, if display request B is received, the display request A
Alternatively, display request B is output to the signal line 7, but if neither display request A nor display request B is received from the second processor 2 within the predetermined time, a display request in a predetermined form (hereinafter, this display request is output) A request (referred to as display request C) is outputted to the signal line 7 and notified to the display means 4. Therefore, the display means 4 receives the display request A when the first processor 1, the second processor 2, and the display controller 3 are all normal;
If only the first processor 1 is at fault, the display request B is received; if at least the second processor 2 is at fault, the display request C is received; at least the display controller 3 receives the display request C; If a failure has occurred, no display request will be received.

As the display means 4, any suitable display device can be used, as long as it can distinguish between display requests A, B, or C. Therefore, in consideration of cost, in this embodiment, the display device shown in FIG. 2 is used. Assume that a 7-segment Japanese character-shaped display device as shown in (a) is used.

The display means 4 also receives display requests A and B.

It has a decoder that generates on/off signals for each segment from C. For example, when display request A is received, it performs an rAJ-shaped display as shown in FIG. When receiving request B, a rBJ shape is displayed as shown in FIG. 2(C), and when display request C is received, a "C" shape is displayed as shown in FIG. 2(d). It is made to be done. Further, if the display means 4 does not receive any display request, all segments are turned off as shown in FIG. 2(a).

With the above configuration, the display means 4 is shown in FIG.
), if there is no display, you can know that a failure has occurred in the display controller 3.
When the display shown in FIG. 2(b) is displayed, it can be seen that the first processor 1, second processor 2, and display controller 3 are all operating normally, and as shown in FIG. 2(C). If the display shown in FIG. I can see that Therefore, the supervisor can identify the location where the failure has occurred simply by observing the display state of the display means 4. In addition, in terms of software, the configuration shown in FIG. Since it is only necessary to install an appropriate communication line between the processors, the cost is low.

Although one embodiment of the present invention has been described above, the present invention is not limited to the above embodiment, and various modifications are possible. For example, although the display means is a 7-segment display device, it is possible to use a well-known display device such as a CRT or a liquid crystal display device. In particular, when a display device that can display characters is used, for example, Everything is normal.","
The first processor has failed. ” etc., it is possible to display an easy-to-understand display. Furthermore, even when a 7-segment display device is used, the display mode is not limited to that shown in FIG. 2, and it goes without saying that it can be arbitrarily determined.

Further, although only two processors are used in the multiprocessor system shown in FIG. 1, it will be obvious to those skilled in the art that three or more processors can be connected.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a diagram showing an example of a display mode on a display means, FIG. 3 is a diagram showing a resource sharing type multiprocessor system, and FIG. 4 is a diagram showing a distributed FIG. 1 is a diagram showing a processing type multiprocessor system. DESCRIPTION OF SYMBOLS 1... First processor, 2... Second processor, 3... Display controller, 7... Signal line. 4...display means, 5. 6. Out

Claims (2)

[Claims] (1) A multiprocessor system in which a plurality of processors perform processing independently or jointly, characterized in that each processor sequentially transmits display requests at predetermined time intervals. (2) Each processor is connected by a communication line, and if it receives a display request from the previous processor within a predetermined time, it transmits that display request, and if it does not, it transmits its own display request to the next processor. Claim 1 characterized in that
The multiprocessor system described.