JPH0366622B2 - - Google Patents
Info
- Publication number
- JPH0366622B2 JPH0366622B2 JP57081606A JP8160682A JPH0366622B2 JP H0366622 B2 JPH0366622 B2 JP H0366622B2 JP 57081606 A JP57081606 A JP 57081606A JP 8160682 A JP8160682 A JP 8160682A JP H0366622 B2 JPH0366622 B2 JP H0366622B2
- Authority
- JP
- Japan
- Prior art keywords
- current
- circuit
- load current
- load
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000001514 detection method Methods 0.000 claims description 27
- 238000005259 measurement Methods 0.000 claims description 9
- 238000012360 testing method Methods 0.000 description 20
- 238000011990 functional testing Methods 0.000 description 8
- 238000012937 correction Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000000691 measurement method Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R21/00—Arrangements for measuring electric power or power factor
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
- Tests Of Electronic Circuits (AREA)
Description
【発明の詳細な説明】
（技術分野）
本発明は簡単な回路構成で、電気回路の機能試
験時の被測定物内部で消費する電源電流の測定を
する回路に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a circuit with a simple circuit configuration that measures power supply current consumed inside a device under test during a functional test of an electric circuit.
（背景技術）
従来の機能試験時の消費電流の測定回路図を第
１図に示す。第１図において、１は機能試験用入
力信号源、２はコンパレータ回路による機能検出
回路、３は機能試験時の負荷抵抗R1〜RN、４は
演算増幅器による消費電流測定回路、５は被測定
物の如く構成されており、電気回路特にICなど
の被測定物５は機能試験用入力信号源１より出力
される〓Ｈ”又は〓Ｌ”レベルの論理信号入力に
対して、内部論理動作を行ない、その結果を出力
端子OUT−１〜OUT−Ｎに出力する。そしてこ
れら出力端子には、各々R1〜RNの負荷抵抗３お
よび検出回路２が接続され、出力レベルが〓Ｈ”
の時はR1〜RNを通して、IR1〜IRNなる負荷電流が
GNDへ流れる。出力レベルが〓Ｌ”の時には、
各々IR1L〜IRNLの出力OFFリーフ電流のみでほぼ
零となる。又この時検出回路２は、各出力端子の
出力レベルが期待値と一致するか否かを常時看視
している。(Background Art) A conventional circuit diagram for measuring current consumption during a functional test is shown in FIG. In Fig. 1, 1 is an input signal source for functional testing, 2 is a functional detection circuit using a comparator circuit, 3 is load resistance R 1 to R N during functional testing, 4 is a current consumption measuring circuit using an operational amplifier, and 5 is a receiving circuit. The device under test 5 such as an electric circuit, especially an IC, performs an internal logic operation in response to the logic signal input at the ``H'' or ``L'' level output from the input signal source 1 for functional testing. The results are output to output terminals OUT-1 to OUT-N. Load resistors 3 of R 1 to R N and a detection circuit 2 are connected to these output terminals, respectively, and the output level becomes 〓H''.
When , the load current I R1 ~ I RN flows through R 1 ~ R N.
Flows to GND. When the output level is 〓L”,
The output OFF leaf currents of I R1L to I RNL each become almost zero. Also, at this time, the detection circuit 2 constantly monitors whether the output level of each output terminal matches the expected value.
消費電流測定回路４は、被測定物５のVDD端子
に接続され被測定物内部で消費される電流IDDお
よび出力電流として外部負荷へ流出するIR1〜IRN
の総合計がI0として計測される。 The current consumption measuring circuit 4 is connected to the V DD terminal of the device under test 5 and measures the current I DD consumed inside the device under test and the current I R1 to I RN flowing out to an external load as an output current.
The total sum of is measured as I 0 .
I0＝DUT(被測定物)の消費電流＋負荷電流
＝IDD＋IR1〜N＝IDD＋IR
この総合電流の中の負荷電流IRの値は、外部負
荷抵抗の大きさおよび〓Ｈ”出力端子の数等の変
化により、その都度変動する。従つて、従来の消
費電流測定方法では常時外部負荷回路への電流分
を含んだ形での測定しかできないことになる。従
つて、精度良く測定を行なうためには負荷抵抗の
値および〓Ｈ”出力端子の数等の計算を常時行な
い、補正作業を要するといつた欠点があつた。 I 0 = Current consumption of DUT (device under test) + Load current = I DD + I R1~N = I DD + I R The value of the load current I R in this total current is determined by the size of the external load resistance and 〓H "It changes each time due to changes in the number of output terminals, etc. Therefore, with the conventional measurement method of current consumption, it is only possible to measure current that always includes the current flowing to the external load circuit. Therefore, accuracy In order to perform accurate measurements, the value of the load resistance and the number of ``H'' output terminals must be constantly calculated and corrected, which is a drawback.
（発明の課題）
本発明は、従来の消費電流測定の欠点である外
部負荷による影響を複雑な計算による補正作業を
要するといつた欠点を除去するため、自動補正回
路を付加した測定回路を提供するもので、その特
徴は、電源供給端子VDDより電流の供給をうけ、
入力信号に従つて行つた処理の結果を負荷に出力
する被測定回路５の、電源供給端子よりの流入電
流と負荷への流出電流IRの挙である消費電流を測
定する回路において、負荷電流IRと所定の値RLと
の積に対応する電圧V0を発生する負荷電流検出
回路６と、該電圧V0と供給電源電圧VDDとの和又
は差に対する電圧を抵抗RLを介して前記電源供
給端子に提供することにより供給電流から負荷電
流IRを補償する負荷電流補償回路と、供給電源か
ら電源供給端子に供給する電流のうち前記負荷電
流補償回路により補償された値を差し引いた電流
を計測する消費電流測定回路とを有するごとき消
費電流測定回路にある。(Problems to be solved by the invention) The present invention provides a measurement circuit with an automatic correction circuit added in order to eliminate the drawback of conventional current consumption measurement, which is that it requires correction work using complicated calculations to compensate for the influence of external loads. Its characteristics are that it receives current from the power supply terminal V DD ,
In a circuit that measures the current consumption, which is the sum of the inflow current from the power supply terminal and the outflow current I R to the load, of the circuit under test 5 that outputs the result of processing performed according to the input signal to the load, A load current detection circuit 6 generates a voltage V 0 corresponding to the product of I R and a predetermined value R L , and a voltage corresponding to the sum or difference between the voltage V 0 and the supply voltage V DD is detected via a resistor R L. a load current compensation circuit that compensates the load current I R from the supply current by supplying it to the power supply terminal; and a load current compensation circuit that subtracts the value compensated by the load current compensation circuit from the current supplied from the supply power to the power supply terminal. and a current consumption measuring circuit for measuring the current.
（発明の構成および作用）
第２図は本発明の一実施例であつて、１は機能
試験用入力信号源、２はコンパレータ回路による
機能試験検出回路、３は機能試験時の負荷抵抗
R1〜RN、４は演算増幅器による消費電流測定回
路、５は被測定物、６は演算増幅器による負荷電
流検出回路、７は演算増幅器による負荷電流補償
回路である。(Structure and operation of the invention) FIG. 2 shows an embodiment of the present invention, in which 1 is an input signal source for a function test, 2 is a function test detection circuit using a comparator circuit, and 3 is a load resistance during a function test.
R 1 to R N , 4 is a consumption current measuring circuit using an operational amplifier, 5 is an object to be measured, 6 is a load current detecting circuit using an operational amplifier, and 7 is a load current compensation circuit using an operational amplifier.
次にこれら各回路の相互接続および動作につい
て説明する。被測定物５の入力端子は機能試験入
力信号源１に接続され、出力端子は負荷抵抗３お
よび検出回路２へ接続される。VDD端子は消費電
流測定回路４および負荷電流補償回路７が接続さ
れる。負荷抵抗３の片側は全て短絡し、0Vを基
準レベルとする負荷電流検出回路６の入力端子に
接続される。負荷電流検出回路６の出力端子は負
荷電流補償回路７の入力に接続する。被測定物５
の出力は機能試験入力信号源１より出力される〓
Ｈ”又は〓Ｌ”レベルの論理信号に基づき、内部
論理動作を行ないその結果を出力端子に〓Ｈ”又
は〓Ｌ”レベルとして出力される。検出回路２
は、この出力の〓Ｈ”、〓Ｌ”を機能試験中は常
時看視して、期待値と比較し、判断処理を行な
う。この時負荷抵抗３には、被測定物５の出力が
〓Ｈ”レベルになるとIR1〜IRNの電流が流れる。
負荷電流検出回路６は、電流−電圧変換回路又は
ケルビン方式による電流検出回路を使用すること
により容易に実現できる。負荷電流補償回路７
は、演算増幅器を使用した反転増幅器および差動
増幅器を組合せた回路により実現できる。他は全
て従来の測定回路で第１図で説明したものと同じ
である。このIR1〜IRNの電流は0Vを基準レベルと
した負荷電流検出回路の電流検出抵抗RLを通し
て流れるため検出抵抗の両端に
V0＝−（IR1＋IR2＋…＋IRN）×RL〔Ｖ〕
の電圧降下を生じる。負荷電流補償回路７の入力
には、負荷電流検出回路６の出力電圧V0と、被
測定物５のVDD端子に供給する電圧の基準電圧の
２つが印加され、この２つの電圧を加算あるいは
減算させることにより、常にVDD供給電圧より負
荷電流検出回路６で発生する電圧分だけ高い電圧
VSが発生する。この電圧VSを負荷電流検出回路
６で使用する検出抵抗RLと同じ値の抵抗７ａを
介して被測定物５のVDD端子に接続することによ
り、被測定物５の出力端子より流出する負荷電流
IR1〜IRN）は、負荷電流補償回路７より全く同じ
値の電流が供給され、見掛上キヤンセルされるこ
とになり、消費電流測定回路４には負荷電流は流
れないため、被測定物５の内部で消費する電流の
みを供給することになり、精度良く消費電流測定
が行なえる。 Next, the interconnection and operation of each of these circuits will be explained. The input terminal of the device under test 5 is connected to the functional test input signal source 1, and the output terminal is connected to the load resistor 3 and the detection circuit 2. The consumption current measuring circuit 4 and the load current compensation circuit 7 are connected to the V DD terminal. One side of the load resistor 3 is all short-circuited and connected to an input terminal of a load current detection circuit 6 whose reference level is 0V. The output terminal of the load current detection circuit 6 is connected to the input of the load current compensation circuit 7. Measured object 5
The output is output from the functional test input signal source 1〓
Based on the logic signal at the H" or "L" level, an internal logic operation is performed and the result is outputted to the output terminal as the "H" or "L" level. Detection circuit 2
The outputs 〓H'' and 〓L'' are constantly monitored during the functional test, compared with expected values, and judgment processing is performed. At this time, a current of I R1 to I RN flows through the load resistor 3 when the output of the object to be measured 5 becomes 〓H'' level.
The load current detection circuit 6 can be easily realized by using a current-voltage conversion circuit or a Kelvin type current detection circuit. Load current compensation circuit 7
can be realized by a circuit that combines an inverting amplifier and a differential amplifier using an operational amplifier. Everything else is a conventional measuring circuit and is the same as that explained in FIG. This current from I R1 to I RN flows through the current detection resistor R L of the load current detection circuit with 0V as the reference level, so V 0 = - (I R1 + I R2 +... + I RN ) x R L across the detection resistor. A voltage drop of [V] occurs. Two voltages, the output voltage V 0 of the load current detection circuit 6 and the reference voltage of the voltage supplied to the V DD terminal of the device under test 5 are applied to the input of the load current compensation circuit 7, and these two voltages are added or By subtracting, the voltage is always higher than the V DD supply voltage by the voltage generated by the load current detection circuit 6.
VS occurs. By connecting this voltage V S to the V DD terminal of the device under test 5 via a resistor 7a having the same value as the detection resistor R L used in the load current detection circuit 6, the voltage V S flows out from the output terminal of the device under test 5. load current
I R1 to I RN ) are supplied with exactly the same current value from the load current compensation circuit 7 and are apparently canceled, and no load current flows through the consumption current measurement circuit 4, so the Since only the current consumed inside the device 5 is supplied, current consumption can be measured with high accuracy.
以上説明したように第１の実施例では、被測定
物５の出力端子より流出する負荷電流の補正計算
が負荷電流検出回路および補償回路の働きにより
自動的に供給されることから、下記に示す様な利
点がある。 As explained above, in the first embodiment, the correction calculation for the load current flowing out from the output terminal of the device under test 5 is automatically provided by the functions of the load current detection circuit and the compensation circuit. There are various advantages.
１ 複雑な補正計算が不要。1. No complicated correction calculations required.
２ DUTの消費電流と負荷流出電流が無関係に
なるため精度良く測定ができる。2. Accurate measurement is possible because the DUT current consumption and load outflow current are unrelated.
３ 外部負荷抵抗は被測定物の出力端子の駆動能
力で制限された値まで下げられるため、周波数
応答性が良くなる。3. Frequency response is improved because the external load resistance can be lowered to a value limited by the drive capacity of the output terminal of the device under test.
４ 被測定物の出力端子数は、測定の制限条件に
ならない。4. The number of output terminals of the device under test is not a limiting condition for measurement.
第１の実施例では被測定物としてＰ−CH、
FETによるオープンドレイン出力形式で説明し
てあるが、外部負荷抵抗を通して、出力端子より
流出電流が有る場合は負荷電流検出および補償回
路の働きにより電流補正効果が生ずる。 In the first embodiment, the object to be measured is P-CH,
Although the explanation is based on the open-drain output format using FET, if there is a current flowing out from the output terminal through an external load resistor, a current correction effect will occur due to the function of the load current detection and compensation circuit.
(1) PNPトランジスタのオープンコレクタ出力
の場合を第３図に示す。(1) Figure 3 shows the case of open collector output of a PNP transistor.
(2) Ｎ−CH、FETによるソースホロウ出力の場
合を第４図に示す。(2) Figure 4 shows the case of source hollow output using N-CH, FET.
(3) NPNトランジスタによるエミツタホロウ出
力の場合を第５図に示す。(3) Figure 5 shows the case of emitter hollow output using an NPN transistor.
又前述の実施例では消費電流測定回路および負
荷電流検出回路として、電流−電圧変換回路を使
用しているが、ケルビン方式による電流センス方
式でも同様の効果が生ずる。この例を第６図に示
す。第３図〜第６図の実施例は被測定物の出力形
態の相違のみで他は全て同じものである。 Further, in the above-described embodiment, a current-to-voltage conversion circuit is used as the consumption current measuring circuit and the load current detecting circuit, but the same effect can be obtained by using a current sensing method based on the Kelvin method. An example of this is shown in FIG. The embodiments shown in FIGS. 3 to 6 are the same except for the output form of the object to be measured.
（発明の効果）
本発明は負荷電流補償回路を有しているので、
外部負荷に流出する電流の補償が自動的に行なえ
る利点があり、被測定物の出力端子の数および負
荷抵抗の大小等の制限が大幅に緩和するので機能
試験時の消費電流測定に利用することができる。(Effects of the Invention) Since the present invention has a load current compensation circuit,
It has the advantage of automatically compensating for the current flowing into the external load, and it greatly eases restrictions on the number of output terminals of the device under test and the size of the load resistance, so it is useful for measuring current consumption during functional tests. be able to.
第１図は従来の消費電流測定方法による回路
図、第２図は本発明の測定方法による第１の実施
例の回路図、第３図、第４図、第５図および第６
図は本発明による他の実施例の回路図である。
１……機能試験用入力信号源、２……コンパレ
ータ回路による機能検出回路、３……機能試験時
の負荷抵抗R1〜RN、４……演算増幅器による消
費電流測定回路、５……被測定物、６……演算増
幅器による負荷電流検出回路、７……演算増幅器
による負荷電流補償回路。
FIG. 1 is a circuit diagram of a conventional current consumption measurement method, FIG. 2 is a circuit diagram of a first embodiment of the measurement method of the present invention, and FIGS. 3, 4, 5, and 6
The figure is a circuit diagram of another embodiment according to the present invention. 1... Input signal source for functional test, 2... Function detection circuit using comparator circuit, 3... Load resistance R 1 to R N during functional test, 4... Current consumption measurement circuit using operational amplifier, 5... Object to be measured, 6... Load current detection circuit using an operational amplifier, 7... Load current compensation circuit using an operational amplifier.
Claims (1)
力信号に従つて行つた処理の結果を負荷に出力す
る被測定回路５の、電源供給端子よりの流入電流
と負荷への流出電流IRの差である消費電流を測定
する回路において、負荷電流IRと所定の値RLとの
積に対応する電圧V0を発生する負荷電流検出回
路６と、該電圧V0と供給電源電圧VDDとの和又は
差に対応する電圧を抵抗RLを介して前記電源供
給端子に提供することにより供給電流から負荷電
流IRを補償する負荷電流補償回路と、供給電源か
ら電源供給端子に供給する電流のうち前記負荷電
流補償回路により補償された値を差し引いた電流
を計測する消費電流測定回路とを有することを特
徴とする消費電流測定回路。1 The inflow current from the power supply terminal and the outflow current to the load I The circuit for measuring the difference in current consumption includes a load current detection circuit 6 that generates a voltage V 0 corresponding to the product of the load current I R and a predetermined value R L , and a load current detection circuit 6 that generates a voltage V 0 corresponding to the product of the load current I R and a predetermined value R L, and a load current detection circuit 6 that generates a voltage V 0 corresponding to the product of the load current I R and a predetermined value R L, and a load current detection circuit 6 that generates a voltage V 0 corresponding to the product of the load current I R and a predetermined value R L, and a load current detection circuit 6 that generates a voltage V 0 corresponding to the product of the load current I R and a predetermined value R a load current compensation circuit that compensates for the load current I R from the supply current by providing a voltage corresponding to the sum or difference between the voltage and the power supply terminal via a resistor R L to the power supply terminal; A consumption current measurement circuit comprising: a consumption current measurement circuit that measures a current obtained by subtracting a value compensated by the load current compensation circuit from among the current.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57081606A JPS58200170A (en) | 1982-05-17 | 1982-05-17 | Current consumption measuring circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57081606A JPS58200170A (en) | 1982-05-17 | 1982-05-17 | Current consumption measuring circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58200170A JPS58200170A (en) | 1983-11-21 |
| JPH0366622B2 true JPH0366622B2 (en) | 1991-10-18 |
Family
ID=13750971
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57081606A Granted JPS58200170A (en) | 1982-05-17 | 1982-05-17 | Current consumption measuring circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58200170A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02143172A (en) * | 1988-11-25 | 1990-06-01 | Nec Corp | Logic analyzer |
| US7230553B2 (en) | 2003-12-31 | 2007-06-12 | Teradyne, Inc. | Parallel source/capture architecture |
-
1982
- 1982-05-17 JP JP57081606A patent/JPS58200170A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58200170A (en) | 1983-11-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6310481B2 (en) | Electronic battery tester | |
| US4216424A (en) | Method and apparatus for testing electrolytic capacitors | |
| US20080018324A1 (en) | Voltage-impressed current measuring apparatus and current buffers with switches used therefor | |
| US5999008A (en) | Integrated circuit tester with compensation for leakage current | |
| JPH11174113A (en) | Circuit for measuring current of ic tester based on impressed voltage | |
| JPH0366622B2 (en) | ||
| US6968249B2 (en) | Current measuring circuit for measuring drive current to load | |
| JP2002084151A (en) | Physical quantity detector | |
| JP2001004703A (en) | Voltage/current generation measuring device and the same for semiconductor testing device | |
| US5030919A (en) | Zero impedance switch | |
| JP2862370B2 (en) | Current detection circuit | |
| JP3143036B2 (en) | Resistivity measurement circuit | |
| JPS649594B2 (en) | ||
| JP4909192B2 (en) | Capacitor capacity measuring device | |
| JPS5823590B2 (en) | Sokutei Souchi | |
| KR0170349B1 (en) | Fast current measurement circuit using function vector | |
| JPS6236143Y2 (en) | ||
| JP2000206175A (en) | Apparatus for measuring lsi current | |
| JPH08181584A (en) | Variable delay circuit and delay time check method | |
| JPH05870Y2 (en) | ||
| JPS5937711Y2 (en) | temperature measurement circuit | |
| JPS63113374A (en) | Integrated circuit measuring apparatus | |
| JP2001004673A (en) | Current detecting circuit | |
| JPH04253351A (en) | Method for measuring contact resistance | |
| JPH04244974A (en) | Measurement of semiconductor integrated circuit |