JPH036695B2 - - Google Patents
Info
- Publication number
- JPH036695B2 JPH036695B2 JP2710684A JP2710684A JPH036695B2 JP H036695 B2 JPH036695 B2 JP H036695B2 JP 2710684 A JP2710684 A JP 2710684A JP 2710684 A JP2710684 A JP 2710684A JP H036695 B2 JPH036695 B2 JP H036695B2
- Authority
- JP
- Japan
- Prior art keywords
- mosfet
- series
- gate
- voltage
- source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 15
- 239000004065 semiconductor Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000013016 damping Methods 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/10—Modifications for increasing the maximum permissible switched voltage
- H03K17/102—Modifications for increasing the maximum permissible switched voltage in field-effect transistor switches
Landscapes
- Power Conversion In General (AREA)
- Thyristor Switches And Gates (AREA)
- Electronic Switches (AREA)
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は、半導体を用いたスイツチ回路に係
り、特にMOSFETを複数個直列にして構成した
高電圧回路への適用に好適なスイツチ回路に関す
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a switch circuit using a semiconductor, and particularly to a switch circuit suitable for application to a high voltage circuit configured by connecting a plurality of MOSFETs in series.
〔発明の背景〕
半導体素子の高耐圧化の進展に伴い、高電圧回
路のスイツチも従来からの真空管に代つて半導体
素子の直列接続回路に置き換えられてきている。
代表的な例は、サイリスタを数百個直列接続して
構成された電力変換装置であり、電圧耐量は
250kV、電流は1.5kAの高電圧スイツチが実現さ
れている。しかし、サイリスタはしや断機能を有
さないため、しや断機能を要す高電圧スイツチ回
路には依然として真空管が用いられている。[Background of the Invention] With the development of higher voltage resistance of semiconductor elements, the conventional vacuum tubes are being replaced with switches in high voltage circuits by series-connected circuits of semiconductor elements.
A typical example is a power conversion device that consists of several hundred thyristors connected in series, and the voltage withstand capacity is
A high voltage switch of 250kV and 1.5kA current has been realized. However, since thyristors do not have a damping function, vacuum tubes are still used in high voltage switch circuits that require a damping function.
しや断機能を有する半導体素子の一つには、
MOSFETがある。MOSFETは、電圧制御形素
子のため駆動電力が小さい、電流集中がなく破壊
に強い、キヤリアの蓄積効果がなくスイツチング
特性が優れている等の特長を持つている。しか
し、MOSFETは現在のところ1kV位までの耐圧
のデバイスしか製品化されておらず、高耐圧化の
ためには複数のMOSFETを直列接続する必要が
ある。 One of the semiconductor elements that has a cutting function is
There is a MOSFET. Because MOSFETs are voltage-controlled elements, their driving power is low, there is no current concentration and they are resistant to destruction, and they have no carrier accumulation effect and have excellent switching characteristics. However, MOSFETs have only been commercialized so far that can withstand voltages up to about 1kV, and in order to achieve high voltage resistance, it is necessary to connect multiple MOSFETs in series.
第1図は、MOSFETをn個直列接続したいわ
ゆるトーテムポール形のスイツチ回路である。
MOSFET11にゲート信号が印加されていない時
は、11はしや断状態となり電流は0である。こ
の時、直列接続されたMOSFET12〜1oも遮断
状態であり、MOSFET12〜1oのゲートには抵
抗21〜2oで分圧した電圧が加わり、MOSFET
11〜1oのドレイン、ソース間にはほぼ抵抗21
〜2o定まる電圧が印加する。次にMOSFET11
のゲートに信号を印加すると、MOSFET11は導
通を開始し、同時にMOSFET11〜1oも
MOSFET11に追従して導通を開始し、スイツチ
回路はオン状態となる。 FIG. 1 shows a so-called totem pole switch circuit in which n MOSFETs are connected in series.
When no gate signal is applied to MOSFET 1 1 , MOSFET 1 1 is almost cut off and the current is 0. At this time, the MOSFETs 1 2 to 1 o connected in series are also in a cut-off state, and the voltage divided by the resistors 2 1 to 2 o is applied to the gates of the MOSFETs 1 2 to 1 o .
There is almost a resistance between the drain and source of 1 1 to 1 2 1
~ 2o A fixed voltage is applied. Next MOSFET1 1
When a signal is applied to the gate of MOSFET 1 1 starts conducting, and at the same time MOSFET 1 1 to 1 o also start conducting.
It starts conducting following MOSFET11 , and the switch circuit turns on.
このように、第1図のスイツチ回路では、
MOSFET11のゲート信号の印加、停止を行うこ
とにより、オン、オフの制御を行うことができる
が、MOSFET12〜1oをオンするためには、オ
ン状態を持続するに必要な充分な電圧を
MOSFET12〜1oのゲート、ソース間に印加す
る必要がある。それゆえ、第1図に示した回路方
式では、オン状態を持続するために12〜1oのド
レイン電位は駆動に必要な電圧だけ余分に増大
し、スイツチ回路損失の増大や負荷回路に印加す
る電圧の低下をまねくという欠点がある。 In this way, in the switch circuit of Figure 1,
On/off control can be performed by applying and stopping the gate signal to MOSFET11 , but in order to turn on MOSFET12 to MOSFET1 , a sufficient voltage must be applied to maintain the on state.
It is necessary to apply it between the gates and sources of MOSFETs 1 2 to 1 o . Therefore, in the circuit system shown in Figure 1, the drain potential of 1 2 to 1 o increases by the voltage necessary for driving in order to maintain the on state, increasing switch circuit loss and increasing the voltage applied to the load circuit. This has the disadvantage of causing a drop in the voltage applied.
本発明の目的は、小電流から大電流まで広い領
域に於いてスイツチ回路損失が少なく、しかも、
安定にオン、オフできるMOSFETを用いたスイ
ツチ回路が提供することにある。
The purpose of the present invention is to reduce switch circuit loss in a wide range from small currents to large currents, and
Our goal is to provide a switch circuit using MOSFETs that can be turned on and off stably.
損失が少なく、しかも安定にオン、オフ動作を
行うためには、追従して動作するMOSFETのゲ
ート・ソース間に充分な電圧の印加、停止の制御
を行う必要がある。このため、追従動作する
MOSFETにオフ時は回路エネルギーの吸収、オ
ン時は駆動エネルギーの供給の作用を兼ねそなえ
たコンデンサ回路を設けて追従して動作する
MOSFETを制御するようにした。
In order to perform on/off operations stably with little loss, it is necessary to apply and stop a sufficient voltage between the gate and source of the MOSFET that operates in accordance with the MOSFET. For this reason, the tracking operation
The MOSFET is equipped with a capacitor circuit that absorbs circuit energy when it is off and supplies drive energy when it is on, and operates by following the MOSFET.
Now controls MOSFET.
以下、本発明の実施例を第2図により説明す
る。図において、符号11〜1oはMOSFET、符
号31〜3oはコンデンサ、符号41〜4oは抵抗、
符号51〜5o-1はツエナーダイオード、符号61
〜6oはダイオード、符号71〜7oは抵抗、符号
81〜8oはツエナーダイオードである。
Embodiments of the present invention will be described below with reference to FIG. In the figure, symbols 1 1 to 1 o are MOSFETs, symbols 3 1 to 3 o are capacitors, and symbols 4 1 to 4 o are resistors.
Code 5 1 ~ 5 o-1 is a Zener diode, code 6 1
6 o are diodes, 7 1 to 7 o are resistors, and 8 1 to 8 o are Zener diodes.
MOSFET11に正のゲート信号が印加されてい
ない時は、11は遮断状態であり、追従して動作
するMOSFET12〜1oもしや断状態となり、ス
イツチ回路全体には電源電圧Esが印加される。
MOSFET11〜1oのドレイン、ソース間の印加
電圧はほぼ抵抗71〜7oで決まり、抵抗71〜7o
の値を等しくすればほぼ均等な電圧が印加され
る。次にMOSFET11に正のゲート信号を印加す
ると、11は導通を開始する。11が導通を開始す
ると、コンデンサ31の電荷は41、MOSFET12
のゲート、ソース及びMOSFET11のドレイン、
ソースを介して放電を開始し、MOSFET12のゲ
ート、ソース間に12が動作するに充分な電圧が
印加され12は導通を開始する。なお、ツエナー
ダイオード51はMOSFET12のゲート、ソース
間電圧を所定値以下に抑えるためのツエナーダイ
オードである。MOSFET13〜1oは、12と同様
にして順次導通を開始し、スイツチ回路はオン状
態となる。MOSFET11は、オン期間中充分な大
きさの正のゲート信号が印加され続けるので、小
さな電圧降下でオン状態を持続する、MOSFET
12はツエナーダイオード51又は81で定まる電
圧がゲート、ソース間に印加され続け、11と同
様充分小さな電圧降下でオン状態を持続する。
MOSFET13〜1oは、MOSFET12と同様であ
る。それゆえ、多数個直列接続してもオン時のス
イツチ回路の電圧降下を充分に小さくできる。 When a positive gate signal is not applied to MOSFET 1 1 , MOSFET 1 1 is in a cut-off state, and MOSFETs 1 2 to 1 that operate accordingly become cut-off, and the power supply voltage E s is applied to the entire switch circuit. Ru.
The voltage applied between the drain and source of MOSFET11 ~ 1o is determined by the resistance 71 ~ 7o .
If the values of are made equal, approximately equal voltages will be applied. Next, when a positive gate signal is applied to MOSFET 1 1 , MOSFET 1 1 starts conducting. When 1 1 starts conducting, the charge on capacitor 3 1 becomes 4 1 and MOSFET 1 2
gate, source and drain of MOSFET1 1 ,
Discharge begins through the source, and a voltage sufficient to operate MOSFET 1 2 is applied between the gate and source of MOSFET 1 2 , and MOSFET 1 2 begins to conduct. Note that the Zener diode 5 1 is a Zener diode for suppressing the voltage between the gate and source of the MOSFET 1 2 to a predetermined value or less. MOSFETs 1 3 to 1 o sequentially start conducting in the same manner as MOSFET 1 2 , and the switch circuit is turned on. MOSFET1 1 is a MOSFET that maintains the on state with a small voltage drop because a sufficiently large positive gate signal continues to be applied during the on period.
In 1 2 , a voltage determined by the Zener diode 5 1 or 8 1 continues to be applied between the gate and the source, and as in 1 1 , the on state is maintained with a sufficiently small voltage drop.
MOSFETs 1 3 to 1 o are similar to MOSFET 1 2 . Therefore, even if a large number of switch circuits are connected in series, the voltage drop in the switch circuit when turned on can be sufficiently reduced.
次に、MOSFET11のゲート信号の印加を停止
すると、MOSFET11はしや断状態となり
MOSFET11のドレイン電流は0となる。このた
め、負荷回路の電流は、MOSFET12のソース、
ゲート、ダイオード61、コンデンサ31を介して
流れ、オン時にMOSFET12のゲート、ソース間
に与えた電荷を引き抜く。なお、この時ダイオー
ド61がないと負荷回路の電流は抵抗41を介して
流れるため、電流と抵抗41の抵抗値で定まるス
テツプ状の電圧が印加する。このステツプ状の電
圧の印加を防止するため抵抗41に並列にダイオ
ード61を接続しているものであり、ステツプ状
電圧が問題とならない時はダイオード61を取り
除くことも可能である。MOSFET12のゲート、
ソース間電荷の引き抜きが行われるとMOSFET
12がしや断状態となり電流は0となる。負荷回
路の電流は、MOSFET13のソース、ゲート、ダ
イオード62、コンデンサ32を介して流れ、
MOSFET13のゲート、ソース間電荷の引き抜き
が行われる。MOSFET12と同様にして
MOSFET13がしや断状態となる。同様にして、
順次MOSFET14,15…1oがしや断状態となり
スイツチ回路はオフ状態になる。 Next, when the application of the gate signal to MOSFET 1 1 is stopped, MOSFET 1 1 becomes disconnected.
The drain current of MOSFET11 becomes 0. Therefore, the current in the load circuit is the source of MOSFET12 ,
It flows through the gate, diode 6 1 , and capacitor 3 1 , and extracts the charge applied between the gate and source of MOSFET 1 2 when it is on. At this time, if the diode 6 1 is not present, the current in the load circuit will flow through the resistor 4 1 , so a step voltage determined by the current and the resistance value of the resistor 4 1 will be applied. In order to prevent the application of this step voltage, a diode 6 1 is connected in parallel to the resistor 4 1 ; if the step voltage is not a problem, the diode 6 1 can be removed. MOSFET1 2 gate,
When the charge is extracted between the sources, the MOSFET
1 2 becomes cut off and the current becomes 0. The current in the load circuit flows through the source, gate, diode 6 2 and capacitor 3 2 of MOSFET 1 3 ,
Charge is extracted between the gate and source of MOSFET13 . In the same way as MOSFET1 2
MOSFETs 1 and 3 become disconnected. Similarly,
The MOSFETs 1 4 , 1 5 , . . . 1 o are turned off in sequence, and the switch circuit is turned off.
MOSFETはスイツチング時間が非常に短かい
ため、上記したオン動作、オフ動作におけるスイ
ツチング時間の差による分担電圧の不平衡は小さ
い。オフ動作に伴う分担電圧の不平衡や電源電圧
Esの変動に起因する電圧変動を吸収して分担電圧
を均等にするため、低抗71〜7o、ツエナーダイ
オード81〜8oの回路がある。コンデンサ31は
抵抗41、ツエナーダイオード81、抵抗71を介
して放電を行ない、コンデンサ32〜3oについて
はコンデンサ31と同様な放電を行う。このため、
常時電圧分担がほぼ抵抗71〜7oで定まる値にな
るように動作して安定なオフ状態を持続する。な
お、ツエナーダイオード81〜8oはオン期間にお
けるコンデンサ31〜3oの電荷の放電を防止する
ものであり、電圧はツエナーダイオード51〜5o
−1と同等以上に選ばれる。 Since the MOSFET has a very short switching time, the unbalance of the shared voltage due to the difference in switching time between on and off operations described above is small. Unbalance of shared voltage and power supply voltage due to off operation
In order to equalize the shared voltages by absorbing voltage fluctuations caused by fluctuations in E s , there is a circuit including low resistors 7 1 to 7 o and Zener diodes 8 1 to 8 o . The capacitor 3 1 discharges via the resistor 4 1 , the Zener diode 8 1 , and the resistor 7 1 , and the capacitors 3 2 to 3 o discharge in the same way as the capacitor 3 1 . For this reason,
It operates so that the voltage sharing is always approximately at the value determined by the resistors 7 1 to 7 o to maintain a stable off state. The Zener diodes 8 1 to 8 o prevent the discharge of charges in the capacitors 3 1 to 3 o during the on period, and the voltage is the same as that of the Zener diodes 5 1 to 5 o.
It is chosen to be equal to or higher than -1 .
第3図に他の実施例を示す。第2図の実施例と
相違する点はツエナーダイオード8と抵抗7の直
列回路を各々コンデンサ31〜3oに並列に接続す
るようにしたことである。本実施例も第2図の実
施例と同等の効果を有す。 FIG. 3 shows another embodiment. The difference from the embodiment shown in FIG. 2 is that a series circuit of a Zener diode 8 and a resistor 7 is connected in parallel to each of the capacitors 3 1 to 3 o . This embodiment also has the same effect as the embodiment shown in FIG.
なお、第2図、第3図の実施例において、最上
段に接続したツエナーダイオード8oを取り除く
こともできる。 Incidentally, in the embodiments shown in FIGS. 2 and 3, the Zener diode 8o connected to the top stage can also be removed.
本発明によれば、小電流から大電流までの広い
領域において電圧降下が小さく、安定にオン、オ
フできる小信号駆動のスイツチ回路を実現でき
る。
According to the present invention, it is possible to realize a small signal driven switch circuit that has a small voltage drop and can stably turn on and off in a wide range from small currents to large currents.
第1図はMOSFETを直列接続して追従点弧す
る方式の従来からのスイツチ回路、第2図は本発
明になるスイツチ回路の一実施例、第3図は本発
明になるスイツチ回路の他の実施例を示す。
11〜1o……MOSFET、31〜3o……コンデン
サ、41〜4o……抵抗、51〜5o-1……ツエナー
ダイオード、61〜6o……ダイオード、71〜7o
……抵抗、81〜8o……ツエナーダイオード。
Figure 1 shows a conventional switch circuit that uses MOSFETs connected in series to perform follow-up firing, Figure 2 shows an example of a switch circuit according to the present invention, and Figure 3 shows another example of a switch circuit according to the present invention. An example is shown. 1 1 ~ 1 o ... MOSFET, 3 1 ~ 3 o ... Capacitor, 4 1 ~ 4 o ... Resistor, 5 1 ~ 5 o-1 ... Zener diode, 6 1 ~ 6 o ... Diode, 7 1 ~ 7o
...Resistor, 8 1 ~ 8 o ... Zener diode.
Claims (1)
御されるMOSFETとこのMOSFETのドレイン
側に順次直列に接続され、このMOSFETの動作
に追従して動作する1個あるいは複数個の
MOSFETからなるスイツチ回路に於て、ゲート
に与えられる制御信号により導通が制御される
MOSFETのソースとこれに直列接続された
MOSFETのゲート、及び順次直列接続された各
MOSFETのソースとこれに接続された各
MOSFETのゲート間にコンデンサと抵抗からな
る直列回路および抵抗とツエナーダイオードから
なる直列回路とを並列に接続し、順次直列接続さ
れたMOSFETのうち最後に位置するMOSFET
のソース、ドレイン間にはコンデンサと抵抗から
なる直列回路を接続し、かつゲートに与えられる
制御信号により導通が制御されるMOSFETに順
次直列接続される各MOSFETのソース、ゲート
間にツエナーダイオードを接続したことを特徴と
するスイツチ回路。 2 特許請求の範囲第1項に於て、順次直列接続
された各MOSFETのドレインと、この
MOSFETのソースとこれに接続された
MOSFETのゲート間に接続されたコンデンサと
抵抗の直列回路のコンデンサと抵抗の接続点との
間にダイオードを接続したことを特徴とするスイ
ツチ回路。[Claims] 1. A MOSFET whose conduction is controlled by a control signal applied to its gate, and one or more MOSFETs that are connected in series to the drain side of this MOSFET and operate in accordance with the operation of this MOSFET.
In a switch circuit consisting of a MOSFET, conduction is controlled by a control signal applied to the gate.
connected in series with the source of the MOSFET.
MOSFET gate, and each serially connected
The source of the MOSFET and each
A series circuit consisting of a capacitor and a resistor and a series circuit consisting of a resistor and a Zener diode are connected in parallel between the MOSFET gates, and the MOSFET is located at the end of the MOSFETs connected in series.
A series circuit consisting of a capacitor and a resistor is connected between the source and drain of the MOSFET, and a Zener diode is connected between the source and gate of each MOSFET connected in series to the MOSFET whose conduction is controlled by a control signal applied to the gate. A switch circuit characterized by the following. 2 In claim 1, the drain of each MOSFET connected in series and the
MOSFET source and connected to this
A switch circuit characterized in that a diode is connected between the connection point of a capacitor and a resistor in a series circuit of a capacitor and a resistor connected between the gates of a MOSFET.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2710684A JPS60172819A (en) | 1984-02-17 | 1984-02-17 | switch circuit |
| US06/665,132 US4692643A (en) | 1983-10-28 | 1984-10-26 | Semiconductor switching device having plural MOSFET's, GTO's or the like connected in series |
| DE8484112922T DE3485409D1 (en) | 1983-10-28 | 1984-10-26 | SEMICONDUCTOR SWITCHING DEVICE. |
| EP84112922A EP0140349B1 (en) | 1983-10-28 | 1984-10-26 | Semiconductor switching device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2710684A JPS60172819A (en) | 1984-02-17 | 1984-02-17 | switch circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60172819A JPS60172819A (en) | 1985-09-06 |
| JPH036695B2 true JPH036695B2 (en) | 1991-01-30 |
Family
ID=12211829
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2710684A Granted JPS60172819A (en) | 1983-10-28 | 1984-02-17 | switch circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60172819A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61134131U (en) * | 1985-02-07 | 1986-08-21 | ||
| JP5195115B2 (en) * | 2008-07-23 | 2013-05-08 | ダイキン工業株式会社 | Inverter control method |
-
1984
- 1984-02-17 JP JP2710684A patent/JPS60172819A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60172819A (en) | 1985-09-06 |
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