JPH036833U - - Google Patents

Info

Publication number
JPH036833U
JPH036833U JP6575889U JP6575889U JPH036833U JP H036833 U JPH036833 U JP H036833U JP 6575889 U JP6575889 U JP 6575889U JP 6575889 U JP6575889 U JP 6575889U JP H036833 U JPH036833 U JP H036833U
Authority
JP
Japan
Prior art keywords
wiring
insulating layer
multilayer wiring
wiring structure
sectional
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6575889U
Other languages
Japanese (ja)
Other versions
JPH0749797Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989065758U priority Critical patent/JPH0749797Y2/en
Publication of JPH036833U publication Critical patent/JPH036833U/ja
Application granted granted Critical
Publication of JPH0749797Y2 publication Critical patent/JPH0749797Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の多層配線構造の一実施例を示
す平面説明図、第２図は第１図のＡ−Ａ′の断面
説明図、第３図は本考案の他の実施例を示す平面
説明図、第４図は第３図のＢ−Ｂ′の断面説明図
、第５図は第３図のＣ−Ｃ′の断面説明図、第６
図は第３図のＤ−Ｄ′の断面説明図、第７図は第
３図のＥ−Ｅ′の断面説明図、第８図及び第９図
は本実施例の製造工程で使用するフオトリソ用マ
スク図、第１０図は従来の多層配線構造の平面説
明図、第１１図は第１０図のＺ−Ｚ′の断面説明
図、第１２図はＴＦＴ駆動型イメージセンサの等
価回路である。 ２ａ……縦方向信号線、２ｂ……縦方向グラン
ド線、３……絶縁層、４ａ……横方向信号線、４
ｂ……横方向グランド線、５……コンタクトホー
ル、７……信号線−信号線交差部、１０，１１…
…首部、２１……受光素子、２２……受光素子ア
レイ、２３……ＴＦＴ（薄膜トランジスタ）、２
４……マトリツクス配線、２５……アナログマル
チプレクサ。 FIG. 1 is a plan view showing one embodiment of the multilayer wiring structure of the present invention, FIG. 2 is a cross-sectional view taken along line A-A' in FIG. 1, and FIG. 3 is a plan view showing another embodiment of the present invention. 4 is a cross-sectional view taken along line B-B' in FIG. 3; FIG. 5 is a cross-sectional view taken along line C-C' in FIG. 3;
The figure is an explanatory cross-sectional view taken along line D-D' in Figure 3, Figure 7 is an explanatory cross-sectional view taken along line E-E' in Figure 3, and Figures 8 and 9 are photolithographic diagrams used in the manufacturing process of this example. 10 is a plan view of a conventional multilayer wiring structure, FIG. 11 is a sectional view taken along line Z-Z' in FIG. 10, and FIG. 12 is an equivalent circuit of a TFT-driven image sensor. 2a... Vertical signal line, 2b... Vertical ground line, 3... Insulating layer, 4a... Horizontal signal line, 4
b... Horizontal ground line, 5... Contact hole, 7... Signal line-signal line intersection, 10, 11...
...Neck portion, 21... Light receiving element, 22... Light receiving element array, 23... TFT (thin film transistor), 2
4... Matrix wiring, 25... Analog multiplexer.

Claims (1)

【実用新案登録請求の範囲】 (1) 絶縁層を介して形成された複数の配線層か
ら成る多層配線構造において、 前記配線層の配線同士が上下で交差する部分の
配線幅を狭く形成したことを特徴とする多層配線
構造。 (2) 絶縁層を介して形成された複数の配線層か
ら成る多層配線構造において、 前記配線層の配線同士が上下で交差する部分の
前記絶縁層の膜厚を厚く形成したことを特徴とす
る多層配線構造。[Claims for Utility Model Registration] (1) In a multilayer wiring structure consisting of a plurality of wiring layers formed through an insulating layer, the width of the wiring is formed to be narrow at the portion where the wirings of the wiring layers cross each other vertically. A multilayer wiring structure characterized by (2) A multilayer wiring structure consisting of a plurality of wiring layers formed through an insulating layer, characterized in that the thickness of the insulating layer is thicker in the portion where the wirings of the wiring layer intersect each other vertically. Multilayer wiring structure.
JP1989065758U 1989-06-07 1989-06-07 Multi-layer wiring structure Expired - Lifetime JPH0749797Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989065758U JPH0749797Y2 (en) 1989-06-07 1989-06-07 Multi-layer wiring structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989065758U JPH0749797Y2 (en) 1989-06-07 1989-06-07 Multi-layer wiring structure

Publications (2)

Publication Number Publication Date
JPH036833U true JPH036833U (en) 1991-01-23
JPH0749797Y2 JPH0749797Y2 (en) 1995-11-13

Family

ID=31597872

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989065758U Expired - Lifetime JPH0749797Y2 (en) 1989-06-07 1989-06-07 Multi-layer wiring structure

Country Status (1)

Country Link
JP (1) JPH0749797Y2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009116177A1 (en) * 2008-03-21 2009-09-24 株式会社島津製作所 Optical matrix device
JP2011217420A (en) * 2006-02-24 2011-10-27 Panasonic Corp Surface acoustic wave filter, antenna duplexer, high-frequency module using them, and communication apparatus
CN116156738A (en) * 2023-02-02 2023-05-23 苏州浪潮智能科技有限公司 Printed circuit board, printed circuit board design method and server

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS615550A (en) * 1984-06-20 1986-01-11 Hitachi Micro Comput Eng Ltd Semiconductor device and manufacture thereof
JPS63209145A (en) * 1987-02-25 1988-08-30 Mitsubishi Electric Corp Manufacturing method of semiconductor device
JPS63222443A (en) * 1987-03-11 1988-09-16 Alps Electric Co Ltd Thin film transistor matrix array
JPS63255941A (en) * 1987-04-13 1988-10-24 Nec Corp Semiconductor integrated circuit
JPS6446955A (en) * 1987-08-14 1989-02-21 Ricoh Kk Method of wiring multilayer structure transistor
JPH022676A (en) * 1988-06-17 1990-01-08 Konica Corp Image sensor
JPH02137356A (en) * 1988-11-18 1990-05-25 Nec Corp Semiconductor integrated circuit

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS615550A (en) * 1984-06-20 1986-01-11 Hitachi Micro Comput Eng Ltd Semiconductor device and manufacture thereof
JPS63209145A (en) * 1987-02-25 1988-08-30 Mitsubishi Electric Corp Manufacturing method of semiconductor device
JPS63222443A (en) * 1987-03-11 1988-09-16 Alps Electric Co Ltd Thin film transistor matrix array
JPS63255941A (en) * 1987-04-13 1988-10-24 Nec Corp Semiconductor integrated circuit
JPS6446955A (en) * 1987-08-14 1989-02-21 Ricoh Kk Method of wiring multilayer structure transistor
JPH022676A (en) * 1988-06-17 1990-01-08 Konica Corp Image sensor
JPH02137356A (en) * 1988-11-18 1990-05-25 Nec Corp Semiconductor integrated circuit

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011217420A (en) * 2006-02-24 2011-10-27 Panasonic Corp Surface acoustic wave filter, antenna duplexer, high-frequency module using them, and communication apparatus
JP2012157078A (en) * 2006-02-24 2012-08-16 Panasonic Corp Surface acoustic wave filter, antenna duplexer, high frequency module using the same, and communication device
WO2009116177A1 (en) * 2008-03-21 2009-09-24 株式会社島津製作所 Optical matrix device
JPWO2009116177A1 (en) * 2008-03-21 2011-07-21 株式会社島津製作所 Manufacturing method of optical matrix device
CN116156738A (en) * 2023-02-02 2023-05-23 苏州浪潮智能科技有限公司 Printed circuit board, printed circuit board design method and server

Also Published As

Publication number Publication date
JPH0749797Y2 (en) 1995-11-13

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term